2010-08-25 19:12:05 +00:00
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/*-
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2017-11-27 15:11:47 +00:00
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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2015-04-23 14:22:20 +00:00
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* Copyright (c) 2010 Hudson River Trading LLC
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2010-08-25 19:12:05 +00:00
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* Written by: John H. Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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2017-09-06 11:47:59 +00:00
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* This driver provides a pseudo-bus to enumerate the PCI buses
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* present on a system using a QPI chipset. It creates a qpi0 bus that
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* is a child of nexus0 and then creates Host-PCI bridges as a
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2010-08-25 19:12:05 +00:00
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* child of that.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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2011-05-03 17:37:24 +00:00
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#include <sys/rman.h>
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2010-08-25 19:12:05 +00:00
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#include <sys/systm.h>
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#include <machine/cputypes.h>
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#include <machine/md_var.h>
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2014-01-21 03:14:19 +00:00
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#include <x86/legacyvar.h>
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#include <x86/pci_cfgreg.h>
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#include <x86/specialreg.h>
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2010-08-25 19:12:05 +00:00
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2010-09-07 13:50:02 +00:00
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#include <dev/pci/pcireg.h>
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2010-08-25 19:12:05 +00:00
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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struct qpi_device {
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int qd_pcibus;
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};
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static MALLOC_DEFINE(M_QPI, "qpidrv", "qpi system device");
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static void
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qpi_identify(driver_t *driver, device_t parent)
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{
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2017-09-08 19:51:03 +00:00
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int do_qpi;
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2010-08-25 19:12:05 +00:00
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2017-09-08 10:39:28 +00:00
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/* Check CPUID to ensure this is an i7 CPU of some sort. */
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2017-09-08 19:51:03 +00:00
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if (cpu_vendor_id != CPU_VENDOR_INTEL ||
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CPUID_TO_FAMILY(cpu_id) != 0x6)
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return;
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/* Only discover buses with configuration devices if allowed by user */
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do_qpi = 0;
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TUNABLE_INT_FETCH("hw.attach_intel_csr_pci", &do_qpi);
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if (!do_qpi)
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2017-09-08 10:39:28 +00:00
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return;
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2010-08-25 19:12:05 +00:00
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2017-09-08 10:39:28 +00:00
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/* PCI config register access is required. */
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if (pci_cfgregopen() == 0)
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return;
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2010-08-25 19:12:05 +00:00
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/* Add a qpi bus device. */
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if (BUS_ADD_CHILD(parent, 20, "qpi", -1) == NULL)
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panic("Failed to add qpi bus");
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}
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static int
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qpi_probe(device_t dev)
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{
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device_set_desc(dev, "QPI system bus");
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return (BUS_PROBE_SPECIFIC);
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}
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2010-09-07 13:50:02 +00:00
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/*
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* Look for a PCI bus with the specified bus address. If one is found,
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* add a pcib device and return 0. Otherwise, return an error code.
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*/
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2010-08-25 19:12:05 +00:00
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static int
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2010-09-07 13:50:02 +00:00
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qpi_probe_pcib(device_t dev, int bus)
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2010-08-25 19:12:05 +00:00
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{
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struct qpi_device *qdev;
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device_t child;
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2010-09-07 13:50:02 +00:00
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uint32_t devid;
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2017-09-08 19:51:03 +00:00
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int s;
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2010-08-25 19:12:05 +00:00
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/*
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2010-09-07 13:50:02 +00:00
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* If a PCI bus already exists for this bus number, then
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* fail.
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2010-08-25 19:12:05 +00:00
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*/
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2010-09-07 13:50:02 +00:00
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if (pci_find_bsf(bus, 0, 0) != NULL)
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return (EEXIST);
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/*
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2017-09-08 19:51:03 +00:00
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* Attempt to read the device id for every slot, function 0 on
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* the bus. If all read values are 0xffffffff this means that
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* the bus is not present.
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2010-09-07 13:50:02 +00:00
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*/
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2017-09-08 19:51:03 +00:00
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for (s = 0; s <= PCI_SLOTMAX; s++) {
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devid = pci_cfgregread(bus, s, 0, PCIR_DEVVENDOR, 4);
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if (devid != 0xffffffff)
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break;
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}
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2010-09-07 13:50:02 +00:00
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if (devid == 0xffffffff)
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return (ENOENT);
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if ((devid & 0xffff) != 0x8086) {
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2017-09-08 19:51:03 +00:00
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if (bootverbose)
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device_printf(dev,
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"Device at pci%d.%d.0 has non-Intel vendor 0x%x\n",
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bus, s, devid & 0xffff);
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2010-09-07 13:50:02 +00:00
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return (ENXIO);
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}
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2010-08-25 19:12:05 +00:00
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child = BUS_ADD_CHILD(dev, 0, "pcib", -1);
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if (child == NULL)
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2010-09-07 13:50:02 +00:00
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panic("%s: failed to add pci bus %d", device_get_nameunit(dev),
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bus);
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2010-08-25 19:12:05 +00:00
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qdev = malloc(sizeof(struct qpi_device), M_QPI, M_WAITOK);
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2010-09-07 13:50:02 +00:00
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qdev->qd_pcibus = bus;
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2010-08-25 19:12:05 +00:00
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device_set_ivars(child, qdev);
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2010-09-07 13:50:02 +00:00
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return (0);
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}
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static int
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qpi_attach(device_t dev)
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{
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int bus;
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/*
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2017-09-08 19:51:03 +00:00
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* Each processor socket has a dedicated PCI bus, sometimes
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* not enumerated by ACPI. Probe all unattached buses from 0
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* to 255.
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2010-09-07 13:50:02 +00:00
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*/
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2017-09-08 19:51:03 +00:00
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for (bus = PCI_BUSMAX; bus >= 0; bus--)
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qpi_probe_pcib(dev, bus);
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2010-08-25 19:12:05 +00:00
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return (bus_generic_attach(dev));
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}
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static int
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qpi_print_child(device_t bus, device_t child)
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{
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struct qpi_device *qdev;
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int retval = 0;
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qdev = device_get_ivars(child);
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retval += bus_print_child_header(bus, child);
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if (qdev->qd_pcibus != -1)
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retval += printf(" pcibus %d", qdev->qd_pcibus);
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retval += bus_print_child_footer(bus, child);
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return (retval);
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}
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static int
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qpi_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct qpi_device *qdev;
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qdev = device_get_ivars(child);
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switch (which) {
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case PCIB_IVAR_BUS:
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*result = qdev->qd_pcibus;
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break;
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default:
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return (ENOENT);
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}
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return (0);
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}
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static device_method_t qpi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, qpi_identify),
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DEVMETHOD(device_probe, qpi_probe),
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DEVMETHOD(device_attach, qpi_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, qpi_print_child),
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DEVMETHOD(bus_add_child, bus_generic_add_child),
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DEVMETHOD(bus_read_ivar, qpi_read_ivar),
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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{ 0, 0 }
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};
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static devclass_t qpi_devclass;
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DEFINE_CLASS_0(qpi, qpi_driver, qpi_methods, 0);
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DRIVER_MODULE(qpi, nexus, qpi_driver, qpi_devclass, 0, 0);
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static int
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qpi_pcib_probe(device_t dev)
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{
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device_set_desc(dev, "QPI Host-PCI bridge");
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return (BUS_PROBE_SPECIFIC);
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}
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static int
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qpi_pcib_attach(device_t dev)
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{
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2015-09-16 23:34:51 +00:00
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device_add_child(dev, "pci", -1);
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2017-09-08 10:39:28 +00:00
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return (bus_generic_attach(dev));
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2010-08-25 19:12:05 +00:00
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}
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static int
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qpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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switch (which) {
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case PCIB_IVAR_DOMAIN:
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*result = 0;
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return (0);
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case PCIB_IVAR_BUS:
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*result = pcib_get_bus(dev);
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return (0);
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default:
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return (ENOENT);
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}
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}
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2014-02-12 04:30:37 +00:00
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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static struct resource *
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qpi_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
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2016-01-27 02:23:54 +00:00
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rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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2014-02-12 04:30:37 +00:00
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{
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if (type == PCI_RES_BUS)
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return (pci_domain_alloc_bus(0, child, rid, start, end, count,
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flags));
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return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
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count, flags));
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}
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#endif
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2010-08-25 19:12:05 +00:00
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static int
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qpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
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uint32_t *data)
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{
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device_t bus;
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bus = device_get_parent(pcib);
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return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
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}
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static device_method_t qpi_pcib_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, qpi_pcib_probe),
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DEVMETHOD(device_attach, qpi_pcib_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, qpi_pcib_read_ivar),
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2014-02-12 04:30:37 +00:00
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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DEVMETHOD(bus_alloc_resource, qpi_pcib_alloc_resource),
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DEVMETHOD(bus_adjust_resource, legacy_pcib_adjust_resource),
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DEVMETHOD(bus_release_resource, legacy_pcib_release_resource),
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#else
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2010-08-25 19:12:05 +00:00
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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2014-02-12 04:30:37 +00:00
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#endif
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2010-08-25 19:12:05 +00:00
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, pcib_maxslots),
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2014-01-21 03:14:19 +00:00
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DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
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DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
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DEVMETHOD(pcib_alloc_msi, legacy_pcib_alloc_msi),
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2010-08-25 19:12:05 +00:00
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DEVMETHOD(pcib_release_msi, pcib_release_msi),
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2014-01-21 03:14:19 +00:00
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DEVMETHOD(pcib_alloc_msix, legacy_pcib_alloc_msix),
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2010-08-25 19:12:05 +00:00
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DEVMETHOD(pcib_release_msix, pcib_release_msix),
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DEVMETHOD(pcib_map_msi, qpi_pcib_map_msi),
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2011-11-22 21:28:20 +00:00
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DEVMETHOD_END
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2010-08-25 19:12:05 +00:00
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};
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static devclass_t qpi_pcib_devclass;
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DEFINE_CLASS_0(pcib, qpi_pcib_driver, qpi_pcib_methods, 0);
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DRIVER_MODULE(pcib, qpi, qpi_pcib_driver, qpi_pcib_devclass, 0, 0);
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