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freebsd-dev/sys/arm64/rockchip/rk_gpio.c

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arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
* Copyright (c) 2021 Soren Schmidt <sos@deepcore.dk>
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
#include <sys/proc.h>
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
#include <sys/rman.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/gpio.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <machine/intr.h>
#include <dev/gpio/gpiobusvar.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/extres/clk/clk.h>
#include "gpio_if.h"
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
#include "pic_if.h"
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
#include "fdt_pinctrl_if.h"
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
enum gpio_regs {
RK_GPIO_SWPORTA_DR = 1, /* Data register */
RK_GPIO_SWPORTA_DDR, /* Data direction register */
RK_GPIO_INTEN, /* Interrupt enable register */
RK_GPIO_INTMASK, /* Interrupt mask register */
RK_GPIO_INTTYPE_LEVEL, /* Interrupt level register */
RK_GPIO_INTTYPE_BOTH, /* Both rise and falling edge */
RK_GPIO_INT_POLARITY, /* Interrupt polarity register */
RK_GPIO_INT_STATUS, /* Interrupt status register */
RK_GPIO_INT_RAWSTATUS, /* Raw Interrupt status register */
RK_GPIO_DEBOUNCE, /* Debounce enable register */
RK_GPIO_PORTA_EOI, /* Clear interrupt register */
RK_GPIO_EXT_PORTA, /* External port register */
RK_GPIO_REGNUM
};
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
#define RK_GPIO_LS_SYNC 0x60 /* Level sensitive syncronization enable register */
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
#define RK_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN | GPIO_INTR_EDGE_BOTH | \
GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING | \
GPIO_INTR_LEVEL_HIGH | GPIO_INTR_LEVEL_LOW)
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
#define GPIO_FLAGS_PINCTRL GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN
#define RK_GPIO_MAX_PINS 32
struct pin_cached {
uint8_t is_gpio;
uint32_t flags;
};
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
struct rk_pin_irqsrc {
struct intr_irqsrc isrc;
uint32_t irq;
uint32_t mode;
};
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
struct rk_gpio_softc {
device_t sc_dev;
device_t sc_busdev;
struct mtx sc_mtx;
struct resource *sc_res[2];
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bsh;
clk_t clk;
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
device_t pinctrl;
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
uint32_t swporta;
uint32_t swporta_ddr;
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
uint32_t version;
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
struct pin_cached pin_cached[RK_GPIO_MAX_PINS];
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
uint8_t regs[RK_GPIO_REGNUM];
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
void *ihandle;
struct rk_pin_irqsrc isrcs[RK_GPIO_MAX_PINS];
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
};
static struct ofw_compat_data compat_data[] = {
{"rockchip,gpio-bank", 1},
{NULL, 0}
};
static struct resource_spec rk_gpio_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ SYS_RES_IRQ, 0, RF_ACTIVE },
{ -1, 0 }
};
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
#define RK_GPIO_VERSION 0x78
#define RK_GPIO_TYPE_V1 0x00000000
#define RK_GPIO_TYPE_V2 0x01000c2b
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
#define RK_GPIO_ISRC(sc, irq) (&(sc->isrcs[irq].isrc))
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
static int rk_gpio_detach(device_t dev);
#define RK_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
#define RK_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
#define RK_GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
#define RK_GPIO_WRITE(_sc, _off, _val) \
bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
#define RK_GPIO_READ(_sc, _off) \
bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
static int
rk_gpio_read_bit(struct rk_gpio_softc *sc, int reg, int bit)
{
int offset = sc->regs[reg];
uint32_t value;
if (sc->version == RK_GPIO_TYPE_V1) {
value = RK_GPIO_READ(sc, offset);
value >>= bit;
} else {
value = RK_GPIO_READ(sc, bit > 15 ? offset + 4 : offset);
value >>= (bit % 16);
}
return (value & 1);
}
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
static void
rk_gpio_write_bit(struct rk_gpio_softc *sc, int reg, int bit, int data)
{
int offset = sc->regs[reg];
uint32_t value;
if (sc->version == RK_GPIO_TYPE_V1) {
value = RK_GPIO_READ(sc, offset);
if (data)
value |= (1 << bit);
else
value &= ~(1 << bit);
RK_GPIO_WRITE(sc, offset, value);
} else {
if (data)
value = (1 << (bit % 16));
else
value = 0;
value |= (1 << ((bit % 16) + 16));
RK_GPIO_WRITE(sc, bit > 15 ? offset + 4 : offset, value);
}
}
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
static uint32_t
rk_gpio_read_4(struct rk_gpio_softc *sc, int reg)
{
int offset = sc->regs[reg];
uint32_t value;
if (sc->version == RK_GPIO_TYPE_V1)
value = RK_GPIO_READ(sc, offset);
else
value = (RK_GPIO_READ(sc, offset) & 0xffff) |
(RK_GPIO_READ(sc, offset + 4) << 16);
return (value);
}
static void
rk_gpio_write_4(struct rk_gpio_softc *sc, int reg, uint32_t value)
{
int offset = sc->regs[reg];
if (sc->version == RK_GPIO_TYPE_V1)
RK_GPIO_WRITE(sc, offset, value);
else {
RK_GPIO_WRITE(sc, offset, (value & 0xffff) | 0xffff0000);
RK_GPIO_WRITE(sc, offset + 4, (value >> 16) | 0xffff0000);
}
}
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
static int
rk_gpio_intr(void *arg)
{
struct rk_gpio_softc *sc = (struct rk_gpio_softc *)arg;;
struct trapframe *tf = curthread->td_intr_frame;
uint32_t status;
RK_GPIO_LOCK(sc);
status = rk_gpio_read_4(sc, RK_GPIO_INT_STATUS);
rk_gpio_write_4(sc, RK_GPIO_PORTA_EOI, status);
RK_GPIO_UNLOCK(sc);
while (status) {
int pin = ffs(status) - 1;
status &= ~(1 << pin);
if (intr_isrc_dispatch(RK_GPIO_ISRC(sc, pin), tf)) {
device_printf(sc->sc_dev, "Interrupt pin=%d unhandled\n",
pin);
continue;
}
if ((sc->version == RK_GPIO_TYPE_V1) &&
(sc->isrcs[pin].mode & GPIO_INTR_EDGE_BOTH)) {
RK_GPIO_LOCK(sc);
if (rk_gpio_read_bit(sc, RK_GPIO_EXT_PORTA, pin))
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY,
(1 << pin), 0);
else
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY,
(1 << pin), 1);
RK_GPIO_UNLOCK(sc);
}
}
return (FILTER_HANDLED);
}
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
static int
rk_gpio_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "RockChip GPIO Bank controller");
return (BUS_PROBE_DEFAULT);
}
static int
rk_gpio_attach(device_t dev)
{
struct rk_gpio_softc *sc;
Fix problem getting gpio version during attach. Both RK3328 and RK3399 don't have GPIO_VER_ID register. Set gpio version depending on compat string of the parent.
2022-09-01 07:21:56 +00:00
phandle_t parent_node, node;
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
int err, i;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
sc = device_get_softc(dev);
sc->sc_dev = dev;
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
sc->pinctrl = device_get_parent(dev);
Fix problem getting gpio version during attach. Both RK3328 and RK3399 don't have GPIO_VER_ID register. Set gpio version depending on compat string of the parent.
2022-09-01 07:21:56 +00:00
parent_node = ofw_bus_get_node(sc->pinctrl);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
node = ofw_bus_get_node(sc->sc_dev);
if (!OF_hasprop(node, "gpio-controller"))
return (ENXIO);
mtx_init(&sc->sc_mtx, "rk gpio", "gpio", MTX_SPIN);
if (bus_alloc_resources(dev, rk_gpio_spec, sc->sc_res)) {
device_printf(dev, "could not allocate resources\n");
bus_release_resources(dev, rk_gpio_spec, sc->sc_res);
mtx_destroy(&sc->sc_mtx);
return (ENXIO);
}
sc->sc_bst = rman_get_bustag(sc->sc_res[0]);
sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]);
if (clk_get_by_ofw_index(dev, 0, 0, &sc->clk) != 0) {
device_printf(dev, "Cannot get clock\n");
rk_gpio_detach(dev);
return (ENXIO);
}
err = clk_enable(sc->clk);
if (err != 0) {
device_printf(dev, "Could not enable clock %s\n",
clk_get_name(sc->clk));
rk_gpio_detach(dev);
return (ENXIO);
}
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
if ((err = bus_setup_intr(dev, sc->sc_res[1],
INTR_TYPE_MISC | INTR_MPSAFE, rk_gpio_intr, NULL,
sc, &sc->ihandle))) {
device_printf(dev, "Can not setup IRQ\n");
rk_gpio_detach(dev);
return (ENXIO);
}
Fix problem getting gpio version during attach. Both RK3328 and RK3399 don't have GPIO_VER_ID register. Set gpio version depending on compat string of the parent.
2022-09-01 07:21:56 +00:00
/*
* RK3568 has GPIO_VER_ID register, however both
* RK3328 and RK3399 doesn't have. So choose the
* version based on parent's compat string.
*/
if (ofw_bus_node_is_compatible(parent_node, "rockchip,rk3568-pinctrl"))
sc->version = RK_GPIO_TYPE_V2;
else
sc->version = RK_GPIO_TYPE_V1;
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
switch (sc->version) {
case RK_GPIO_TYPE_V1:
sc->regs[RK_GPIO_SWPORTA_DR] = 0x00;
sc->regs[RK_GPIO_SWPORTA_DDR] = 0x04;
sc->regs[RK_GPIO_INTEN] = 0x30;
sc->regs[RK_GPIO_INTMASK] = 0x34;
sc->regs[RK_GPIO_INTTYPE_LEVEL] = 0x38;
sc->regs[RK_GPIO_INT_POLARITY] = 0x3c;
sc->regs[RK_GPIO_INT_STATUS] = 0x40;
sc->regs[RK_GPIO_INT_RAWSTATUS] = 0x44;
sc->regs[RK_GPIO_DEBOUNCE] = 0x48;
sc->regs[RK_GPIO_PORTA_EOI] = 0x4c;
sc->regs[RK_GPIO_EXT_PORTA] = 0x50;
break;
case RK_GPIO_TYPE_V2:
sc->regs[RK_GPIO_SWPORTA_DR] = 0x00;
sc->regs[RK_GPIO_SWPORTA_DDR] = 0x08;
sc->regs[RK_GPIO_INTEN] = 0x10;
sc->regs[RK_GPIO_INTMASK] = 0x18;
sc->regs[RK_GPIO_INTTYPE_LEVEL] = 0x20;
sc->regs[RK_GPIO_INTTYPE_BOTH] = 0x30;
sc->regs[RK_GPIO_INT_POLARITY] = 0x28;
sc->regs[RK_GPIO_INT_STATUS] = 0x50;
sc->regs[RK_GPIO_INT_RAWSTATUS] = 0x58;
sc->regs[RK_GPIO_DEBOUNCE] = 0x38;
sc->regs[RK_GPIO_PORTA_EOI] = 0x60;
sc->regs[RK_GPIO_EXT_PORTA] = 0x70;
break;
default:
device_printf(dev, "Unknown gpio version %08x\n", sc->version);
rk_gpio_detach(dev);
return (ENXIO);
}
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
for (i = 0; i < RK_GPIO_MAX_PINS; i++) {
sc->isrcs[i].irq = i;
sc->isrcs[i].mode = GPIO_INTR_CONFORM;
if ((err = intr_isrc_register(RK_GPIO_ISRC(sc, i),
dev, 0, "%s", device_get_nameunit(dev)))) {
device_printf(dev, "Can not register isrc %d\n", err);
rk_gpio_detach(dev);
return (ENXIO);
}
}
if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
device_printf(dev, "Can not register pic\n");
rk_gpio_detach(dev);
return (ENXIO);
}
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
sc->sc_busdev = gpiobus_attach_bus(dev);
if (sc->sc_busdev == NULL) {
rk_gpio_detach(dev);
return (ENXIO);
}
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
/* Set the cached value to unknown */
for (i = 0; i < RK_GPIO_MAX_PINS; i++)
sc->pin_cached[i].is_gpio = 2;
RK_GPIO_LOCK(sc);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
sc->swporta = rk_gpio_read_4(sc, RK_GPIO_SWPORTA_DR);
sc->swporta_ddr = rk_gpio_read_4(sc, RK_GPIO_SWPORTA_DDR);
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
RK_GPIO_UNLOCK(sc);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
return (0);
}
static int
rk_gpio_detach(device_t dev)
{
struct rk_gpio_softc *sc;
sc = device_get_softc(dev);
if (sc->sc_busdev)
gpiobus_detach_bus(dev);
bus_release_resources(dev, rk_gpio_spec, sc->sc_res);
mtx_destroy(&sc->sc_mtx);
clk_disable(sc->clk);
return(0);
}
static device_t
rk_gpio_get_bus(device_t dev)
{
struct rk_gpio_softc *sc;
sc = device_get_softc(dev);
return (sc->sc_busdev);
}
static int
rk_gpio_pin_max(device_t dev, int *maxpin)
{
/* Each bank have always 32 pins */
Add support for RK3288 into existing RockChip drivers. This patch ensures only minimal level of compatibility necessary to boot on RK3288 based boards. GPIO and pinctrl interaction, missing in current implementation, will be improved by own patch in the near future. MFC after: 2 weeks MFC with: r351452
2019-08-27 09:20:01 +00:00
/* XXX not true*/
arm64: rockchip: rk_gpio: Fix pin number The maxpin counter starts at 0, fix one by one error. This is still not totally correct for some banks in some SoC that have fewer pins but this will be dealt with in another commit. MFC after: 3 days
2019-12-17 10:57:31 +00:00
*maxpin = 31;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
return (0);
}
static int
rk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
{
struct rk_gpio_softc *sc;
arm64: rockchip: gpio: Give friendlier name to gpio By default name the gpio P<bank><bankpin> This make it easier to find the gpio when reading schematics or DTS. Sponsored by: Diablotin Systems Differential Revision: https://reviews.freebsd.org/D30287
2021-05-16 12:47:16 +00:00
uint32_t bank;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
sc = device_get_softc(dev);
if (pin >= 32)
return (EINVAL);
arm64: rockchip: gpio: Give friendlier name to gpio By default name the gpio P<bank><bankpin> This make it easier to find the gpio when reading schematics or DTS. Sponsored by: Diablotin Systems Differential Revision: https://reviews.freebsd.org/D30287
2021-05-16 12:47:16 +00:00
bank = pin / 8;
pin = pin - (bank * 8);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_LOCK(sc);
arm64: rockchip: gpio: Give friendlier name to gpio By default name the gpio P<bank><bankpin> This make it easier to find the gpio when reading schematics or DTS. Sponsored by: Diablotin Systems Differential Revision: https://reviews.freebsd.org/D30287
2021-05-16 12:47:16 +00:00
snprintf(name, GPIOMAXNAME, "P%c%d", bank + 'A', pin);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
{
struct rk_gpio_softc *sc;
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
int rv;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
sc = device_get_softc(dev);
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
if (__predict_false(sc->pin_cached[pin].is_gpio != 1)) {
rv = FDT_PINCTRL_IS_GPIO(sc->pinctrl, dev, pin, (bool *)&sc->pin_cached[pin].is_gpio);
if (rv != 0)
return (rv);
if (sc->pin_cached[pin].is_gpio == 0)
return (EINVAL);
}
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
*flags = 0;
rv = FDT_PINCTRL_GET_FLAGS(sc->pinctrl, dev, pin, flags);
if (rv != 0)
return (rv);
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->pin_cached[pin].flags = *flags;
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
if (sc->swporta_ddr & (1 << pin))
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
*flags |= GPIO_PIN_OUTPUT;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
else
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
*flags |= GPIO_PIN_INPUT;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
return (0);
}
static int
rk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
{
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
if (pin >= RK_GPIO_MAX_PINS)
return EINVAL;
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
*caps = RK_GPIO_DEFAULT_CAPS;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
return (0);
}
static int
rk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
{
struct rk_gpio_softc *sc;
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
int rv;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
sc = device_get_softc(dev);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
if (pin >= RK_GPIO_MAX_PINS)
return (EINVAL);
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
if (__predict_false(sc->pin_cached[pin].is_gpio != 1)) {
rv = FDT_PINCTRL_IS_GPIO(sc->pinctrl, dev, pin, (bool *)&sc->pin_cached[pin].is_gpio);
if (rv != 0)
return (rv);
if (sc->pin_cached[pin].is_gpio == 0)
return (EINVAL);
}
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
if (__predict_false((flags & GPIO_PIN_INPUT) && ((flags & GPIO_FLAGS_PINCTRL) != sc->pin_cached[pin].flags))) {
rv = FDT_PINCTRL_SET_FLAGS(sc->pinctrl, dev, pin, flags);
sc->pin_cached[pin].flags = flags & GPIO_FLAGS_PINCTRL;
if (rv != 0)
return (rv);
}
arm64: rockchip: Add new interface for rk_pinctrl The gpio controller in rockchips SoC in a child of the pinctrl driver and cannot control pullups and pulldowns. Use the new fdt_pinctrl interface for accessing pin capabilities and setting them. We can now report that every pins is capable of being IN or OUT function and PULLUP PULLDOWN. If the pin isn't in gpio mode no changes will be allowed. Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_LOCK(sc);
if (flags & GPIO_PIN_INPUT)
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta_ddr &= ~(1 << pin);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
else if (flags & GPIO_PIN_OUTPUT)
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta_ddr |= (1 << pin);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
rk_gpio_write_4(sc, RK_GPIO_SWPORTA_DDR, sc->swporta_ddr);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
{
struct rk_gpio_softc *sc;
sc = device_get_softc(dev);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
if (pin >= RK_GPIO_MAX_PINS)
return (EINVAL);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_LOCK(sc);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
*val = rk_gpio_read_bit(sc, RK_GPIO_EXT_PORTA, pin);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
{
struct rk_gpio_softc *sc;
sc = device_get_softc(dev);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
if (pin >= RK_GPIO_MAX_PINS)
return (EINVAL);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_LOCK(sc);
if (value)
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta |= (1 << pin);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
else
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta &= ~(1 << pin);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
rk_gpio_write_4(sc, RK_GPIO_SWPORTA_DR, sc->swporta);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_pin_toggle(device_t dev, uint32_t pin)
{
struct rk_gpio_softc *sc;
sc = device_get_softc(dev);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
if (pin >= RK_GPIO_MAX_PINS)
return (EINVAL);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_LOCK(sc);
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
if (sc->swporta & (1 << pin))
sc->swporta &= ~(1 << pin);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
else
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta |= (1 << pin);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
rk_gpio_write_4(sc, RK_GPIO_SWPORTA_DR, sc->swporta);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
uint32_t change_pins, uint32_t *orig_pins)
{
struct rk_gpio_softc *sc;
uint32_t reg;
sc = device_get_softc(dev);
RK_GPIO_LOCK(sc);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
reg = rk_gpio_read_4(sc, RK_GPIO_SWPORTA_DR);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
if (orig_pins)
*orig_pins = reg;
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta = reg;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
if ((clear_pins | change_pins) != 0) {
reg = (reg & ~clear_pins) ^ change_pins;
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
rk_gpio_write_4(sc, RK_GPIO_SWPORTA_DR, reg);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
}
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
uint32_t *pin_flags)
{
arm64: rockchip: rk_gpio fix rk_gpio_pin_config32 Pointy Hat to: me
2018-04-26 22:15:09 +00:00
struct rk_gpio_softc *sc;
uint32_t reg, set, mask, flags;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
int i;
arm64: rockchip: rk_gpio fix rk_gpio_pin_config32 Pointy Hat to: me
2018-04-26 22:15:09 +00:00
sc = device_get_softc(dev);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
if (first_pin != 0 || num_pins > 32)
return (EINVAL);
set = 0;
mask = 0;
for (i = 0; i < num_pins; i++) {
mask = (mask << 1) | 1;
flags = pin_flags[i];
if (flags & GPIO_PIN_INPUT) {
set &= ~(1 << i);
} else if (flags & GPIO_PIN_OUTPUT) {
set |= (1 << i);
}
}
RK_GPIO_LOCK(sc);
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
reg = rk_gpio_read_4(sc, RK_GPIO_SWPORTA_DDR);
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
reg &= ~mask;
reg |= set;
Code refactoring for existing rk_gpio driver. It supports gpio type checking. Depending on gpio type some register addresses are different. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D36262
2022-08-19 13:22:01 +00:00
rk_gpio_write_4(sc, RK_GPIO_SWPORTA_DDR, reg);
arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins.
2021-09-22 14:55:54 +00:00
sc->swporta_ddr = reg;
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
pcell_t *gpios, uint32_t *pin, uint32_t *flags)
{
arm64: rockchip: Fix map_gpio The map_gpio function wasn't correct, the first element is the pin and not the phandle.
2019-09-28 22:21:16 +00:00
/* The gpios are mapped as <pin flags> */
*pin = gpios[0];
*flags = gpios[1];
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
return (0);
}
Add support for RK3288 into existing RockChip drivers. This patch ensures only minimal level of compatibility necessary to boot on RK3288 based boards. GPIO and pinctrl interaction, missing in current implementation, will be improved by own patch in the near future. MFC after: 2 weeks MFC with: r351452
2019-08-27 09:20:01 +00:00
static phandle_t
rk_gpio_get_node(device_t bus, device_t dev)
{
/* We only have one child, the GPIO bus, which needs our own node. */
return (ofw_bus_get_node(bus));
}
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
static int
rk_pic_map_intr(device_t dev, struct intr_map_data *data,
struct intr_irqsrc **isrcp)
{
struct rk_gpio_softc *sc = device_get_softc(dev);
struct intr_map_data_gpio *gdata;
uint32_t irq;
if (data->type != INTR_MAP_DATA_GPIO) {
device_printf(dev, "Wrong type\n");
return (ENOTSUP);
}
gdata = (struct intr_map_data_gpio *)data;
irq = gdata->gpio_pin_num;
if (irq >= RK_GPIO_MAX_PINS) {
device_printf(dev, "Invalid interrupt %u\n", irq);
return (EINVAL);
}
*isrcp = RK_GPIO_ISRC(sc, irq);
return (0);
}
static int
rk_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
struct resource *res, struct intr_map_data *data)
{
struct rk_gpio_softc *sc = device_get_softc(dev);
struct rk_pin_irqsrc *rkisrc = (struct rk_pin_irqsrc *)isrc;
struct intr_map_data_gpio *gdata;
uint32_t mode;
uint8_t pin;
if (!data) {
device_printf(dev, "No map data\n");
return (ENOTSUP);
}
gdata = (struct intr_map_data_gpio *)data;
mode = gdata->gpio_intr_mode;
pin = gdata->gpio_pin_num;
if (rkisrc->irq != gdata->gpio_pin_num) {
device_printf(dev, "Interrupts don't match\n");
return (EINVAL);
}
if (isrc->isrc_handlers != 0) {
device_printf(dev, "Handler already attached\n");
return (rkisrc->mode == mode ? 0 : EINVAL);
}
rkisrc->mode = mode;
RK_GPIO_LOCK(sc);
switch (mode & GPIO_INTR_MASK) {
case GPIO_INTR_EDGE_RISING:
rk_gpio_write_bit(sc, RK_GPIO_SWPORTA_DDR, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTTYPE_LEVEL, pin, 1);
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY, pin, 1);
break;
case GPIO_INTR_EDGE_FALLING:
rk_gpio_write_bit(sc, RK_GPIO_SWPORTA_DDR, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTTYPE_LEVEL, pin, 1);
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY, pin, 0);
break;
case GPIO_INTR_EDGE_BOTH:
rk_gpio_write_bit(sc, RK_GPIO_SWPORTA_DDR, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTTYPE_LEVEL, pin, 1);
if (sc->version == RK_GPIO_TYPE_V1) {
if (rk_gpio_read_bit(sc, RK_GPIO_EXT_PORTA, pin))
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY,
pin, 0);
else
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY,
pin, 1);
} else
rk_gpio_write_bit(sc, RK_GPIO_INTTYPE_BOTH, pin, 1);
break;
case GPIO_INTR_LEVEL_HIGH:
rk_gpio_write_bit(sc, RK_GPIO_SWPORTA_DDR, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTTYPE_LEVEL, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY, pin, 1);
break;
case GPIO_INTR_LEVEL_LOW:
rk_gpio_write_bit(sc, RK_GPIO_SWPORTA_DDR, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTTYPE_LEVEL, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INT_POLARITY, pin, 0);
break;
default:
rk_gpio_write_bit(sc, RK_GPIO_INTMASK, pin, 1);
rk_gpio_write_bit(sc, RK_GPIO_INTEN, pin, 0);
RK_GPIO_UNLOCK(sc);
return (EINVAL);
}
rk_gpio_write_bit(sc, RK_GPIO_DEBOUNCE, pin, 1);
rk_gpio_write_bit(sc, RK_GPIO_INTMASK, pin, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTEN, pin, 1);
RK_GPIO_UNLOCK(sc);
return (0);
}
static int
rk_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
struct resource *res, struct intr_map_data *data)
{
struct rk_gpio_softc *sc = device_get_softc(dev);
struct rk_pin_irqsrc *irqsrc;
irqsrc = (struct rk_pin_irqsrc *)isrc;
if (isrc->isrc_handlers == 0) {
irqsrc->mode = GPIO_INTR_CONFORM;
RK_GPIO_LOCK(sc);
rk_gpio_write_bit(sc, RK_GPIO_INTEN, irqsrc->irq, 0);
rk_gpio_write_bit(sc, RK_GPIO_INTMASK, irqsrc->irq, 0);
rk_gpio_write_bit(sc, RK_GPIO_DEBOUNCE, irqsrc->irq, 0);
RK_GPIO_UNLOCK(sc);
}
return (0);
}
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
static device_method_t rk_gpio_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, rk_gpio_probe),
DEVMETHOD(device_attach, rk_gpio_attach),
DEVMETHOD(device_detach, rk_gpio_detach),
/* GPIO protocol */
DEVMETHOD(gpio_get_bus, rk_gpio_get_bus),
DEVMETHOD(gpio_pin_max, rk_gpio_pin_max),
DEVMETHOD(gpio_pin_getname, rk_gpio_pin_getname),
DEVMETHOD(gpio_pin_getflags, rk_gpio_pin_getflags),
DEVMETHOD(gpio_pin_getcaps, rk_gpio_pin_getcaps),
DEVMETHOD(gpio_pin_setflags, rk_gpio_pin_setflags),
DEVMETHOD(gpio_pin_get, rk_gpio_pin_get),
DEVMETHOD(gpio_pin_set, rk_gpio_pin_set),
DEVMETHOD(gpio_pin_toggle, rk_gpio_pin_toggle),
DEVMETHOD(gpio_pin_access_32, rk_gpio_pin_access_32),
DEVMETHOD(gpio_pin_config_32, rk_gpio_pin_config_32),
DEVMETHOD(gpio_map_gpios, rk_gpio_map_gpios),
Add interrupt handling to rk_gpio driver.
2022-08-20 06:09:49 +00:00
/* Interrupt controller interface */
DEVMETHOD(pic_map_intr, rk_pic_map_intr),
DEVMETHOD(pic_setup_intr, rk_pic_setup_intr),
DEVMETHOD(pic_teardown_intr, rk_pic_teardown_intr),
Add support for RK3288 into existing RockChip drivers. This patch ensures only minimal level of compatibility necessary to boot on RK3288 based boards. GPIO and pinctrl interaction, missing in current implementation, will be improved by own patch in the near future. MFC after: 2 weeks MFC with: r351452
2019-08-27 09:20:01 +00:00
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, rk_gpio_get_node),
arm64: rockchip: Add gpio controller driver Add a driver that match on 'rockchip,gpio-bank', this compatible string is found on almost all RockChip SoC so this driver is compatible with almost all of the RockChip SoCs. The only features missing for this driver are : - Interrupts support - Debouncing
2018-04-26 21:44:00 +00:00
DEVMETHOD_END
};
static driver_t rk_gpio_driver = {
"gpio",
rk_gpio_methods,
sizeof(struct rk_gpio_softc),
};
Add support for RK3288 into existing RockChip drivers. This patch ensures only minimal level of compatibility necessary to boot on RK3288 based boards. GPIO and pinctrl interaction, missing in current implementation, will be improved by own patch in the near future. MFC after: 2 weeks MFC with: r351452
2019-08-27 09:20:01 +00:00
/*
* GPIO driver is always a child of rk_pinctrl driver and should be probed
* and attached within rk_pinctrl_attach function. Due to this, bus pass order
* must be same as bus pass order of rk_pinctrl driver.
*/
arm64 rockchip: Remove unused devclass arguments to DRIVER_MODULE.
2022-05-09 21:26:45 +00:00
EARLY_DRIVER_MODULE(rk_gpio, simplebus, rk_gpio_driver, 0, 0,
BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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