2016-05-17 07:09:24 +00:00
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/*
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Broadcom B43 wireless driver
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N-PHY core code.
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Copyright (c) 2008 Michael Buesch <m@bues.ch>
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Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
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Copyright (c) 2016 Adrian Chadd <adrian@FreeBSD.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
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Boston, MA 02110-1301, USA.
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*/
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/*
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* $FreeBSD$
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*/
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#ifndef __IF_BWN_PHY_N_CORE_H__
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#define __IF_BWN_PHY_N_CORE_H__
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struct bwn_mac;
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enum b43_nphy_spur_avoid {
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BWN_SPUR_AVOID_DISABLE,
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BWN_SPUR_AVOID_AUTO,
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BWN_SPUR_AVOID_FORCE,
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};
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/*
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* TODO: determine whether center_freq is the primary
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* channel centre frequency or the actual centre centre
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* frequency (eg radio tuning.) It /looks/ like it's
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* actual channel centre.
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*/
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struct bwn_chanspec {
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uint16_t center_freq;
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/* This is HT40U, HT40D, HT20, no-HT 20, etc */
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bwn_chan_type_t channel_type;
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};
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struct bwn_phy_n_iq_comp {
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int16_t a0;
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int16_t b0;
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int16_t a1;
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int16_t b1;
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};
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struct bwn_phy_n_rssical_cache {
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uint16_t rssical_radio_regs_2G[2];
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uint16_t rssical_phy_regs_2G[12];
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uint16_t rssical_radio_regs_5G[2];
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uint16_t rssical_phy_regs_5G[12];
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};
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struct bwn_phy_n_cal_cache {
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uint16_t txcal_radio_regs_2G[8];
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uint16_t txcal_coeffs_2G[8];
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struct bwn_phy_n_iq_comp rxcal_coeffs_2G;
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uint16_t txcal_radio_regs_5G[8];
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uint16_t txcal_coeffs_5G[8];
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struct bwn_phy_n_iq_comp rxcal_coeffs_5G;
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};
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struct bwn_phy_n_txpwrindex {
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int8_t index;
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int8_t index_internal;
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int8_t index_internal_save;
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uint16_t AfectrlOverride;
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uint16_t AfeCtrlDacGain;
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uint16_t rad_gain;
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uint8_t bbmult;
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uint16_t iqcomp_a;
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uint16_t iqcomp_b;
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uint16_t locomp;
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};
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struct bwn_phy_n_pwr_ctl_info {
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uint8_t idle_tssi_2g;
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uint8_t idle_tssi_5g;
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};
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struct bwn_phy_n {
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uint8_t antsel_type;
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uint8_t cal_orig_pwr_idx[2];
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uint8_t measure_hold;
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uint8_t phyrxchain;
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uint8_t hw_phyrxchain;
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uint8_t hw_phytxchain;
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uint8_t perical;
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uint32_t deaf_count;
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uint32_t rxcalparams;
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bool hang_avoid;
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bool mute;
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uint16_t papd_epsilon_offset[2];
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int32_t preamble_override;
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uint32_t bb_mult_save;
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bool gain_boost;
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bool elna_gain_config;
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bool band5g_pwrgain;
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bool use_int_tx_iq_lo_cal;
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bool lpf_bw_overrode_for_sample_play;
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uint8_t mphase_cal_phase_id;
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uint16_t mphase_txcal_cmdidx;
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uint16_t mphase_txcal_numcmds;
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uint16_t mphase_txcal_bestcoeffs[11];
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bool txpwrctrl;
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bool pwg_gain_5ghz;
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uint8_t tx_pwr_idx[2];
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int8_t tx_power_offset[101];
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uint16_t adj_pwr_tbl[84];
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uint16_t txcal_bbmult;
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uint16_t txiqlocal_bestc[11];
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bool txiqlocal_coeffsvalid;
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struct bwn_phy_n_txpwrindex txpwrindex[2];
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struct bwn_phy_n_pwr_ctl_info pwr_ctl_info[2];
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struct bwn_chanspec txiqlocal_chanspec;
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struct bwn_ppr tx_pwr_max_ppr;
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uint16_t tx_pwr_last_recalc_freq;
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int tx_pwr_last_recalc_limit;
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2018-02-05 23:38:15 +00:00
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uint8_t tsspos_2g;
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2016-05-17 07:09:24 +00:00
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uint8_t txrx_chain;
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uint16_t tx_rx_cal_phy_saveregs[11];
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uint16_t tx_rx_cal_radio_saveregs[22];
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uint16_t rfctrl_intc1_save;
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uint16_t rfctrl_intc2_save;
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uint16_t classifier_state;
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uint16_t clip_state[2];
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enum b43_nphy_spur_avoid spur_avoid;
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bool aband_spurwar_en;
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bool gband_spurwar_en;
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bool ipa2g_on;
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struct bwn_chanspec iqcal_chanspec_2G;
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struct bwn_chanspec rssical_chanspec_2G;
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bool ipa5g_on;
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struct bwn_chanspec iqcal_chanspec_5G;
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struct bwn_chanspec rssical_chanspec_5G;
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struct bwn_phy_n_rssical_cache rssical_cache;
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struct bwn_phy_n_cal_cache cal_cache;
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bool crsminpwr_adjusted;
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bool noisevars_adjusted;
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};
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extern bwn_txpwr_result_t bwn_nphy_op_recalc_txpower(struct bwn_mac *mac, bool ignore_tssi);
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extern int bwn_nphy_op_allocate(struct bwn_mac *mac);
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2018-02-05 23:38:15 +00:00
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extern int bwn_nphy_op_prepare_structs(struct bwn_mac *mac);
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2016-05-17 07:09:24 +00:00
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extern void bwn_nphy_op_free(struct bwn_mac *mac);
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extern int bwn_nphy_op_init(struct bwn_mac *mac);
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extern void bwn_nphy_op_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask, uint16_t set);
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extern uint16_t bwn_nphy_op_radio_read(struct bwn_mac *mac, uint16_t reg);
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extern void bwn_nphy_op_radio_write(struct bwn_mac *mac, uint16_t reg, uint16_t value);
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extern void bwn_nphy_op_software_rfkill(struct bwn_mac *mac, bool blocked);
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extern void bwn_nphy_op_switch_analog(struct bwn_mac *mac, bool on);
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extern int bwn_nphy_op_switch_channel(struct bwn_mac *mac, unsigned int new_channel);
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extern unsigned int bwn_nphy_op_get_default_chan(struct bwn_mac *mac);
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#endif /* __IF_BWN_PHY_N_CORE_H__ */
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