aicasm_gram.y:
Use a direct move from allzeros to emulate a
mvi of 0.
aicasm_insformat.h:
sync $Id$
aicasm_symbol.c:
Minor header change.
Approved by: re (blanket)
alpha. This will take the file out of sync with the private version
that we maintain, but alpha tinderbox has been broken for too long.
Tested on: i386, sparc64, alpha
aic79xx.c:
o Remove redundant ahd_update_modes() call.
o Correct panic in diagnostic should state corruption cause
the SCB Id to be invalid during a selection timeout.
o Add workaround for missing BUSFREEREV feature in Rev A silicon.
o Corect formatting nits.
o Use register pretty printing in more places.
o Save and restore our SCB pointer when updating the waiting queue
list for an "expected" LQ-out busfree.
o In ahd_clear_intstat, deal with the missing autoclear in the
CLRLQO* registers.
o BE fixup in a diagnostic printf.
o Make sure that we are in the proper mode before disabling
selections in ahd_update_pending_scbs.
o Add more diagnostics.
o task_attribute_nonpkt_tag -> task_attribute: we don't need a
nonpkt_tag field anymore for allowing all 512 SCBs to be
used in non-packetized connections.
o Negotiate HOLD_MCS to U320 devices.
o Add a few additional mode assertions.
o Restore the chip mode after clearing out the qinfifo so that
code using ahd_abort_scbs sees a consistent mode.
o Simplify the DMA engine shutdown routine prior to performing
a bus reset.
o Perform the sequencer restart after a chip reset prior to
setting up our timer to poll for the reset to be complete.
On some OSes, the timer could actually pre-empt us and order
is important here.
o Have our "reset poller" set the expected mode since there is
no guarantee of what mode will be in force when we are called
from the OS timer.
o Save and restore the SCB pointer in ahd_dump_card_state(). This
routine must not modify card state.
o Ditto for ahd_dump_scbs().
aic79xx.h:
o Add a few more chip bug definitions.
o Align our tag on a 32bit boundary.
aic79xx.reg:
aic79xx.seq:
o Start work on removing workarounds for Rev B.
o Use a special location in scratch from for stroring
our SCBPTR during legacy FIFO allocations. This corrects
problems in mixed packetized/non-packetized configurations
where calling into a FIFO task corrupted our SCBPTR.
o Don't rely on DMA priority to guarantee that all data in
our FIFOs will flush prior to a command completion notification
going out of the command channel. We've never seen this assumption
fail, but better safe than sorry.
o Deal with missing BUSFREEREV feature in H2A.
o Simplify disconnect list code now that the list will always
have only a single entry.
o Implement the AHD_REG_SLOW_SETTLE_BUG workaround.
o Swith to using "REG_ISR" for local mode scratch during
our ISR.
o Add a missing jmp to the data_group_dma_loop after our
data pointers have been re-initialized by the kernel.
o Correct test in the bitbucket code so that we actually
wait for the bitbucket to complete before signaling the
kernel of the overrun condition.
o Reposition pkt_saveptrs to avoid a jmp instruction.
o Update a comment to reflect that the code now waits for
a FIFO to drain prior to issuing a CLRCHN.
aic79xx_inline.h:
o Remove unused untagged queue handling code.
o Don't attempt to htole64 what could be a 32bit value.
aic79xx_pci.c:
o Set additional bug flags for rev A chips.
This ensures that we don't enter our interrupt handler until
all OSM components it might reference have been fully initialized
during attach.
Remove vestiges of untagged queue handling.
Add hints to ahd_get_scb() so it knows what type of SCB collision
management to perform for each new transaction.
Properly disable/enable IU_REQ with changes in tagged queuing and
disconnection settings passed in by CAM.
Uninline some routines that are just too big to be inlined.
Add some helper macros for SCB ID collision management.
Use a hardware SCB rather than a full SCB for the "next
SCB to queue" sentinal.
Update for new "high SCBID bit" qoutfifo delivery scheme.
If interrupts are disabled on the card, don't bother running
our interrupt handler. Our handler was called due to a shared
interrupt, and the card's interrupts are explicitly disabled
to prevent entry into our interrupt handler.
functions for register pretty-printing.
Implement "top bit of SCBID is valid bit" qoutfifo delivery scheme.
"the the" -> "the".
Remove old and never used tag collision chain handling in the
sequencer. Tag collisions are never allowed to get as far as
on the controller.
Simplify busy target table handling routines.
Update comments to reflect reality.
Add support for catching more protocol violations.
Correct a bug in data fifo handling in mixed packetized and
non-packetized environments. SG_STATE must be cleared even
if an SG fetch is not in progress at the time of FIFO shutdown
or we may confuse the non-packetized transaction idle-loop.
busy target table addressing changes, our qoufifo scheme,
and long lun support.
Drop bus reset hold delay to 25us.
Remove chip workarounds for revisions that never went to
production.
Add aic7901A identification information.
Remove untagged queue logic.
Push protocol violation handler to its own routine. We now
properly detect and recovery from the following target induced
protocol violations:
o Unexpected or invalid non-packetized Relesection
o Command complete with no status message
o Good Status after incomplete cdb transfer
Add an SCB collision avoidance algorithm that allows us to
use all 512 SCBs for non-packetized operations. There is
still the possibility of running out of SCBs with non-colliding
tag identifiers, but the algorithm ensures that the stall will
be rare and short lived.
Convert to a read-only algorithm for validing entries in the
qoufifo. The sequencer now toggles the high bit of the SCB
identifier on each wrap around of the qinfifo. If the high
bit doesn't match the expected value for this pass of the
qoufifo, the entry is not valid. This has the benefit of
working on machines that have large granularity cache write
back semantics without requiring any additional memory.
Remove lots of code related to untagged SCB queues. Since
these controllers can keep a fully busy target table, we
will never have untagged SCB queues.
Lots of improvements to diagnostic logging.
Clarify some comments.
Don't clear BUSFREE interrupt enable in SIMODE1 in the SELTO
handler. Just clearing the interrupt status is sufficient and
this avoids the chance of disabling busfree detection in connection
that occurs while we are handling the busfree interrupt.
Clear all possible interrupt sources when handling a busfree
interrupt. The hardware clears some but not all of them.
Don't panic if we get into the default SCSIINT handler.
Dump the card state and clear all interrupt sources in the
hope that we can continue.
LASTPHASE != PREVPHASE. Use the correct PREVPHASE for testing
against values in the PERRDIAG register.
According to SPI4, the bus free that is required after certain
PPR negotiations will only occur at the end of all message phases.
Handle the bus free if it occurs after a transaction in either
the message-in or message-out phases. The busfree can also occur
if the status of IU_REQ changes due to a WDTR or SDTR message.
We now set the expect busfree flag in ahd_set_syncrate so that
it works regardless of message type.
Correct a problem with missing certain busfree events. The
chip supports single-stepping even if a SCSIINT is pending.
This obviates the need to clear all of the SCSI interrupt enables
prior to single stepping. Since ENBUSFREE can only be disabled
manually and not re-enabled, avoiding touching this bit in the
single-step case yields reliable bus free detection.
Enhance ahd_clear_intstat to clear all SCSIINT sources.
Only use ahd_update_pending_scbs() if we are active on the
bus. We cannot modify the "MK_MESSAGE" bits on SCBs in the
execution queue if a selection might be in process since
the sequencer uses this bit to detect PPR negotiation to
a target with an outstanding IU_REQ agreement.
Allocate the SCB delivery mechansim's sentinal SCB specially
so we don't waste a valid SCB for this task.
Move tranceive state settle logic to ahd_chip_init() since
this needs to occur after every chip reset, not just the
chip reset that happens during primary driver initialization.
Correct a bug with transmitting lun information in packetized
connections.
Restrict busy target table operations to the range of luns
that can be used for non-packetized connections. Larger luns
can only be accessed in packetized mode.
Correct a busy target table addressing bug.
Be more careful about how we shutdown the DMA engines during
bus reset events.
Only freeze the SIMQ once regardless of the number of bus
reset events that occur while we are polling for the resets
to stop.
Don't rely on the sequencer remaining paused() during our
reset poll. It is safe for the sequencer to run during this
time, and many callers to the bus reset code would need to
be modified to make this assumption universally true.
Even if we are not going to clobber SCB state when an auto-request
sense SCB has a check condition, we must still unfreeze the queue.
Re-arrange the BAD STATUS handler to handle this case appropriately.
Modify the SCB download size depending on whether long luns are
being stored in the SCB.
Add ahd_print_register() for pretty printing register diagnostics.
Don't trust that the flexport logic to detect the presence of
a seeprom is available. It may not be on some motherboard
implementations.
"the the" -> "the"
our interrupt handler. Our handler was called due to a shared
interrupt, and the card's interrupts are explicitly disabled
to prevent entry into our interrupt handler.
Set the AHC_LSCBS_ENABLED softc flag appropriately.
Convert to using softc storage for our seeprom data.
Break seeprom parsing out into a separate routine.
Change our policy in regards to AHC_SPIOCAP so that we
will allow auto-termination to take place on some aic7855
based cards.
Remove initialized but never really used variables.
Use "offset == 0" not "period == 0" to denote async trasnfers.
Implement TARG_IMMEDIATE_SCB non-disconnected target mode
SCB delivery scheme.
In our timeout handler, don't rely on the phase already being
set to denote an active connection. IDENTIFY_SEEN is more
than sufficient.
Verify that the softc passed in ahc_detach is still known
to the driver before blindly using it.
functions for register pretty-printing.
Only clear SELDO once we've recorded enough information for
the host to understand that the connection is valid. The
host uses the SELDO status as a handshake to close this
race window.
Correct a bug in target mode handling of non-disconnected
transactions. The host would indicate the correct SCB to
DMA by setting the SCB id in the currently selected hardware
SCB. Unfortunately, we would then immediated allocate a
hardware SCB which, depending on the access patern might not
be the same hardware SCB that the host setup for us. Avoid
this by having the host put the SCBID into scratch ram.
Document the SXFRCTL2 register found on U2 and U160 controllers.
Overload the MWI_RESIDUAL field for use as the SCB to be downloaded
for "immediate" (or those without the disconnect privledge)
transactions.
Add scratch ram locations for the 274X that give us a bit more
information including whether to enable extended translation.
value slipped in from a debugging session.
Add AHC_LSCBS_ENABLED and AHC_SCB_CONFIG_USED ahc_flags which
allow for some code to move to the core.
Remove extern for ahc_syncrates[]. The OSMs no longer need
direct access to this array.
Add serial eeprom field to the ahc softc.
Prototype ahc_search_untagged_queues() and ahc_print_register().
Convert to AHC_SHOW_XXX debug option format.
Switch to using the same AHC_SHOW_XXX format as the ahd driver.
Always give the target a MSG_INITIATOR_DET_ERR for unexpected
DT or ST phase errors.
Add AHC_SHOW_SELTO diagnostics.
Force renegotiation whenever an unexpected bus free occurs
to rule out a negotiation mismatch as the cause for the error.
Use "offset != 0" as an intenal indicator of "async" rather than
using a period of 0.
In ahc_fetch_devinfo(), correct a bug in getting "our id" as
target. We weren't looking at all the SEQ_FLAGS that indicate
that we are still in a selected rather than reselected state.
Add support for the AHC_SHOW_MESSAGES debugging option.
If ahc_parse_msg() tells us to terminate the message loop,
do so without acking the message. The message may be one
that the sequencer needs to handle on its own.
In ahc_parse_msg() return MSGLOOP_TERMINATED for all messages
the sequencer handles.
Allocate storage for, and track, seeprom contents in our softc.
Touch all SCB bytes to avoid parity errors should one of our
debugging routines read an otherwise uninitiatlized byte.
S/G lists must be 8 byte aligned. Reflect this in our DMA tag.
"the the" -> "the" in a comment
When pausing the card to perform error recovery, ensure that we
are not in the process of being selected or have just been selected
but have not yet handled that selection. This leaves only one other
race window, in the command complete handler, that needs to be fixed
to make recovery 100% bullet proof.
Convert a few straglers from bsd u_intX_t to inttypes uintX_t.
Remove unused variables.
Split out searching of the untagged holding queues to its own
routine. In certain recovery scenarios, we want to just
remove entries in the untagged queue without touching related
transactions that are in the QINFIFO or WAITING queues that are
searched by ahc_search_qinfifo().
Add an implementation of the ahc_print_register() routine which
"pretty prints" registers. The extra bloat in the form of string
tables for this feature is controlled by the AHC_REG_PRETTY_PRINT
option.
Fix a few bugs in ahc_enable_lun() that could prevent controllers
lacking the multiple-target-id feature from changing "our id" on
the fly. Add a large comment to this section while I'm here
describing the restrictions on "id switching".
Honor the extended translation setting for EISA cards now that
I've determined where this information is kept.
Defer card interrupt enabling to the OSM since it may have
some initialization to perform that must occur before interrupts
can be enabled.
ahc_eisa.c:
ahc_pci.c:
Conform to new aic7xxx IRQ API.
Adapt to aic7xxx_freebsd -> aic7xxx_osm changes.
aic7770.c:
Disable card generated interrupt early in our probe for
"extra safety"
Commonize some seeprom code with the PCI side of the driver.
aic7xxx.c:
Correctly initialize a few scratch ram locations during
a sequencer restart. This avoids spurious sequencer ram
parity errors in some configurations.
Include the softc in ahc_update_residual calls. We need it
for some diagnostics in this code path.
Flag a data overrun on an auto-request sense failure as a
CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR.
Force a renegotiation after noticing a parity error. This
covers targets that lose our negotiation settings but don't
bother to give us a unit attention condition. This can happen
if a target fails during a reselection of us during a cable
pull.
Convert some code to using constants.
Fix some typos.
Correct target mode message loop handling. ahc_clear_msg_state
was not clearing the "need to go to message out phase" bit once
our loop was over.
Simplify some abort handling code.
Include tag information in target mode immediate notify events.
When shutting down EISA controllers, don't EISA BIOS settings in
the high portions of scratch ram. This fixes warm boot issues on
some systems.
Save a bit of space by only allocating the SCBs that we can use.
Avoid some code paths in ahc_abort_scbs() if we are currently
acting as a target.
Correctly cleanup stranded SCBs in the card's SCB array. These
are SCBs who's mapping has already been torn down by code that
aborted the SCB by seeing it in another list first.
Add a comment about some potential bus reset issues for target
mode on Twin (EISA only) controllers.
aic7xxx.h:
Cleanup the hardware scb definitions a bit.
Allocate a ful 256 byte scb mapping index. This simplifies
the lookup code since the table covers all possible (and potentially
bogus) values.
Make AHC_DEBUG work again.
aic7xxx.reg:
Updates to hardware SCB definition.
New definitions for target mode fixes.
aic7xxx.seq:
In target mode, initialize SAVED_LUN just after we receive
the identify message. It may be required in the error recovery
path when a normal cdb packet (includes lun) is not sent up to
the host for processing.
Respond to irregular messages during a selection in target mode.
Defer looking for space for a cdb packet until we are about to
enter command phase. We want to be able to handle irregular messages
even if we would otherwise return QUEUE_FULL or BUSY.
Add support for sending Ignore Wide Residue messages as a target.
In the disable disconnect case in target mode, set our transfer
rate correctly once data are availble.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Add the ability to write and erase the seeprom.
aic7xxx_inline.h:
Correct Big Endian handling of large cdb sizes (> 12 bytes).
Adaptec to changes in the calc_residual API.
Correct a target mode bug where we always attempted to service
the input queue even if no progress could be made due to lack
of ATIOs.
aic7xxx_osm.c:
Adaptec to new IRQ mapping API. The new API allows the core
to only enable our IRQ mapping once it is safe (sufficient
initialization) to do so.
Slap bootverbose protection around some diagnostics.
Only attempt DT phases if we are wide.
aic7xxx_osm.h:
Enable big endian support.
Adjust for IRQ API change.
aic7xxx_pci.c:
Be more careful about relying on subvendor 9005 information.
We now only trust it for HBAs. This should allow the driver
to attach to some MBs where the subvendor/device information
does not follow the Adaptec spec.
Only enable interrupts on the card once we are fully setup.
Disable external SCB ram usage on the aic7895. I have not
been able to make it 100% reliable.
Adjust to seeprom routines being properly prefixed with "ahc".
Fix a few bugs in the external SCB ram probing routine. We
need to clear any parity errors we've triggered during the
probe to avoid future, fatal, interrupts.
If we detect an invalid cable combination, pretent there are
no cable at all. This will enable all of the terminators
which is probably the safest configuration we can "guess".
MFC after: 4 days
should be initialized to 0 for PCI adapters which was a side-effect of
the memset in ahc_alloc(). EISA/VL adapters require our unpause value to
include the "levelness" of our interrupt.
This change allows EISA adapters to work again.
PR: 29689, 29471
Correct an off by one in our critical section handling.
SEQADDR always reads the next instruction to execute,
so we must subtract one from its value before making
comparisons with entries in the critical section table.
Print a few additional registers whenever we dump
card state.
Show the SCB_CONTROL and SCB_TAG values for all pending
SCBs in card SCB ram when dumping card state.
aic7xxx.seq:
Fix a bug introduced while optimizing the SDPTR path.
We would ack the SDPTR message twice on Ultra2 or better
chips if it occurred after all data had been transferred
for a transaction.
Change our workaround for the PCI2.1 retry bug on some
chips. Although the previous workaround was logically
correct, its faster method of draining the FIFO seemed
to occassionally confuse the FIFO state. We now drain
the FIFO at half the speed which avoids the problem.
aic7xxx_pci.c:
Chips with the PCI 2.1 retry bug can't handle a 16byte
cachesize. If the cachesize is set to 16bytes, drop
it to 0.
If bus_dma will give us addresses > 32 bits, setup our dma tag
to accept up to 39bit addresses.
aic7770.c:
Update the softc directly rather than use an intermediate
"probe_config" structure.
aic7xxx.c:
Complete core work to support 39bit addresses for bulk data
dma operations. Controller data structures still must reside
under the 4GB boundary to reduce code/data size in the sequencer
and related data structures. This has been tested under Linux
IA64 and will be tested on IA64 for FreeBSD as soon as our port
can run there.
Add bus dmamap synchronization calls around manipulation of
all controller/kernel shared host data structures.
Implement data pointer reinitialation for a second data phase
in a single connection in the kernel rather than bloat the
sequencer. This is an extremely rare operation (does it ever
happen?) and the sequencer implementation was flawed for some
of the newest chips.
Don't ever allow our target role to initiate a PPR. This
is forbidden by the SCSI spec.
Add a few missing endian conversions in the ignore wide pointers
code. The core has been tested on the PPC under Linux and should
work for FreeBSD PPC. As soon as I can test the OSM layer for
FreeBSD PPC, I will.
Move some of ahc_softc_init() into ahc_alloc() now that the
probe_config structure is gone.
Add a 4GB boundary condition on all of our dma tags. 32bit
DAC under PCI only works on a single 4GB "page". Although
we can cross 4GB on a true 64bit bus, the card won't always
be installed in one and we can save code space and cost in
implementing high address support by assuming the high DWORD
address will never change.
Add diagnostics to ahc_search_qinfifo().
Correct a target mode issue with bus resets. To avoid an
interrupt storm from a malicious third party holding the
reset line, the sequencer would defer re-enabling the reset
interrupt until either a select-out or select-in. Unfortunately,
the select-in enable bit is cleared by a bus reset, so a second
reset will render the card deaf to an initiator's attempts to
contact it. We now re-enable bus reset interrupts immediately
if the target role is enabled.
aic7xxx.h:
Remove struct ahc_probe_config.
SCB's now contain a pointer to the sg_map_node so we can perfrom
bus dma sync operations on the SG list prior to queuing a command.
aic7xxx.reg:
Register the Perforce ID for this file with the VERSION keyword
so it is printed in generated files.
Add the DSCOMMAND1 register which is used to access the high
DWORD of address bits.
Add the data pointer reinitialize sequencer interrupt code.
aic7xxx.seq:
Register the Perforce ID for this file with the VERSION keyword
so it is printed in generated files.
Remove code to re-enable the bus reset interrupt after a select-in.
In target mode we cannot defer this operation as ENSELI is cleared
by a bus reset.
Complete 39bit support.
Generate a sequencer inteerrupt rather than handle the data
pointers re-initialitation in the sequencer.
Inline the "seen identify" assertion to save a few cycles.
Short circuit the update of our residual data if we have
fully completed a transfer. The residual is correct from
our last S/G load operation.
Short circuit full SDPTR processing if the residual is 0.
Just mark the transfer as complete.
aic7xxx_93cx6.c:
Synchronize perforce IDs.
aic7xxx_freebsd.c:
Complete untested 39bit support.
Add missing endia conversions.
Clear our residuals prior to starting a command. The
update residual code in the core only sets the residual
if there is one.
aic7xxx_freebsd.h:
Modeify ahc_dmamap_sync() macros to take an offset and a length.
This is how sync operations are performed in NetBSD, and we should
update our bus dma implementation to match.
aic7xxx_inline.h:
Add data structure synchronization helper functions.
Fix a bug in ahc_intr() where we would not clear our unsolicited
interrupt counter after running our PCI interrupt handler. This
may have been the cause of the spurious PCI interrupt messages.
aic7xxx_pci.c:
Adjust for loss of probe_config structure.
Guard against bogus 9005 subdevice information as seen on some
IBM MB configurations.
Add 39bit address support.
MFC after: 10 days
and outputing them in generated files.
Fixed a few other scanner bugs that for some reason didn't show up until
these modifications were made.
MFC after: 10 days
ahc_pci.c:
Prepare for making ahc a module by adding module dependency
and version info.
aic7770.c:
Remove linux header ifdefs. The headers are handled differently
in Linux where local includes (those using "'s instead of <>'s)
are allowed.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
aic7xxx.c:
Remove linux header ifdefs.
current->curr to avoid Linux's use of current as a
#define for the current task on some architectures.
Add a helper function, ahc_assert_atn(), for use in
message phases we handle manually. This hides the fact
that U160 chips with the expected phase matching disabled
need to have SCSISIGO updated differently.
if (ahc_check_residual(scb) != 0)
ahc_calc_residual(scb);
else
ahc_set_residual(scb, 0);
becomes:
ahc_update_residual(scb);
Modify scsi parity error (or CRC error) handling to
reflect expected phase being disabled on U160 chips.
Move SELTO handling above BUSFREE handling so we can
use the new busfree interrupt behavior on U160 chips.
In ahc_build_transfer_msg() filter the period and ppr_options
prior to deciding whether a PPR message is required.
ppr_options may be forced to zero which will effect our
decision.
Correct a long standing but latent bug in ahc_find_syncrate().
We could choose a DT only rate even though DT transfers were
disabled. In the CAM environment this was unlikely as CAM
filters our rate to a non-DT value if the device does not
support such rates.
When displaing controller characteristics, include the
speed of the chip. This way we can modify the transfer
speed based on optional features that are enabled/disabled
in a particular application.
Add support for switching from fully blown tagged queing
to just using simple queue tags should the device reject
an ordered tag.
Remove per-target "current" disconnect and tag queuing
enable flags. These should be per-device and are not
referenced internally be the driver, so we let the OSM
track this state if it needs to.
Use SCSI-3 message terminology.
aic7xxx.h:
The real 7850 does not support Ultra modes, but there are
several cards that use the generic 7850 PCI ID even though
they are using an Ultra capable chip (7859/7860). We start
out with the AHC_ULTRA feature set and then check the
DEVSTATUS register to determine if the capability is really
present.
current -> curr
ahc_calc_residual() is no longer static allowing it to
be called from ahc_update_residual() in aic7xxx_inline.h.
Update some serial eeprom definitions for the latest
BIOS versions.
aic7xxx.reg:
Add a combined DATA_PHASE mask to the SCSIPHASE register
definition to simplify some sequencer code.
aic7xxx.seq:
Take advantage of some performance features available only
on the U160 chips. The auto-ack feature allows us to ack
data-in phases up to the data-fifo size while the sequencer
is still setting up the DMA engine. This greatly reduces
read transfer latency and simplifies testing for transfer
complete (check SCSIEN only). We also disable the expected
phase feature, and enable the new bus free interrupt behavior,
to avoid a few instructions.
Re-arrange the Ultra2+ data phase handling to allow us to
do more work in parallel with the data fifo flushing on a
read.
On an SDTR, ack the message immediately so the target can
prepare the next phase or message byte in parallel with
our work to honor the message.
aic7xxx_93cx6.c:
Remove linux header ifdefs.
aic7xxx_freebsd.c:
current -> curr
Add a module event handler.
Handle tag downgrades in our ahc_send_async() handler.
We won't be able to downgrade to "basic queuing" until
CAM is made aware of this queuing type.
aic7xxx_freebsd.h:
Include cleanups.
Define offsetof if required.
Correct a few comments.
Update prototype of ahc_send_async().
aic7xxx_inline.h:
Implement ahc_update_residual().
aic7xxx_pci.c:
Remove linux header ifdefs.
Correct a few product strings.
Enable several U160 performance enhancing features.
Modify Ultra capability determination so we will enable
Ultra speeds on devices with a 7850 PCI id that happen
to really be a 7859 or 7860.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
immediate value or the accumulator. 0 is the chip's internal
representation for the accumulator, and so 0 is an invalid immediate value
when the accumulator can also be specified as an argument.
Submitted by: gibbs
aic7xxx_pci.c:
Enable board generation of interrupts only once our handler is
in place and all other setup has occurred.
aic7xxx.c:
More conversion of data types to ahc_* names. tmode_tstate and
tmode_lstate are the latest victims.
Clean up the check condition path by branching early rather
than indenting a giant block of code.
Add support for target mode initiated sync negotiation.
The code has been tested by forcing the feature on for
all devices, but for the moment is left inaccesible until
a decent mechanism for controlling the behavior is complete.
Implementing this feature required the removal of the
old "target message request" mechanism. The old method
required setting one of the 16 bit fields to initiate
negotiation with a particular target. This had the nice
effect of being easy to change the request and have it
effect the next command. We now set the MK_MESSAGE bit
on any new command when negotiation is required. When
the negotiation is successful, we walk through and clean
up the bit on any pending commands. Since we have to walk
the commands to reset the SCSI syncrate values so no additional
work is required. The only drawback of this approach is that
the negotiation is deferred until the next command is queued to
the controller. On the plus side, we regain two bytes of
sequencer scratch ram and 6 sequencer instructions.
When cleaning up a target mode instance, never remove the
"master" target mode state object. The master contains
all of the saved SEEPROM settings that control things like
transfer negotiations. This data will be cloned as the
defaults if a target mode instance is re-instantiated.
Correct a bug in ahc_set_width(). We neglected to update
the pending scbs to reflect the new parameters. Since
wide negotiation is almost always followed by sync
negotiation it is doubtful that this had any real
effect.
When in the target role, don't complain about
"Target Initiated" negotiation requests when an initiator
negotiates with us.
Defer enabling board interrupts until after ahc_intr_enable()
is called.
Pull all info that used to be in ahc_timeout for the FreeBSD
OSM into ahc_dump_card_state(). This info should be printed
out on all platforms.
aic7xxx.h:
Add the SCB_AUTO_NEGOITATE scb flag. This allows us to
discern the reason the MK_MESSAGE flag is set in the hscb
control byte. We only want to clear MK_MESSAGE in
ahc_update_pending_scbs() if the MK_MESSAGE was set due
to an auto transfer negotiation.
Add the auto_negotiate bitfield for each tstate so that
behavior can be controlled for each of our enabled SCSI
IDs.
Use a bus interrupt handler vector in our softc rather
than hard coding the PCI interrupt handler. This makes
it easier to build the different bus attachments to
the aic7xxx driver as modules.
aic7xxx.reg:
Remove the TARGET_MSG_REQUEST definition for sequencer ram.
aic7xxx.seq:
Fix a few target mode bugs:
o If MK_MESSAGE is set in an SCB, transition to
message in phase and notify the kernel so that
message delivery can occur. This is currently
only used for target mode initiated transfer
negotiation.
o Allow a continue target I/O to compile without
executing a status phase or disconnecting. If
we have not been granted the disconnect privledge
but this transfer is larger than MAXPHYS, it may
take several CTIOs to get the job done.
Remove the tests of the TARGET_MSG_REQUEST field in scratch ram.
aic7xxx_freebsd.c:
Add support for CTIOs that don't disconnect. We now defer
the clearing of our pending target state until we see a
CTIO for that device that has completed sucessfully.
Be sure to return early if we are in a target only role
and see an initiator only CCB type in our action routine.
If a CTIO has the CAM_DIS_DISCONNECT flag set, propogate
this flag to the SCB. This flag has no effect if we've
been asked to deliver status as well. We will complete
the command and release the bus in that case.
Handle the new auto_negotiate field in the tstate correctly.
Make sure that SCBs for "immediate" (i.e. to continue a non
disconnected transaction) CTIO requests get a proper mapping
in the SCB lookup table. Without this, we'll complain when
the transaction completes.
Update ahc_timeout() to reflect the changes to ahc_dump_card_state().
aic7xxx_inline.h:
Use ahc->bus_intr rather than ahc_pci_intr.
Some of the major changes include:
- The SCSI error handling portion of cam_periph_error() has
been broken out into a number of subfunctions to better
modularize the code that handles the hierarchy of SCSI errors.
As a result, the code is now much easier to read.
- String handling and error printing has been significantly
revamped. We now use sbufs to do string formatting instead
of using printfs (for the kernel) and snprintf/strncat (for
userland) as before.
There is a new catchall error printing routine,
cam_error_print() and its string-based counterpart,
cam_error_string() that allow the kernel and userland
applications to pass in a CCB and have errors printed out
properly, whether or not they're SCSI errors. Among other
things, this helped eliminate a fair amount of duplicate code
in camcontrol.
We now print out more information than before, including
the CAM status and SCSI status and the error recovery action
taken to remedy the problem.
- sbufs are now available in userland, via libsbuf. This
change was necessary since most of the error printing code
is shared between libcam and the kernel.
- A new transfer settings interface is included in this checkin.
This code is #ifdef'ed out, and is primarily intended to aid
discussion with HBA driver authors on the final form the
interface should take. There is example code in the ahc(4)
driver that implements the HBA driver side of the new
interface. The new transfer settings code won't be enabled
until we're ready to switch all HBA drivers over to the new
interface.
src/Makefile.inc1,
lib/Makefile: Add libsbuf. It must be built before libcam,
since libcam uses sbuf routines.
libcam/Makefile: libcam now depends on libsbuf.
libsbuf/Makefile: Add a makefile for libsbuf. This pulls in the
sbuf sources from sys/kern.
bsd.libnames.mk: Add LIBSBUF.
camcontrol/Makefile: Add -lsbuf. Since camcontrol is statically
linked, we can't depend on the dynamic linker
to pull in libsbuf.
camcontrol.c: Use cam_error_print() instead of checking for
CAM_SCSI_STATUS_ERROR on every failed CCB.
sbuf.9: Change the prototypes for sbuf_cat() and
sbuf_cpy() so that the source string is now a
const char *. This is more in line wth the
standard system string functions, and helps
eliminate warnings when dealing with a const
source buffer.
Fix a typo.
cam.c: Add description strings for the various CAM
error status values, as well as routines to
look up those strings.
Add new cam_error_string() and
cam_error_print() routines for userland and
the kernel.
cam.h: Add a new CAM flag, CAM_RETRY_SELTO.
Add enumerated types for the various options
available with cam_error_print() and
cam_error_string().
cam_ccb.h: Add new transfer negotiation structures/types.
Change inq_len in the ccb_getdev structure to
be "reserved". This field has never been
filled in, and will be removed when we next
bump the CAM version.
cam_debug.h: Fix typo.
cam_periph.c: Modularize cam_periph_error(). The SCSI error
handling part of cam_periph_error() is now
in camperiphscsistatuserror() and
camperiphscsisenseerror().
In cam_periph_lock(), increase the reference
count on the periph while we wait for our lock
attempt to succeed so that the periph won't go
away while we're sleeping.
cam_xpt.c: Add new transfer negotiation code. (ifdefed
out)
Add a new function, xpt_path_string(). This
is a string/sbuf analog to xpt_print_path().
scsi_all.c: Revamp string handing and error printing code.
We now use sbufs for much of the string
formatting code. More of that code is shared
between userland the kernel.
scsi_all.h: Get rid of SS_TURSTART, it wasn't terribly
useful in the first place.
Add a new error action, SS_REQSENSE. (Send a
request sense and then retry the command.)
This is useful when the controller hasn't
performed autosense for some reason.
Change the default actions around a bit.
scsi_cd.c,
scsi_da.c,
scsi_pt.c,
scsi_ses.c: SF_RETRY_SELTO -> CAM_RETRY_SELTO. Selection
timeouts shouldn't be covered by a sense flag.
scsi_pass.[ch]: SF_RETRY_SELTO -> CAM_RETRY_SELTO.
Get rid of the last vestiges of a read/write
interface.
libkern/bsearch.c,
sys/libkern.h,
conf/files: Add bsearch.c, which is needed for some of the
new table lookup routines.
aic7xxx_freebsd.c: Define AHC_NEW_TRAN_SETTINGS if
CAM_NEW_TRAN_CODE is defined.
sbuf.h,
subr_sbuf.c: Add the appropriate #ifdefs so sbufs can
compile and run in userland.
Change sbuf_printf() to use vsnprintf()
instead of kvprintf(), which is only available
in the kernel.
Change the source string for sbuf_cpy() and
sbuf_cat() to be a const char *.
Add __BEGIN_DECLS and __END_DECLS around
function prototypes since they're now exported
to userland.
kdump/mkioctls: Include stdio.h before cam.h since cam.h now
includes a function with a FILE * argument.
Submitted by: gibbs (mostly)
Reviewed by: jdp, marcel (libsbuf makefile changes)
Reviewed by: des (sbuf changes)
Reviewed by: ken
In our idle loop, use an or instruction to set PRELOADEN rather
than rewriting the contents of DMAPARAMS to DFCNTRL. The later
may re-enable the DMA engine if the idle loop is called to complete
the preload of at least one segment when a target disconnects on
an S/G segment boundary but before we have completed fetching the
next segment. This correts a hang, usually in message out phase,
when this situation occurs. This bug has been here for a long
time, so the situation is rare, but not impossible to reproduce.
It only affected Ultra2/U160 controllers.
Correct a few comments.
Extra Sanity. Make sure that SCSIEN is also turned off, along with
HDMAEN, at the end of the data phase.
aic7xxx.c:
Correct code that traverses the phase table. A much too quick
push to staticize this structure resulted in non-functional
lookup code. This corrects the printing of the phase where
a timeout occurred.
aic7xxx.reg:
Use FIFOQWDEMP as the name for bit 5 of DFSTATUS just like
the Adaptec data books.
aic7xxx.seq:
Refine the 2.1 PCI retry bug workaround for certain, non-ULTRA2,
controllers. When the DMA of an SCB completes, it can take
some time for HDONE to come true after MREQPEN (PCI memory request
pending) falls. If HDONE never comes true, we are in the hung
state and must manually drain the FIFO. We used to test HDONE for
3 clock cycles to detect this condition. This works on all of the
hardware I can personally test. Some controllers were reported
to take 4 clock cycles, so the last version of this code waited
4 clock cycles. This still didn't work for everyone. To fix this,
I've adjusted the work around so that even if the hardware hasn't
hung, but we run the work-around code, the result is a long winded
way to complete the transfer, rather than a hang.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
Use the target offset rather than the target Id to reference
the untagged SCB array. The offset and id are identical save
in the twin channel case. This should correct several issues
with the 2742T.
Set the user and goal settings prior to setting the current
settings. This allows the async update routine to filter out
intermediate transfer negotiation updates that may be less
than interesting. The Linux OSM uses this to reduce the amount
of stuff printed to the console.
aic7xxx.seq:
Correct an issue with the aic7770 in twin channel mode.
We could continually attempt to start a selection even
though a selection was already occurring on one channel.
This might have the side effect of hanging our selection
or causing us to select the wrong device.
While here, create a separate polling loop for when we
have already started a selection. This should reduce
the latency of our response to a (re)selection. The diffs
look larger than they really are due to some code rearrangement
to optimize out a jmp.
aic7xxx_freebsd.c:
Use the target offset rather than the target Id to reference
the untagged SCB array. The offset and id are identical save
in the twin channel case. This should correct several issues
with the 2742T.
aic7xxx_inline.h:
Get back in sync with perforce revision ID.
aic7xxx_pci.c:
Identify adapters in ARO mode as such.
Ensure that not only the subvendor ID is correct (9005)
but also that the controller type field is valid before
looking at other information in the subdevice id. Intel
seems to have decided that their subdevice id of 8086
is more appropriate for some of their MBs with aic7xxx
parts than Adaptec's sanctioned scheme.
Add an exclusion entry for SISL (AAC on MB based adapters).
Adapters in SISL mode are owned by the RAID controller, so
even if a driver for the RAID controller is not present,
it isn't safe for us to touch them.
register our sub-busses in the reversed order. In the future, we may provide
a hint to CAM on how to order the scans for multi-function adapters that also
set this flag, but trying to do it the "twin channel" way will lead to
a panic.
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
we must also inform the card of this change. Otherwise the sequencer
will traverse a corrupt list of SCBS. The side effects of this problem
were unknown SCBs completing in the qoutfifo or worse yet, panics due
to sequencer interrupts that referenced what, to the kernel, were invalid
SCB ids.
Initialize rid to 0. This doesn't seem to make any difference
(the driver doesn't care what rid it gets and no-one seems to
check rid's value), but follows standard conventions.
Pass in our device_t to ahc_alloc(). We now use device_T
softc storage, so passing NULL results in a panic.
Set the unit number in our softc so that the driver core
can retrieve it.
ahc_pci.c:
Set the unit number in our softc so that the driver core
can retrieve it.
aic7770.c:
Insert our softc into the list of softcs when initialization
is successful.
aic7xxx.c:
Remove a workaround for an aic7895 bug we will never trigger.
Add additional diagnostic info to ahc_dump_card_state().
Always panic the system if a sequencer assertion fails.
AHC_SCB_BTT is a "flag" not a "feature". Check the right
field in the softc.
Replace a hard coded number with a constant.
Guard against looping forever in ahc_pause_and_flushwork().
A hot eject or card failure may make the intstat register
return 0xFF, so limit the number of interrupts we'll process.
Correct the code in ahc_search_qinfifo() that guarantees that
the sequencer will see an abort collision if the qinfifo is
modified when a DMA is in progress. We now do this fixup
after modifying the queue. This guarantees that the HSCB
we place at the head of the queue is not the same as the
old head. Using "next hscb" (guaranteed not to be the
same as the first SCB) before clearing the queue could free
up the original head hscb to be used during a remove operation
placing it again at the head of the qinfifo.
aic7xxx.h:
Reduce the maximum number of outstanding commands to 253 from
254. To handle our output queue correctly on machines that only
support 32bit stores, we must clear the array 4 bytes at a
time. To avoid colliding with a DMA write from the sequencer,
we must be sure that 4 slots are empty when we write to clear
the queue. This reduces us to 253 SCBs: 1 that just completed
and the known three additional empty slots in the queue that
preceed it. Yahoo was able to force this race on one of their
systems. Interrupts were disabled for such a time that the
entire output queue was filled (254 entries complete without
any processing), and our 32bit write to clear the status clobbered
one entry.
Add a feature tag for devices that are removable.
aic7xxx.reg:
Never use the sequencer interrupt value of 0xF0. We need
to guanrantee that an INTSTAT value of 0xFF can only occur
during card failure or a hot-eject.
Align the busy targets table with the begining of scratch
space. This seems to appease a chip bug in the aic7895.
aic7xxx.seq:
Be sure to disable select-out after a bus free event that occurs
early in a selection. If we don't disable select-out, we will
believe that it is enabled even though a new selection will never
occur.
Move the clearing of SELDI to just before a jump. This appeases
another chip bug of the aic7895.
Make the target mode command loop a bit more efficient.
AHC_SCB_BTT is a "flag" not a "feature". Check the right
field in the softc.
Properly cleanup the last SCB we tested against should we
fail to properly find an SCB for a reselection.
Add some additional sequencer debugging code.
aic7xxx_freebsd.c:
Limit the driver to 253 outstanding commands per adapter.
Guard against overflow in timeout handling.
aic7xxx_inline.h:
AHC_SCB_BTT is a "flag" not a "feature". Check the right
field in the softc.
aic7xxx_pci.c:
Set the removable feature for the apa1480 cardbus and the 29160C
Compact PCI card.
Don't report high byte termination information for narrow cards.
Use a PCI read rather than a questionable delay when fetching/setting
termination settings.
hscbs may be traded during error recovery due to the way
we manage the qinfifo. This has the effect of changing the
index to the sense buffer even though the request sense command
references the original buffer. SCBs don't play this swapping
game and so serve as a more consistent reference.
aic7xxx.h:
First pass at big-endian support in the Core.
Capture state for second channel on TWIN channel adapters
for suspend and resume.
aic7xxx_freebsd.h:
Stubs for endian conversion functions. These will get filled
out once we get an official kernel api for this kind of thing
that is something more elegant and efficient than a bunch of
manual swaps #ifdefed by platform.
aic7xxx_pci.c
Allow the second channel of motherboard aic7896 chips to be attached.
It turns out that the encoding of the subdevice id differs between
PCI cards and MB based controllers and our check to see, via
the subvendor id, if the second channel was "stuffed" always
turned out negative.
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
aicasm is run on the build machine and therefore needs to be
compiled and linked against the headers and libraries (resp)
of the build machine. Since normally the default include
directories are search after any specified on the command
line, make sure we don't accidentally pick up machine
dependent headers from the kernel compile directory by
specifying /usr/include first.
This solves the (cross) build problem for ia64.
Approved by: gibbs
Shutdown the card when a catastrophic error occurs. This quenches
any interrupts stemming from the card.
aic7xxx_inline.h:
Return instead of processing additional interrupt state
after handling a catastrophic error. We now shutdown the
chip in this case in the hopes that the system can live
without this controller. The shutdown process invalidates any
other interrupt state.
aic7xxx.seq:
Only attempt to clear SCSIBUSL on Ultra2 controllers. The
clearing is workaround for a selection timeout bug on U2/U160
controllers and happens to be illegal on aic7770 (EISA/VL)
controllers.
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
When restarting the sequencer, ensure that the SCBCNT register
is 0. A non-zero count will prevent the setting of the CCSCBDIR
bit in any future dma operations. The only time CCSCBCNT would
be non-zero is if we happened to halt the dma during a reset,
but even that should never happen. Better safe than sorry.
When a command completes before the target responds to an
ATN for a recovery command, we now notify the kernel so that
any recovery operation requeued in the qinfifo can be removed
safely. In the past, we did this in ahc_done(), but ahc_done()
may be called without the card paused. This also avoids a
recursive call to ahc_search_qinifo() which could have occurred if
ahc_search_qinififo() happened to be the routine to complete
a recovery action.
Fix 8bit math used for adjusting the qinfifo. The index must
be wrapped properly within the 256 entry array. We rely on the
fact that qinfifonext is a uint8_t in most cases to handle
this wrap, but we missed a few spots where the resultant
calculation was promoted to an int.
Change the way that we deal with aborting the first or second
entry from the qinfifo. We now swap the first entry in the
qinfifo with the "next queued scb" to force the sequencer
to see an abort collision if we ever touch the qinififo while
the sequencer is mid SCB dma.
aic7xxx.reg:
Add new MKMSG_FAILED sequencer interrupt. This displaced
the BOGUS_TAG interrupt used in some previous sequencer code
debugging.
aic7xxx.seq:
Increment our position in the qinfifo only once the dma
is complete and we have verified that the queue has not
been changed during our DMA. This simplifies code in the
kernel.
Protect against "instruction creep" when issuing a pausing
sequencer interrupt. On at least the 7890/91/96/97, the
sequencer will coast after issuing the interrupt for up
to two instructions. In the past we delt with this by
using carefully placed nops. Now we call a routine to
issue the interrupt followed by a nop and a ret.
Tell the kernel should an SCB complete with the MK_MESSAGE
flag still set. This means the target ignored our ATN request.
Clear the channel twice as we exit the data phase. On the
aic7890/91, the S/G preload logic may require the second
clearing to get the last S/G out of the FIFO.
aic7xxx_freebsd.c:
Don't bother searching the qinfifo for a doubly queued
recovery scb in ahc_done. This case is handled by the
core driver now.
Free the path used to issue async callbacks after the callback
is complete.
aic7xxx_inline.h:
Split the SCB queue routine into a routine that swaps
the SCB with the "next queued SCB" and a routine that
calls the swapping routine and notifies the card of
the new SCB. The swapping routine is now also used by
ahc_search_qinfifo.
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
during the qinfifo optimization. When swapping HSCBs, we were only copying
the first 32 bytes, the amount used in the common case of a cdb <= 12 bytes.
Larger cdbs are stored in the second 32 bytes of the cdb.
Noticed by: Marc Frajola <marc@terasolutions.com>
past we stored this data in the CCB and attained the CCB via a pointer
in the SCB. In ahc_timeout(), however, the timedout SCB may have already
been completed (inherent race), meaning that the CCB could have been recycled,
and the ahc pointer reset.
Clean up the logic in ahc_search_qinfifo that deals with the busy device
table. For some reason it assumed that the only valid time to search
to see if additional lun entries should be checked was if lun 0 matched.
Now we properly itterate through the necessary luns. The busy device
table is used to detect invalid reselections, so a device would have had
to perform an unexpected reselection for this to cause problems. Further,
all luns are collapsed to a single entry unless we have external ram
with large SCBs (3940AU models) so the chance of this happening was
rather remote.
Clean up the logic for dealing with the untagged queues. We now set a
flag in the SCB that indicates that it is on the untagged queue instead
of inferring this from the type and setup of the CCB pased into us by
CAM.
In ahc_timeout(), don't print the path of the SCB until the controller
is paused and we are sure that it has not completed yet. This, in
conjunction with referencing the ahc pointer in the SCB rather than
the CCB in the SCB avoids panics in the case of a timedout scb completing
just before the timeout handler runs. This turns out to be guaranteed
if interrupt delivery is failing, as we run our interrupt handler to
flush any "just missed events" when a timeout occurs. Mention the
likelyhood of broken interrupts if a timedout SCB is completed by
our call to ahc_intr().
a resource shortage occurs, freeze our queue and then set the resource
shortage flag while the controller data structure is locked. The old
code did these in the wrong order potentially allowing our interrupt
handler to release the queue and clear the flag before the freeze
ever occurred.
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
non-LVD controllers. We only need to take special action on the qinfifo
if we have dectected the case of an SCB that has been removed from the
qinfifo but has not been fully DMAed to the controller. A missing
conditional caused this code to be executed every time an SCB was
aborted from the queue
Don't attempt to print the path of an SCB that has been freed.
Clean up the traversal of the pending scb list in
ahc_update_pending_syncrates(). This has no functional change.
Correct ahc_timeout()'s requeing of a timedout SCB to effect a
recovery action. We now use ahc_qinfifo_requeue() and a
new function ahc_qinfifo_count() instead of performing the
requeue inline. The old code did not conform to the new qinfifo
method.
Clear the timedout SCB from the disconnected list. This ensures
that the SCB_NEXT field is free to be used for queuing us to
the qinfifo.
In ahc_search_qinfifo, the SEARCH_REMOVE case must also handle
an SCB that has been removed from the QINFIFO but not yet been
fully dmaed to the card.
Correct locking for ahc_get_scb() calls.
Set SCB syncrate settings in ahc_execute_scb() to avoid a race
condition that could allow a newly queued SCB to be missed
by ahc_update_pending_syncrates().
When notifying the system of transfer negotiation updates, only
set the valid bits for tagged queuing and disconnection if the
path is fully qualified. Sync/Wide settins apply to all luns
of a target, but tagged queuing and disconnection may change
on a per-lun basis.
Add missing ahc_unlock() calls in ahc_timeout() for the target
mode case.
of two (one to access the circular input fifo, the other to get the SCB).
This costs us a command slot so the driver can now only queue 254
simultaneous commands.
Have the kernel driver honor critical sections in sequencer code.
When prefetching S/G segments only pull a cacheline's worth but
never less than two elements. This reduces the impact of the
prefetch on the main data transfer when compared to the 128
byte fetches the driver used to do.
Add "bootverbose" logging for transfer negotiations.
Correct a bug in ahc_set_syncrate() that would prevent an update
of the sync parameters if only the ppr_options had changed.
Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no
longer protected internally to simplify ports to other platforms.
Make sure we unfreeze our SIMQ if a resource shortage has occurred
and an SCB is been freed.
ahc_pci.c:
Turn on cacheline streaming for all controllers that support it.
Clarify diagnostic messages about PCI interrupts.
Add support for constructing a table of critical section regions in
the firmware image. The kernel driver will soon have support for
single stepping the sequencer outside of a critical region prior
to starting exception handling.
ahc_pci.c:
Bring back the AHC_ALLOW_MEMIO option at least until the
memory mapped I/O problem on the SuperMicro 370DR3 is
better understood.
aic7xxx.c:
If we see a spurious SCSI interrupt, attempt to clear it and
continue by unpausing the sequencer.
Change the interface to ahc_send_async(). Some async messages
need to be broadcast to all the luns of a target or all the
targets of a bus. This is easier to achieve by passing explicit
channel, target, and lun parameters instead of attempting to
construct a device info struct to match.
Filter the sync parameters for the PPR message in exactly the
same way we do for an old fashioned SDTR message.
Correct some typos and correct a panic message.
Handle rejected PPR messages.
In ahc_handle_msg_reject(), let ahc_build_transfer_msg() build
any additional transfer messages instead of doing this inline.
aic7xxx.h:
Increase the size of both msgout_buf and msgin_buf to
better accomodate PPR messages.
aic7xxx_freebsd.c:
Update for change in ahc_send_async() parameters.
aic7xxx_freebsd.h
Update for change in ahc_send_async() parameters.
Honor AHC_ALLOW_MEMIO.
aic7xxx_pci.c:
Check the error register before going into full blown PCI
interrupt handling. This avoids a few costly PCI configuration
space reads when we run our PCI interrupt handler because another
device sharing our interrupt line is more active than we are.
Also unpause the sequencer after processing a PCI interrupt.
sequencer files. Different platforms place the included files in different
locations and it is easier to modify the include path passed as arguments
to the assembler than adding #ifdef support to the assembler.
Remove a spurious 'nop' instruction.
ahc->unit is depricated and will be going away as soon as the Linux
driver catches up. In the FreeBSD case, it is always initialized to 0
and this caused some strangeness in registering multiple ahc controllers
with CAM.
Noticed by: Tor.Egge@fast.no
Separate our platform independent hooks from core driver functionality
shared between platforms (FreeBSD and Linux at this time).
Add sequencer workarounds for several chip->chipset interactions.
Correct external SCB corruption problem on aic7895 based cards (3940AUW).
Lots of cleanups resulting from the port to another OS.
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
which call busspace.
* Rework pci config accesses to route through the pcib device instead of
calling a MD function directly.
With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
the scratch RAM for data normally found in the SEEPROM (presumably in the
event that the SEEPROM is unavailable or can't be read). This code causes
a spontaneous reboot on monster.osd.bsdi.com, which has an embedded aic7880
controller. The problem appears to happen either when it writes to the
SCBPTR port and then reads from the SCB_CONTROL port. Somewhere during
the inb/outb operations, the system has a heart attack and restarts.
This code looks very suspicious, particularly since it has unconditionalized
debug mesages such as "Got here!" and "And it even worked!". With this
block #ifdef'ed out, the machine boots and runs properly. I stronly suggest
that it stay #ifdef'ed out until it's properly tested.
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
didn't bother to send a saved data pointers after the last transfer,
is not recorded in sgptr. This was only a problem if the target
reported non-zero status as we always check the residual in that case.
Correct the BUILD_TCL macro. It was placing the target id
in the wrong bits. This was only an issue for adapters that
do not perform SCB paging (aha-3940AUW for instance).
Don't bother inlining ahc_index_busy_tcl. It is never
used in a performance critical path and is a bit chunky.
Correct ahc_index_busy_tcl to deal with "busy target tables"
embedded in the latter half of 64byte SCBs.
Don't initialize the busy target table to its empty state
until after we have finished extracting configuration
information from chip SRAM. In the common case of using
16 bytes of chip SRAM to do untagged target lookups,
we were trashing the last 8 targets configuration data.
(actually only target 8 because of the bug in the
BUILD_TCL macro).
Cram the "bus reset delivered" message back under bootverbose.
Fix the cleanup of the SCB busy target table when aborting
commands. If the lun is wildcarded, we must loop through
all possible luns.
aic7xxx.h:
Only bother supporting 64 luns right now. It doesn't seem
like either this driver or any peripherals will be doing
information unit transfers (where the lun number is a
32 bit integer) any time soon.
aic7xxx.seq:
Fix support for the aic7895. We must flush the data
FIFO if performing a manual transfer that is not
a multiple of 8 bytes. We were doing this quite
regularly for embedded cdbs.
Manaually flush the fifo on earlier adapters when
dealing with embedded cdbs too. We were stuffing
the FIFO with 16 bytes instead, but triggering
the flush is more efficient and allows us to
remove two instructions from the "copy_to_fifo"
routine.
other systems.
o Normalize copyright text.
o Clean up probe code function interfaces by passing around a single
structure of common arguments instead of passing "too many" args
in each function call.
o Add support for the AAA-131 as a SCSI adapter.
o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net
o Correct manual termination support for PCI cards. The bit definitions
for manual termination control in the SEEPROM were incorrect.
o Add support for extracting NVRAM information from SCB 2 for BIOSen
that use this mechanism to pass this data to OS drivers.
o Properly set the STPWLEVEL bit in PCI config space based on the
setting in an SEEPROM.
o Go back to useing 32byte SCBs for all controllers. The current
firmware allows us to embed 12byte cdbs on all controllers in
a 32byte SCB, and larger cdbs are rarely used, so it is a
better use of this space to offer more SCBs (32).
o Add support for U160 transfers.
o Add an idle loop executed during data transfers that prefetches
S/G segments on controllers that have a secondary DMA engine
(aic789X).
o Improve the performance of reselections by avoiding an extra
one byte DMA in the case of an SCB lookup miss for the reselecting
target. We now keep a 16byte "untagged target" array on the card
for dealing with untagged reselections. If the controller has
external SCB ram and can support 64byte SCBs, then we use an
"untagged target/lun" array to maximize concurrency. Without
external SCB ram, the controller is limited to one untagged
transaction per target, auto-request sense operations excluded.
o Correct the setup of the STPWEN bit in SXFRCTL1. This control
line is tri-stated until set to one, so set it to one and then
set it to the desired value.
o Add tagged queuing support to our target role implementation.
o Handle the common cases of the ignore wide residue message
in firmware.
o Add preliminary support for 39bit addressing.
o Add support for assembling on big-endian machines. Big-endian
support is not complete in the driver.
o Correctly remove SCBs in the waiting for selection queue when
freezing a device queue.
o Now that we understand more about the autoflush bug on the
aic7890, only use the workaround on devices that need it.
o Add a workaround for the "aic7890 hangs the system when you
attempt to pause it" problem. We can now pause the aic7890
safely regardless of what instruction it is executing.
negotiation features (DT, ULTRA2, ULTRA, FAST). The offsets
where not properly updated when the DT entry was added and so
the driver could attempt to negotiate a speed faster than that
supported by the target device or even requested by the user
via SCSI-Select settings. *
o Update the target mode incoming command queue kernel index value
ever 128 commands instead of 32. This means that the kernel will
always try to keep its index (as seen on the card - the kernel may
actually have cleared more space) 128 commands ahead of where the
sequencer is adding entries.
o Use the HS_MAILBOX register instead of the KERNEL_TQINPOS location
in SRAM to indicate the kernel's target queue possition on Ultra2
cards. This avoids the "pause bug" on these cards and also turns
out to be much more efficient.
o When enabling or disabling a particular target id for target mode,
make sure that the taret id in the SCSIID register does not
reference an ID that is not to receive target selections. This
is only an issue on chips that support the multiple target id
feature where the value in SCSIID will still affect selection
behavior regardless of the values in the target id bit field
registers.
o Remove some target mode debugging printfs.
o Make sure that the sense length reported in ATIO commands is
always zero. This driver does not, yet, report HBA generated
sense information for accepted commands.
o Honor the CAM_TIME_INFINITY and CAM_TIME_DEFAULT values for
the CCB timeout field.
o Make the driver compile with AHC_DEBUG again.
* Noticed by: Andrew Gallatin<gallatin@cs.duke.edu>
for optimizing the unpause operation no-longer exist, and this is much
safer.
When restarting the sequencer, reconstitute the free SCB list on the card.
This deals with a single instruction gap between marking the SCB as free
and actually getting it onto the free list.
Reduce the number of transfer negotiations that occur. In the past, we
renegotiated after every reported check condition status. This ensures
that we catch devices that have unexpectidly reset. In this situation,
the target will always report the check condition before performing a
data-phase. The new behavior is to renegotiate for any check-condition where
the residual matches the orginal data-length of the command (including
0 length transffers). This avoids renegotiations during things like
variable tape block reads, where the check condition is reported only
to indicate the residual of the read.
Revamp the parity error detection logic. We now properly report and
handle injected parity errors in all phases. The old code used to hang
on message-in parity errors.
Correct the reporting of selection timeout errors to the XPT. When
a selection timeout occurs, only the currently selecting command
is flagged with SELTO status instead of aborting all currently active
commands to that target.
Fix flipped arguments in ahc_match_scb and in some of the callers of this
routine. I wish that gcc allowed you to request warnings for enums passed
as ints.
Make ahc_find_msg generically handle all message types.
Work around the target mode data-in wideodd bug in all non-U2 chips.
We can now do sync-wide target mode transfers in target mode across the
hole product line.
Use lastphase exclusively for handling timeouts. The current phase
doesn't take the bus free state into account.
Fix a bug in the timeout handler that could cause corruption of the
disconnected list.
When sending an embedded cdb to a target, ensure that we start on a
quad word boundary in the data-fifo. It seems that unaligned stores
do not work correctly.
Collect together the components of several drivers and export eisa from
the i386-only area (It's not, it's on some alphas too). The code hasn't
been updated to work on the Alpha yet, but that can come later.
Repository copies were done a while ago.
Moving these now keeps them in consistant place across the 4.x series
as the newbusification progresses.
Submitted by: mdodd
makes it a little easier to notice that parity checking an 8bit sram
isn't working.
Turn on scb and internal data-path parity checking for all pci chips types.
We were only doing this for ultra2 chips.
After clearing the parity interrupt status, clear the BRKADRINT. This
avoids seeing a bogus BRKADRINT interrupt after external SCB probing
once normal interrupts are enabled.
93cx6.c:
Make the SRAM dump output a little prettier.
aic7xxx.c:
Store all SG entries into our SG array in kernel space.
This makes data-overrun and other error reporting more
useful as we can dump all SG entries. In the past,
we only stored the SG entries that the sequencer might
need to access, which meant we skipped the first element
that is embedded into the SCB.
Add a table of chip strings and replace ugly switch
statements with table lookups.
Add a table with bus phase strings and message reponses
to parity errors in those phases. Use the table to
pretty print bus phase messages as well as collapse
another switch statement.
Fix a bug in target mode that could cause us to unpause
the sequencer early in bus reset processing.
Add the 80MHz/DT mode into our syncrate table. This
rate is not yet used or enabled.
Correct some comments, clean up some code...
aic7xxx.h:
Add U160 controller feature information.
Add some more bit fields for various SEEPROM formats.
aic7xxx.reg:
Add U160 register and register bit definitions.
aic7xxx.seq:
Make phasemis state tracking more straight forward. This
avoids the consumption of SINDEX which is a very useful register.
For the U160 chips, you must use the 'mov' instruction to
update DFCNTRL. Using 'or' to set the PRELOADED bit is
completely ineffective.
At the end of the command phase, wair for our ACK signal
to de-assert before disabling the SCSI dma engine. For
slow devices, this avoids clearing the ACK before the
other end has had a chance to see it and lower REQ.
controllers will run at U2 speeds until I can complete the U160 support
for this driver.
Correct a termination buglet for the 2940UW-Pro.
Be more paranoid in how we probe and enable external ram, fast external
ram timing and external ram parity checking. We should now work on
20ns and 8bit SRAM parts.
Perform initial setup for the DT feature on cards that support it.
Factorize and clean up code. Use tables where it makes sense, etc.
Add some delays in dealing with the board control logic. I've never
seen this code fail, but with the ever increasing speed of processors,
its better to insert deterministic delays just to be safe. This stuff
is only touched during probe and attach, so the extra delay is of no
concern.
is an application space macro and the applications are supposed to be free
to use it as they please (but cannot). This is consistant with the other
BSD's who made this change quite some time ago. More commits to come.
the input fifo to be returned as successful and frozen. Most, if not
all, peripheral drivers do not check the qfrozen bit for successfully
completed commands, so the result would not only be lost commands, but
devices locked out from receiving commands. This was a bad bug that
crept in two or three months ago during some target mode work.
Don't arbitrarily limit the initiator ID of the card to something <= 7.
Fix a bug in the checksum code that would incorrectly prevent a valid
checksum of zero. (cp)
Don't touch rely on seeprom data when configuring termination. We may
not have seeprom data. (cp)
Treat all ULTRA2 capable adapters the same way when reading or writing
the BRDCTL register. We previously only did this correctly for aic7890/91
chips. This should correct some problems with termination settings on
aic7896/97 adapters. (cp)
Changes marked with "(cp)"
Pointed out by: Chuck Paterson <cp@bsdi.com>
aic7xxx.c:
Add a function for sucking firmware out of the controller
prior to reset.
Remove some inline bloat from functions that should not have
been inlined.
During initialization, wait 1ms after the chip reset before
touching any registers. You can get machine checks on certain
architectures (Atari I think?) without the delay.
Return CAM_REQ_CMP for external BDR requests instead
of CAM_BDR_SENT.
Bump some messages to bootverbose levels above 1.
Don't clear any negotiated sync rate if the target rejects
a WDTR message. The sync rate is only cleared if the target
accepts a WDTR message.
Fix a small bug in the mesgin handling code that could cause
us to believe that we had recieved a message that was actually
received by another target. This could only confuse us in
some very rare transmission negotiation scenarios.
Remove some unecessary cleanup of residual information after
a residual is reported. The sequencer does this when the
command is queued now.
usually cleared by a successful selection, but there is no guarantee
that a future successful selection will ever occur (e.g. empty bus).
The driver never looks at SELINGO, but the busy LED does, so this
change has the cosmetic effect of fixing the rare instance where the
busy LED was left on, confusing the user.
aic7xxx parts. This problem could result in data corruption
during periods of my PCI bus load by busmasters other than the
aic7xxx.
Many thanks to Andrew Gallatin <gallatin@cs.duke.edu> for characterizing
the symptoms of this problem and testing this fix.
Break out the detection logic for the aic7855 and properly report
these chips as 7855s instead of 7850s.
The 2940AU_CN is an aic7860 based card, not aic7860.
Not setting CACHETHEN turned out to be a bad idea. It can cause
spurious corruption under heavy PCI load with multiple masters.
events, in order to pave the way for removing a number of the ad-hoc
implementations currently in use.
Retire the at_shutdown family of functions and replace them with
new event handler lists.
Rework kern_shutdown.c to take greater advantage of the use of event
handlers.
Reviewed by: green
messages, abort messages, and abort tag messages.
Fix a bug in how default transfer negotiations are handled if the
user had disabled initial bus resets.
Support multi-targetid on the aic7895C.
the aic7890/91/96/97 cards. This could cause the system to go into
a long retry/recovery loop during probe.
Fix the alignment argument to bus_dma_tag_create().
Don't set the CACHETHEN bit in dscommand0 for Ultra2 controllers
until we know more about its behavior. The description for this
bit makes it sound like it could cause problems with certain
PCI chipsets.
eisa_add_intr() which now takes an additional arguement (one of
EISA_TRIGGER_LEVEL or EISA_TRIGGER_EDGE).
The flag RR_SHAREABLE has no effect when passed to
bus_alloc_resource(dev, SYS_RES_IRQ, ...) in an EISA device context as
the eisa_alloc_resource() call (bus_alloc_resource method) now deals
with this flag directly, depending on the device ivars.
This change does nothing more than move all the 'shared = inb(foo + iobsse)'
nonesense to the device probe methods rather than the device attach.
Also, print out 'edge' or 'level' in the IRQ announcement message.
Reviewed by: dfr
only support 'mirroring' the vendor and device ids, so we don't
lose any information. Certain revisions of the aic7880 will not
perform the mirroring so to match all possiblities would double
the number of table entries. This change also allows us to match
things like the 2944B which I missed in the original table.
Honor the 'bus reset at startup' option now that the XPT properly
handles transfer negotiation in this scenario.
Honor the sync rate settings on Ultra2 controllers. We would
always negotiate at the fastest speed. Oops.
aic7xxx.h:
Whitespace.
aic7xxx.seq:
Fix a minor nit that would cause the controller to miss the update
of the negotiation required bitmask causing the negotiation to
be delayed by a command.
Clean up the handling of failure modes in our attach so we don't free
resources twice. ahc_free() will do all of the work for us (as would
be required by an unload event) so we only need to handle resources that
the softc has not taken ownership of.
Sync up device Ids with the master Adaptec list.
Add probe support for the 2940 Pro although it isn't obvious that
all of the termination support is correct for this adapter yet.
tell the sequencer to pause itself for a target msg variable update. This
avoids the pause race entirely as HS_MAILBOX can be accessed without
pausing the chip.
3.2 Merge candidate.
NOTE: These changes will require recompilation of any userland
applications, like cdrecord, xmcd, etc., that use the CAM passthrough
interface. A make world is recommended.
camcontrol.[c8]:
- We now support two new commands, "tags" and "negotiate".
- The tags commands allows users to view the number of tagged
openings for a device as well as a number of other related
parameters, and it allows users to set tagged openings for
a device.
- The negotiate command allows users to enable and disable
disconnection and tagged queueing, set sync rates, offsets
and bus width. Note that not all of those features are
available for all controllers. Only the adv, ahc, and ncr
drivers fully support all of the features at this point.
Some cards do not allow the setting of sync rates, offsets and
the like, and some of the drivers don't have any facilities to
do so. Some drivers, like the adw driver, only support enabling
or disabling sync negotiation, but do not support setting sync
rates.
- new description in the camcontrol man page of how to format a disk
- cleanup of the camcontrol inquiry command
- add support in the 'devlist' command for skipping unconfigured devices if
-v was not specified on the command line.
- make use of the new base_transfer_speed in the path inquiry CCB.
- fix CCB bzero cases
cam_xpt.c, cam_sim.[ch], cam_ccb.h:
- new flags on many CCB function codes to designate whether they're
non-immediate, use a user-supplied CCB, and can only be passed from
userland programs via the xpt device. Use these flags in the transport
layer and pass driver to categorize CCBs.
- new flag in the transport layer device matching code for device nodes
that indicates whether a device is unconfigured
- bump the CAM version from 0x10 to 0x11
- Change the CAM ioctls to use the version as their group code, so we can
force users to recompile code even when the CCB size doesn't change.
- add + fill in a new value in the path inquiry CCB, base_transfer_speed.
Remove a corresponding field from the cam_sim structure, and add code to
every SIM to set this field to the proper value.
- Fix the set transfer settings code in the transport layer.
scsi_cd.c:
- make some variables volatile instead of just casting them in various
places
- fix a race condition in the changer code
- attach unless we get a "logical unit not supported" error. This should
fix all of the cases where people have devices that return weird errors
when they don't have media in the drive.
scsi_da.c:
- attach unless we get a "logical unit not supported" error
scsi_pass.c:
- for immediate CCBs, just malloc a CCB to send the user request in. This
gets rid of the 'held' count problem in camcontrol tags.
scsi_pass.h:
- change the CAM ioctls to use the CAM version as their group code.
adv driver:
- Allow changing the sync rate and offset separately.
adw driver
- Allow changing the sync rate and offset separately.
aha driver:
- Don't return CAM_REQ_CMP for SET_TRAN_SETTINGS CCBs.
ahc driver:
- Allow setting offset and sync rate separately
bt driver:
- Don't return CAM_REQ_CMP for SET_TRAN_SETTINGS CCBs.
NCR driver:
- Fix the ultra/ultra 2 negotiation bug
- allow setting both the sync rate and offset separately
Other HBA drivers:
- Put code in to set the base_transfer_speed field for
XPT_GET_TRAN_SETTINGS CCBs.
Reviewed by: gibbs, mjacob (isp), imp (aha)
Convert to new bus and bus dma.
Use latest PCI API.
bt_pci.c:
Fix a few bugs in how resourses are released left over from
when this driver was converted to new bus.
had a quirk that made a shim rather hard to implement properly and it was
just easier to convert the drivers in one go. The changes to the
buslogic driver go beyond just this - the whole driver was new-bus'ed
including pci and isa. I have only tested the EISA part of this so far.
Submitted by: Doug Rabson <dfr@nlsystems.com>
Recognize aic7895 controllers that have been "acquired" by a RAIDPort
card as normal aic7895s.
Recognize the aic7815 Raid Parity/Memory controller chip and notify
the user that it's RAID functionality will be ignored.
Don't mess with the IRQMS bit in the host control register unless
we are an aic7770 chip.
Use calling context to determine if the card is already paused when
we update the target message request bit field in controller scratch
ram. Looking at the paused bit in the HCNTRL register opened up a
race condition.
Insert delays in the target message request update routine as a temporary
work around for what looks like a chip bug. I'm still investigating this
one.
Fix the Abort/Abort Tag/BDR handler to pull its message from the message
buffer in our softc instead of attempting to get it from a register on
the controller. The message is never recorded by the controller in the
new message scheme.
Don't rely on having an SCB when a BDR occurs. We can issue these during
invalid reconnects to.
Fix a few cases where we were restarting the sequencer but then still
falling out of a switch statement to unpause the sequencer again.
This could cause us to mess up sequencer state if it generated another
pausing interrupt between the time of the restart and unpause.
Kill the 'transceiver settle' loop during card initialization. I
failed to realize that a controller that is not connected to any
cables will never settle or enable the SCSI transceivers at all.
The correct solution is to monitor the IOERR interrupt which indicates
that the transceiver state has changed (UW<->LVD).
Modify the aic7xxx assembler to properly echo input when stdin is not
a tty.
connection.
Clean up support for devices featuring the multiple target SCSI ID feature.
On aic7890/91/96/97 chips, we can now assume the target role on multiple
target ids simultaneously. Although these chips also have sufficient
instruction space to hold to support the initiator and target role at the
same time, the initiator role is currently disabled as it will conflict
(chip design restriction) with the multi-tid feature. I'll probably add
a nob to enable the initiator (there-by disabling multi-tid) some time
in the future.
Return queue full or busy, depending on the tagged nature of the incoming
request, if our command input queue fills up in host memeory.
Deal with accept target I/O resource shortages.
If we get an underrun on a transaction that wasn't supposed to transmit
any data, don't attempt to print out the S/G list. The code would
run until hitting a non-present page. (oops)
reorganization in rev 1.16 of i386/include/types.h which changed
stdlib.h's use of <machine/types.h>. The problem was the -I. was causing
machine/types.h to come from the current kernel source, while stdlib.h was
coming from /usr/include. /usr/include/stdlib.h is as old as the last
'make world', the machine/types.h was as new as the current source.
black hole device. The controller will now only accept selections if
the black hole device is present and some other target/lun is enabled
for target mode.
Handle the IGNORE WIDE RESIDUE message. This support has not been tested.
Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS,
and CLEAR QUEUE messages as a target.
Fix a few problems with tagged command handling in target mode.
Wait until the sync offset counter falls to 0 before changing phase
after a data-in transfer completes as the DMA logic seems to indicate
transfer complete as soon as our last REQ is issued.
Simplify some of the target mode message handling code in the sequencer.
Use the host message loop for any unknown message types instead of performing
a reject message in the sequencer. Pass reject messages to the host
message loop too which frees up a sequencer interrupt type slot.
Default to issuing a bus reset if initiator mode is enabled. It seems
that the reset scsi bus bit is not defined in the same location for
all aic78xx BIOSes, so attempting to honor this setting will have to
wait until I get more information on how to detect it.
Nuke some unused variables.
in target mode, but we are not completing the command.
Use a template of allowed bus arbitration phases to selectively and
dynamically enable/disable initiator or target (re)selection.
Properly handle timeouts for target role transactions - just go to the
bus free state and report the error to the peripheral driver.
Checkpoint support for the XPT_ABORT_CCB function code. This currently
handles the accept tio and immediate notify ccb types, but does not
handle the continue target I/O or SCSI I/O ccb types. This is enough
to handle dynamic target enable/disable events.
Clean up the SCSI reset code so that we perform at most 1 SCSI bus
reset at initialization, the reset requested by the XPT layer.
const char *. Originally I was going to add casts from const char * to
char * in some of the pci device drivers, but the reality is that the
pci device probes return constant quoted strings.
is more robust and common code can be used for both the target and iniator
roles. The mechanism for tracking negotiation state has also been simplified.
Add support for sync/wide negotiation in target mode and fix many of
the target mode bugs running at higher speeds uncovered. Make a first
stab at getting all of the bus skew delays correct. Sync+Wide dataout
transfers still cause problems, but this may be an initiator problem.
Ensure that we exit BITBUCKET mode if the controller is restarted.
Add support for target mode only firmware downloads. This has been
tested on the aic7880, but should mean that we can perform target mode
on any aic7xxx controller. Mixed mode (initiator and target roles in
the same firmware load) is currently only supported on the aic7890, but
with optimization, may fit on chips with less instruction space.
for possible buffer overflow problems. Replaced most sprintf()'s
with snprintf(); for others cases, added terminating NUL bytes where
appropriate, replaced constants like "16" with sizeof(), etc.
These changes include several bug fixes, but most changes are for
maintainability's sake. Any instance where it wasn't "immediately
obvious" that a buffer overflow could not occur was made safer.
Reviewed by: Bruce Evans <bde@zeta.org.au>
Reviewed by: Matthew Dillon <dillon@apollo.backplane.com>
Reviewed by: Mike Spengler <mks@networkcs.com>
use a 256 entry ring buffer of descriptersfor this purpose. This allows
the use of a simple 8bit counter in the sequencer code for tracking start
location.
Entries in the ring buffer now contain a "cmd_valid" byte at their tail.
As an entry is serviced, this byte is cleared by the kernel and set by
the sequencer during its dma of a new entry. Since this byte is the last
portion of the command touched during a dma, the kernel can use this
byte to ensure the command it processes is completely valid.
The new command format requires a fixed sized DMA from the controller
to deliver which allowed for additional simplification of the sequencer
code. The hack that required 1 SCB slot to be stolen for incoming
command delivery notification is also gone.
Correct a problem where an external bus reset on the 'background' channel of
a Twin Channel EISA controller could put the driver into an infinite loop.
Noticed by: Twin Channel bug, Joerg Wunsch <joerg@FreeBSD.org>
Submitted by: -Wunused, Poul-Henning Kamp <phk@freebsd.org>
Disable DPARCKEN in the DSCOMMAND0 register on the aic7890/91/96/97.
Parity checking is broken for some chip/MB combinations and this
is the work around recommended by Adaptec.
dpt_pci.c:
Remove a superflous '{' that prevented DPT_ALLOW_MEMIO from working.
pcireg.h:
Add a definition for Parity Error Reponse bit in the PCI Space
command register.
a timeout, we must remove the pending SCB from the disconnected list
or risk list corruption when our BDR request using the same SCB is placed
on the waiting list.
Eradicate some silly uses of u_int8_t that just serve to slow the code down.
- Convert to CAM
- Use a new DMA based queuing and paging scheme
- Add preliminary target mode support
- Add support for the aic789X chips
- Take advantage of external SRAM on more controllers.
- Numerous bug fixes and performance improvements.
data fifo is full, but the PCI input latch is not empty,
HDMAEN cannot be cleared. The fix used here is to attempt
to drain the data fifo until there is space for the input
latch to drain and HDMAEN de-asserts.
This is a 1 instruction fix, so it should have no performance
impact.
operands that are set during seqeuncer program download instead of at
assembly time.
Convert the sequencer code to use" downloaded constants" for four run time
constants that vary depending on the board type. This frees up 4 bytes
of sequencer scratch ram space where these constants used to be stored and
also removes the additional instructions required to load their values
into the accumulator prior to using them.
Remove the REJBYTE sram variable. The host driver can just as easly
read the accumulator to get this value.
The scratch ram savings is important as the old code used to clober the
SCSICONF register on 274X cards which sits near the top of scratch ram
space. The SCSICONF register controls bus termination, and clobbering
it is not a good thing. Now we have 4 bytes to spare.
This should fix the reported problems with cards that don't have devices
attached to them failing with a stream of "Somone reset bus X" messages.
Doug Ledford determined the cause of the problem, fixes by me.
entry to the QOUTFIFO when it is full. This should eliminate the
"Timed out while idle" problems that many have reported.
In truth, this is somewhat of a hack. Although are interrupt latency is
low enough that we should be able to always service the queue in time,
since each entry must be passed up to the higher SCSI layer for what can
be a large amount of processing (perhaps even resulting in a new command
being queued) with interrupts disabled, we need this mechanism to avoid
overflow. In the future, these additional tasks will be offloaded to a
software interrupt handler which should make this hack unnecessary.
if SCB Paging was enabled:
disconnect with more data to transfer
disconnected SCB gets paged out
target reconnects so we page SCB back in
target completes transfer so residual is 0
target disconnects
SCB gets reused but not paged out since the residual is 0 (optimization)
target reconnects so we page the SCB back in
we report a residual because of stale residual information.
The fix for this is to set a flag that forces the SCB to be paged back
up to the host if we page in an SCB with a residual
Pointed out by: Doug Ledford <dledford@dialnet.net>
to fix a selection timeout problem.
If we can't find an SCB for the reconnecting target, issue a bus device
reset as the SCSI2 spec suggests.
Add a missing call to "add_scb_to_free_list" in the non paging case. In
the non-paging case, the SCBs don't really need to be on the free list,
but putting them there clears the tag field which is something the recovery
code depends on.
Be consistant about testing for parity errors after waiting for a
REQ on the bus.
Don't ack the last byte in a transaction until after we've cleared
all target state.
aic7xxx_asm.c:
Test the return value of getopt against -1 not EOF. (Yet another
shameless victum of the style guide being wrong).
loop, test for them separately. The bug report from David Malone showed that
even though we had been reselected (SELDI was true), we sat in the poll for
work loop until the selection timeout timer expired. It may be that the
SSTAT0 register doesn't like to have more than one bit tested at a time.
I've seen stranger things than this on these parts.
either by looking it up in the array of pending, per target, untagged
transactions, or by using the tag value passed in during the identify. The
old code only direct indexed for tagged transactions. This makes the
"findSCB" routine only necessary when SCB paging is enabled, so appropriately
conditionalize it. This greatly simplifies the non SCB paging code flow.
Stick 4 more, twin channel only, instructions behind
.if ( TWIN_CHANNEL)
aic7xxx_asm.c:
Add the -O options which allows the specification of which options
to include in a program listing. This makes it possible to easily
determine the address of any instruction in the program across
different hardware/option configurations. Updated usage() as well.
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
time that we really want to do this is when a bus reset causes the sequencer
to be reset and the kernel driver now handles this case.
Remove some reordering in the select2 routine that wasn't necessary.
It was an experimental fix for a race condition I fixed elsewhere, and
confused the code flow.
Don't bother looping on a parity error in the mesgout loop since we can't
see parity errors on out phases.
Clean up the mesgin_identify code. In the old days, we "snooped" for tag
messages and used this as an indicator of whether or not the target was
using tagged transactions. This forced the sequencer to ack the identify
before determining if a valid SCB matched the target meaning that an abort
message to handle this case might not be seen before the target entered a
data phase. Since we can determin the "tagged-ness" of a target by looking
it up in the array of busy targets (recently introduced), we can determine
this up front simplifying the search code as well as ensuring we can follow
the SCSI specs method for rejecting a reselection.
When an SCB is placed on the free list, set its SCB_TAG to SCB_LIST_NULL.
This makes it much easier for the kernel driver to find active SCBs on the
card during error recovery.
negotiation messages may be tagged, we were overrunning the old buffer.
The variable that was getting squashed is updated before the message goes
out, causing corrupted SDTR or WDTR messages. Depending on the phases
traversed before message out, this could cause the wrong offset to be
negotiated allowing data overruns to occur. The problem is easier to
detect with wide targets on the chain since the allowed offset is smaller.
Also removed the unnecessary clearing of SPIORDY during the message out
phase. We don't rely on SPIORDY any more.
When setting the HCNT registers, do so in ascending order.
When performing tagged queueing in non-paging mode, also check the
disconnected bit in the SCB as extra sanity during a reconection.
Make the labels in the DMA routine more sane.
When doing a DMA, if we see the DMADONE condition come true, we can
simply turn of the DMA enable bits in DFCNTRL without testing the FIFO
state as HDONE is true when DMADONE is true and this emplies the FIFO is
empty.
These changes clear up the data overrun error messages and seem to prevent
the "timed out in data-in phase" problems.
free.
When we clear SCSIRATE, also clear the FAST20 bit in SXFRCTL0. This also
allowed me to clean up some of the ULTRA code.
ULTRAENB->FAST20 to follow the convention in the Adaptec data books.
Fix the data-overrun code to set both stcnt and hcnt otherwise, the transfer
will just hang until we get a timeout.
Add implicit support for the NOOP message. I've never heard of the driver
issueing a reject for one, but its silly to reject NOOP and who knows how a
device might react.
In the dma routine, check SDONE before cleaing SDMAEN. The data books mention
SDONE possibly being cleared when SDMAEN is reset. Clients of dma now need
to check if SINDEX is cleared to know if a phasemis occured.
Fix some comments to be correct.
host DMAs. The additional test to ensure that the DMA has stopped is also
unnecessary since we've already waited for the DMA to complete.
Update my copyright for the new year.
Expand the boundaries of a pause disabled region to close of possible race
condition.
Revert a portion of the DMA code to fix false overruns.
Add a missing "add_scb_to_free_list" so we don't leak SCBs.
SDONE, not HDONE.
In the data phase dma handler, mask off just the enable bits instead of
clearing the whole register. Clearing the direction bit could be bad.
Also don't stop a DMA until MREQPEND goes false. Doing this may cause
an ABORT on the PCI bus although I have yet to see this happen.
Add definitions for MREQPEND and the BRDCTL register. The BRDCTL register
is used to handle high byte termination and automatic termination testing.
Only enable reselections once the channel and SCSIRATE have been cleared.
Add a pause block around the test busy code in the non-tagged case to simplify
error recovery in the corner case of aborting an SCB that just got started.
Simplify reselection processing by removing the call to initialize_scsiid.
Clear the scsiseq re/select control bits and setup for catching bogus
busfrees earlier in the re/select process.
Improve the automatic PIO code. It turns out that SPIORDY is not a reliable
hardware condition bit, so use REQINIT intstead. Don't rely on PHASEMIS
either since it can take too long to come true. Use a brute force comparison
instead.
Remove some unnecessary overhead in the command complete processing. It
should be nearly impossible to overflow the QOUTFIFO (worst case 9 command
have to complete with at least 6 of them requiring paging on an aic7850),
so don't take the additional PIO hit to guard against this condition. If we
don't see our interrupt in time, the system has bigger problems elsewhere.
If this ever does happen, the timeout handler will notice and retry the
command.
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been
insane otherwise.
to miss reselections from some devices and since the reselection response
timeout is only 200ns, enabling reselections too late may be the cause of our
problem.
Immediate SCBs, since they always send messages that tell the target to
transition to bus free now rely on the busfree interrupt instead of the
IMMEDDONE sequencer interrupt that was generated before.
Rearrange some code in the message out loop to give ATN a little more time
to drop before we ACK the last byte.
Use SPIORDY instead of REQINIT when snooping for a tag message on a reconnect.
This is done for the same reasons we use SPIORDY in the inb functions.
When going into BITBUCKET mode, turn off HDMAEN in the DFCNTRL register so
that we can "not care" what the value of HCNT is. If HCNT is 0, BITBUCKET
mode won't transfer any data if HDMAEN is set. Seeing as we don't want the
transfer to even think about touching the host, this seems more sane anyway.
Thanks to "Dan Willis" <dan@plutotech.com> for pointing out that this was
a problem.
SPIORDY should go active on any REQ of the bus, so testing for REQINIT is
not necessary. It also seems that testing for SPIORDY is more robust then
REQINIT since SPIORDY comes active after REQINIT and PHASEMIS seems to take
some time to come true after REQ is asserted if the phase has changed. Of
course, none of this is documented.
This should give the code savings of my original changes, without breaking the
driver on fast peripherals.
