Commit Graph

1008 Commits

Author SHA1 Message Date
Peter Grehan
0038ee9891 Add 16550 uart emulation as a PCI device. This allows it to
be activated as part of the slot config options.
  The syntax is:

     -s <slotnum>,uart[,stdio]

  The stdio parameter instructs the code to perform i/o using
stdin/stdout. It can only be used for one instance.
  To allow legacy i/o ports/irqs to be used, a new variant of
the slot command, -S, is introduced. When used to specify a
slot, the device will use legacy resources if it supports
them; otherwise it will be treated the same as the '-s' option.
  Specifying the -S option with the uart will first use the 0x3f8/irq 4
config, and the second -S will use 0x2F8/irq 3.

  Interrupt delivery is awaiting the arrival of the i/o apic code,
but this works fine in uart(4)'s polled mode.

  This code was written by Cynthia Lu @ MIT while an intern at NetApp,
with further work from neel@ and grehan@.

Obtained from:	NetApp
2012-05-03 03:11:27 +00:00
Peter Grehan
cd942e0f25 MSI-x interrupt support for PCI pass-thru devices.
Includes instruction emulation for memory r/w access. This
opens the door for io-apic, local apic, hpet timer, and
legacy device emulation.

Submitted by:	ryan dot berryhill at sandvine dot com
Reviewed by:	grehan
Obtained from:	Sandvine
2012-04-28 16:28:00 +00:00
Peter Grehan
b28f897b44 Ignore legacy INIT de-asserts in x2apic mode before verifying
the contents of the IPI.
Uncovered by jhb's x2apic patch.

Obtained from:	NetApp
2011-10-18 18:52:22 +00:00
Peter Grehan
6214e48c41 Allow access to the device's config area with any size i/o access at any
offset. This is now spec-compliant.
2011-06-07 18:35:45 +00:00
Peter Grehan
32c39f32cd Catch up with CURRENTs different timer usage compared to 8.1. A counter
value of 0 in rategen mode is equivalent to a max initial value.
The TSC is now correctly calibrated on a 9.0 guest.

Obtained from:	NetApp
2011-05-24 01:08:53 +00:00
Peter Grehan
1f3025e133 Changes to allow the GENERIC+bhye kernel built from this branch to
run as a 1/2 CPU guest on an 8.1 bhyve host.

bhyve/inout.c
      inout.h
      fbsdrun.c
 - Rather than exiting on accesses to unhandled i/o ports, emulate
   hardware by returning -1 on reads and ignoring writes to unhandled
   ports. Support the previous mode by allowing a 'strict' parameter
   to be set from the command line.
   The 8.1 guest kernel was vastly cut down from GENERIC and had no
   ISA devices. Booting GENERIC exposes a massive amount of random
   touching of i/o ports (hello syscons/vga/atkbdc).

bhyve/consport.c
dev/bvm/bvm_console.c
 - implement a simplistic signature for the bvm console by returning
   'bv' for an inw on the port. Also, set the priority of the console
   to CN_REMOTE if the signature was returned. This works better in
   an environment where multiple consoles are in the kernel (hello syscons)

bhyve/rtc.c
 - return 0 for the access to RTC_EQUIPMENT (yes, you syscons)

amd64/vmm/x86.c
          x86.h
 - hide a bunch more CPUID leaf 1 bits from the guest to prevent
   cpufreq drivers from probing.
   The next step will be to move CPUID handling completely into
   user-space. This will allow the full spectrum of changes from
   presenting a lowest-common-denominator CPU type/feature set, to
   exposing (almost) everything that the host can support.

Reviewed by:	neel
Obtained from:	NetApp
2011-05-19 21:53:25 +00:00
John Baldwin
b67e81db43 First cut to port bhyve, vmmctl, and libvmmapi to HEAD. 2011-05-15 04:03:11 +00:00
Peter Grehan
366f60834f Import of bhyve hypervisor and utilities, part 1.
vmm.ko - kernel module for VT-x, VT-d and hypervisor control
  bhyve  - user-space sequencer and i/o emulation
  vmmctl - dump of hypervisor register state
  libvmm - front-end to vmm.ko chardev interface

bhyve was designed and implemented by Neel Natu.

Thanks to the following folk from NetApp who helped to make this available:
	Joe CaraDonna
	Peter Snyder
	Jeff Heller
	Sandeep Mann
	Steve Miller
	Brian Pawlowski
2011-05-13 04:54:01 +00:00