Commit Graph

725 Commits

Author SHA1 Message Date
Justin Hibbits
6d53f4a6ae Missed this in r281096 as well.
Renumber EXC_DEBUG to be above EXC_LAST, so as not to conflict with AIM trap
vectors.
2015-04-05 16:35:13 +00:00
Nathan Whitehorn
1cd30eb6dd Deallocate any leftover page table entries in the LPAR at boot. This
prevents contamination from a previous kernel (e.g. after shutdown -r).
2015-03-13 00:08:58 +00:00
Nathan Whitehorn
0aff8b5c4a Provide VSX context in ucontext(3) API. 2015-03-12 21:15:38 +00:00
Nathan Whitehorn
f14cf38dbe The AIM DAR (data access fault address register) and Book-E DEAR registers
have the same meaning and occupy the same memory address in the trapframe
courtesy of union. Avoid some pointless #ifdef by spelling them both 'DAR'
in the trapframe.
2015-03-04 21:06:57 +00:00
Nathan Whitehorn
fb64e73880 Garbage collect old function prototypes. 2015-03-04 17:04:22 +00:00
Nathan Whitehorn
827cc9b981 New pmap implementation for 64-bit PowerPC processors. The main focus of
this change is to improve concurrency:
- Drop global state stored in the shadow overflow page table (and all other
  global state)
- Remove all global locks
- Use per-PTE lock bits to allow parallel page insertion
- Reconstruct state when requested for evicted PTEs instead of buffering
  it during overflow

This drops total wall time for make buildworld on a 32-thread POWER8 system
by a factor of two and system time by a factor of three, providing performance
20% better than similarly clocked Core i7 Xeons per-core. Performance on
smaller SMP systems, where PMAP lock contention was not as much of an issue,
is nearly unchanged.

Tested on:	POWER8, POWER5+, G5 UP, G5 SMP (64-bit and 32-bit kernels)
Merged from:	user/nwhitehorn/ppc64-pmap-rework
Looked over by:	jhibbits, andreast
MFC after:	3 months
Relnotes:	yes
Sponsored by:	FreeBSD Foundation
2015-02-24 21:37:20 +00:00
Nathan Whitehorn
35f612b88a Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7
and POWER8. This instruction set unifies the 32 64-bit scalar floating
point registers with the 32 128-bit vector registers into a single bank
of 64 128-bit registers. Kernel support mostly amounts to saving and
restoring the wider version of the floating point registers and making
sure that both scalar FP and vector registers are enabled once a VSX
instruction is executed. get_mcontext() and friends currently cannot
see the high bits, which will require a little more work.

As the system compiler (GCC 4.2) does not support VSX, making use of this
from userland requires either newer GCC or clang.

Relnotes:	yes
Sponsored by:	FreeBSD Foundation
2015-02-22 21:40:27 +00:00
Nathan Whitehorn
9ddcd32269 Set thread priorities on multithreaded CPUs so that threads holding a
spinlock are high-priority and threads waiting for a spinlock are set to
low priority.
2015-02-10 00:55:42 +00:00
Nathan Whitehorn
554dab448e Make 64-bit AIM trap handlers relocatable by changing all absolute branch
instructions to call through pointers instead. In general, these are set
implicitly through relocation processing. One has to be set explicitly in
machdep.c, however, to fit one handler in the tiny (8 instruction) space
available.

Reviewed by:	andreast
Differential revision:	D1554
Tested on:	UP and SMP G5, Cell, POWER5+
2015-01-21 19:07:45 +00:00
Nathan Whitehorn
9cecb88ce3 Use TOC to look up all kernel globals on powerpc64 instead of doing the
non-relocatable lis @ha, ori @l dance and hoping they are below 4 GB.

MFC after:	2 months
2015-01-18 20:00:33 +00:00
Nathan Whitehorn
bb80825435 Refactor PowerPC (especially AIM) init sequence to be less baroque.
MFC after:	2 months
2015-01-18 18:32:43 +00:00
Justin Hibbits
64b83a0576 Add Altivec/VMX register support to ptrace.
MFC after:	2 weeks
Relnotes:	yes
2015-01-14 07:01:21 +00:00
Justin Hibbits
615df4c159 Increase default MAXTSIZ to allow execution of larger binaries.
This allows executing static clang built with -O0.

The value is configurable by a sysctl, so if one needs to clamp it down, they
still can.

Discussed with:	nwhitehorn,emaste
2015-01-10 06:54:10 +00:00
Mark Johnston
bdb9ab0dd9 Factor out duplicated code from dumpsys() on each architecture into generic
code in sys/kern/kern_dump.c. Most dumpsys() implementations are nearly
identical and simply redefine a number of constants and helper subroutines;
a generic implementation will make it easier to implement features around
kernel core dumps. This change does not alter any minidump code and should
have no functional impact.

PR:		193873
Differential Revision:	https://reviews.freebsd.org/D904
Submitted by:	Conrad Meyer <conrad.meyer@isilon.com>
Reviewed by:	jhibbits (earlier version)
Sponsored by:	EMC / Isilon Storage Division
2015-01-07 01:01:39 +00:00
Justin Hibbits
41ddc6ea3d Truncate DB_SMALL_VALUE_MAX to a much lower value.
Unlike the other architectures, the PowerPC kernel is loaded under the 2GB
boundary.

MFC after:	2 weeks
2015-01-04 01:45:26 +00:00
Justin Hibbits
971e8cb1c0 Resort and resize the altivec registers in the pcb. vrsave and vscr are both
32-bit registers via the PowerPC spec.

X-MFC-with:	r276634
MFC after:	2 weeks
2015-01-03 21:08:27 +00:00
Justin Hibbits
7bde2664d6 Dump VMX registers into the userland coredump.
Reviewed by:	nwhitehorn
MFC after:	2 weeks
2015-01-03 21:06:06 +00:00
Justin Hibbits
a8920f67f3 Add support for dtrace:fbt on modules for PowerPC
Summary:
Revert the initial FBT-with-KDB changes for trap_subr*.S, and instead use the
db_trap filter function to handle dtrace trap filtering.  With this, the MMU is
enabled by the support code, simplifying the codepath altogether.

Test Plan: Tested on my G4 PowerBook

Reviewers: #powerpc, nwhitehorn

Reviewed By: nwhitehorn

Differential Revision: https://reviews.freebsd.org/D1207

MFC after:	3 weeks
2014-11-29 20:54:33 +00:00
Ed Maste
294246bb7d Revert r274772: it is not valid on MIPS
Reported by:	sbruno
2014-11-25 03:50:31 +00:00
Ed Maste
688fd61ae8 Use canonical __PIC__ flag
It is automatically set when -fPIC is passed to the compiler.

Reviewed by:	dim, kib
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D1179
2014-11-21 02:05:48 +00:00
Konstantin Belousov
14fb217784 Add arch-specific macro SFBUF_PHYS_DMAP(), which should translate the
physical address of the page to direct map address, in case
SFBUF_OPTIONAL_DIRECT_MAP returns true.  The case of PowerPC AIM
64bit, where the page physical address is identical to the direct map
address, is accidental.

Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation
2014-08-20 08:02:38 +00:00
Gleb Smirnoff
c8d2ffd6a7 Merge all MD sf_buf allocators into one MI, residing in kern/subr_sfbuf.c
The MD allocators were very common, however there were some minor
differencies. These differencies were all consolidated in the MI allocator,
under ifdefs. The defines from machine/vmparam.h turn on features required
for a particular machine. For details look in the comment in sys/sf_buf.h.

As result no MD code left in sys/*/*/vm_machdep.c. Some arches still have
machine/sf_buf.h, which is usually quite small.

Tested by:	glebius (i386), tuexen (arm32), kevlo (arm32)
Reviewed by:	kib
Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2014-08-05 09:44:10 +00:00
Alan Cox
eb2af3e758 Retire PVO_EXECUTABLE. It's neither used nor set correctly. 2014-08-01 04:53:35 +00:00
Nathan Whitehorn
0558e4bb2b In case we ever support little-endian PowerPC (probably userland only),
avoid hardcoding endianness here.
2014-07-06 16:20:37 +00:00
Nathan Whitehorn
770047f5bb Add a new CPU id for a POWER8 variant. 2014-07-06 16:19:55 +00:00
Justin Hibbits
181ca73b1a Small performance optimization. Clobber only cr0, rather than the entire CR.
Discussed with:	rdivacky,nwhitehorn
MFC after:	3 weeks
2014-04-11 06:17:44 +00:00
Justin Hibbits
a1e7448e2c Correct the SRR1 mask, it's 10-15 not 10-11.
X-MFC-with:	r263464,r263752
2014-04-06 06:18:43 +00:00
Tijl Coosemans
0a4c54d606 Rename __wchar_t so it no longer conflicts with __wchar_t from clang 3.4
-fms-extensions.

MFC after:	2 weeks
2014-04-01 14:46:11 +00:00
Warner Losh
ef53f64d9e Define PSL_SRR1_MASK for BOOK-E too so MPC85XX compiles again. 2014-03-25 22:49:33 +00:00
Justin Hibbits
196321d6b0 Mask out SRR1 bits that aren't exported to the MSR.
This appears to fix a strange condition with X on 32-bit PowerBooks I observed,
caused by one of these bits getting set in the mcontext, but not set in the
thread, which may be a symptom of another problem, more difficult to diagnose.
Since these bits aren't exported anyway, this change makes it more explicit that
the bits aren't MSR-related in SRR1.

MFC after:	3 weeks
2014-03-21 04:45:57 +00:00
Ed Maste
0fcefb433d Update NetBSD Foundation copyrights to 2-clause BSD
The NetBSD Foundation states "Third parties are encouraged to change the
license on any files which have a 4-clause license contributed to the
NetBSD Foundation to a 2-clause license."

This change removes clauses 3 and 4 from copyright / license blocks that
list The NetBSD Foundation as the only copyright holder.

Sponsored by:	The FreeBSD Foundation
2014-03-18 01:40:25 +00:00
Justin Hibbits
169dd953b0 Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events.  Thus far only direct events are supported.  I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after:	1 month
2014-02-01 02:03:50 +00:00
Justin Hibbits
e1c161e74c Unbreak non-SMP builds. This was broken by r259284. Also, reorganize the
code introduced in that revision a bit.

Reviewed by:	nwhitehorn
MFC after:	3 weeks
2014-01-31 03:55:34 +00:00
Andreas Tobler
feb86bbe4f Described in the man page but not implemented. Here it comes,
atomic_swap_32/64. The latter only for powerpc64.

MFC after:	1 month
2014-01-13 22:21:29 +00:00
Nathan Whitehorn
dcd08302e5 Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
  (aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
  non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
  requests to its parent (nexus). This allows x86 FDT devices to allocate
  both memory and IO requests and removes the last notionally MI use of
  fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
  FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
2014-01-05 18:46:58 +00:00
Justin Hibbits
1c8eb4c44b Set the PMC trapframe macros appropriately
MFC after:	2 weeks
2013-12-22 00:04:50 +00:00
Justin Hibbits
9a2edf0198 Add suspend/resume state saving for OpenPIC on PowerMac. It's likely this
can be used on the others (cpcht and psim), but that has not been tested.
2013-12-21 04:31:54 +00:00
Justin Hibbits
46cf9b63fd Rebase the PMC indices at 1, since PMC_SOFT is at 0.
MFC after:	1 week
2013-12-14 19:01:24 +00:00
Justin Hibbits
4702d987cd Add PMU-based CPU frequency scaling. This method is used on most Titanium
PowerBooks.

MFC after:	1 month
2013-12-13 02:37:35 +00:00
Andreas Tobler
05e1c598cc Increase PHYS_AVAIL_SZ because on pSeries machines we can have many logical
regions which represent the total amount of memory. The size of these regions
is not the physical size of the chip but it is a logical one and it is given
by the OpenFirmware, it is selectable at boot time and varies between 16MB and
256MB in my case. There is an 'automatic' option which would select the size as
64MB in case you have around 16GB of RAM.
To make sure we can allocate RAM with the automatic option bump this value
of PHYS_AVAIL_SZ to 256.
2013-12-05 21:34:33 +00:00
Nathan Whitehorn
fa6b4c32ba Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
2013-12-02 17:45:43 +00:00
Nathan Whitehorn
c1cb22d755 Rearchitect platform memory map parsing to make it less
Open Firmware-centric:
- Keep the static list of regions in platform.c instead of ofw_machdep.c
- Move various merging and sorting operations to platform.c as well
- Move apple_hacks code out of ofw_machdep.c and into platform_powermac.c,
  where it belongs
- Move CHRP-specific dynamic-reconfiguration memory parsing into
  platform_chrp.c instead of pretending it is shared code
2013-12-01 19:43:15 +00:00
Andreas Tobler
f367ffdecc Save and restore the trap vectors when doing OF calls on pSeries machines.
It turned out that on pSeries machines the call into OF modified the trap
vectors and this made further behaviour unpredictable.

With this commit I'm now able to boot multi user on a network booted
environment on my IntelliStation 285. This is a POWER5+ machine.

Discussed with:		nwhitehorn
MFC after:	1 week
2013-11-23 18:58:17 +00:00
Nathan Whitehorn
e537388b84 Unify handling of illegal instruction faults between AIM and Book-E. This
allows FPU emulation on AIM as well as providing support for the mfpvr
and lwsync instructions from userland on e500 cores. lwsync, in particular,
is required for many C++ programs to work correctly.

MFC after:	1 week
2013-11-17 15:12:03 +00:00
Nathan Whitehorn
debe445512 Split the function of the PCB_FPU flags into two: PCB_FPU now indicates that
the actual FPU is enabled, while PCB_FPREGS indicates that the FPU state
structure in the PCB is valid. This separation reflects the situation on
FPU-less systems in which the FP state is used by the emulator but we don't
actually want to try to turn on the non-existant FPU.

Use this flag to save and restore FP regs properly on both AIM and Book-E.
As a side effect, this sets up hard-FP and Altivec on Book-E CPUs with such
abilities except for a trap handler to call enable_fpu()/enable_altivec().
2013-11-17 14:44:22 +00:00
Nathan Whitehorn
b8b46489f8 Remove a pointless #ifdef AIM. This is just PPC64 specific, including
64-bit Book-E.
2013-11-17 02:26:09 +00:00
Nathan Whitehorn
46c4ae50bb There is no reason Book-E needs to save XER and CTR on context switches.
They aren't Book-E specific registers to begin with and, even if they were,
are defined volatile by the ABI.
2013-11-17 02:05:20 +00:00
Justin Hibbits
1bea62add7 Fix typo.
Submitted by:	loos
2013-11-13 01:51:40 +00:00
Justin Hibbits
99003fc6f6 Increase the stack size for ppc64 from 4 pages to 8.
I found a stack overflow when a coredump was taken onto a ZFS volume with
heavy network activity.  2 DSI traps, plus one DECR trap, along with several
function calls in the stack, overflowed the 4 pages.  8 page stack fixes this.

Discussed with: nwhitehorn
MFC after:	1 week
2013-11-13 01:37:52 +00:00
Nathan Whitehorn
bdac436008 Follow up r223485, which made AIM use the ABI thread pointer instead of
PCPU fields for curthread, by doing the same to Book-E. This closes
some potential races switching between CPUs. As a side effect, it turns out
the AIM and Book-E swtch.S implementations were the same to within a few
registers, so move that to powerpc/powerpc.

MFC after: 3 months
2013-11-11 17:37:50 +00:00