code to do it when the bios doesn't do it for us, flag it. Then, when
we dealloc, do an equal kludge to get rid of the address. This should
address the can't get IRQ and panic bug in a more graceful way.
# really should write a dealloc routine and just call it instead, since
# this might not fix things in the kldunload case.
o Rename the insanely long PCIC bridge ids.
o Add my copyright to pccbb.c
o Add support for the TI-1510, TI-1520 and TI-4510 series of upcoming
bridges.
o Init MFUNC if it is zero and the TI part has a MFUNC register
at offset 0x8c (1030, 1130 and 1131 don't have anything there, the
1250,1251,1251B and 1450 have a different thing there. The rest
have it. TI is likely to only do MFUNC from now on. The IRQMUX
in the 1250 series of chips needs no tweaks.
o Adjust to new exca interface.
o Add comments about TI chips that I learned in talking to an
engineer at TI.
o Add register definitions for MFUNC.
o Create CB_TI125X chipset type.
handshake between the ISR and the worker thread. Move the mutex lock
so that it only protects the cv_wait. This elimiates the not sleeping
with pccbb1 held messages some people were seeing.
Reviewed by: jhb (at least an early version)
most cases NULL is passed, but in some cases such as network driver locks
(which use the MTX_NETWORK_LOCK macro) and UMA zone locks, a name is used.
Tested on: i386, alpha, sparc64
Appologies for making this one bulk commit, but I have tested all these
changes together and don't want to break anything by trying to disentangle
it.
o Make debugging a sysctl/tunable
o Remove flags word from yenta chip info, it is unused
o Make 16-bit card I/O range and 32-bit card I/O range tunables
o Start the rename of pccbb to cbb to match NetBSD by misc renames.
o Kill the now bogus list of softcs to create kthread. Instead, just
create the kthread in the attach routine.
o Remove sc_ from some structure names. It isn't needed.
o Refine chipset lookup code.
o Match generic PCI <-> CardBus bridges. We specifically don't generically
match PCI PCMCIA bridges because they are not, with one exception, yenta
devices.
o Add some comments about the why we need to have a function table ala
OLDCARD
o The PCI interrupt routing by using the ExCA registers is needed for
for all bridges, per the spec, not just TI ones.
o Collapse TOPIC95 and TOPIC95B.
o Using the ToPIC 97 and 100 datasheets, try to support these bridges better,
but more work is needed.
o Generally clarify some XXX comments and add them in a few places where
things didn't look right to me.
o Move interrupt generating register access until after we establish an ISR.
o Add support for YV and XV cards. X and Y are numbers to be determined
later (but maybe never).
o factor powerup code for 16-bit and 32-bit cards.
o When a card supports more than one voltage, prefer the lowest supported
volage. Windows does this, and MS's design guides imply this is the
right thing to do.
o Document race between kthread_exit(0) and kldunload's unmapping of pages
that John Baldwin and I discovered.
o Debounce the CSC interrupt a little better.
o When a 16-bit card is inserted when we don't have a pccard child,
warn about it better. Ditto for 32-bit card.
o Ack ALL the interrupt bits that we get, not just 0x1.
o maybe a couple minor style nits corrected.
o Don't allow INTR_TYPE_FAST. Since we are sharing the interrupt between
CSC and the functions, they can't be FAST because fast interrupts can't
be shared.
o Add the same workaround for resume that we have in OLDCARD.
o Also, return the error from bus_generic_resume rather than ignoring it.
o Remove bogus flags that aren't used (if we need them in the future, we can
add them back).
o Add support for the TI-1031. This is the only YENTA compatible PCI-PCMCIA
bridge that I'm aware of (all the others are PCIC on a PCI bus, which is
different).
loader parameter. This allows us to more easily boot on big memory
configuration machines. hw.pccbb.start_mem. Reflect this in a sysctl
so we can read it from userland.
# Note: we need a TUNABLE_ULONG to do this right. I'll add that to
# kernel.h soon.
changing. Also change it from 0x44000000 to 0x84000000 for large memory
machines.
# the PCI bus code should do this for us. This is a bandaide, not a
# solution.
off chip that was on one prototype board. However, this appears to be
a design that many chipsets are compatible with its PPEC register set
(eg the Omega 82c094). Through the kindness of the Red Hat developer
David Woodhouse, I now have this datasheet.
I may take the advise of one of the bsd-nomads (whose name
unfortunately escapes me at the moment) and split out all these 16-bit
I/O mapped PCI devices into a separate driver...
that it has one BAR that's mapped to 0x3e0 and is I/O only. It does
not conform to the Yenta spec, like other PCI PCMICA bridges do (eg
the TI 1031, which is mostly a 1131 w/o 32bit card support). It
appears that this chip may also need to not route PCI interrupts
as well.
This chip is used in the NEC Versa 2430CD (and it appears that
sometimes it works, while other times it doesn't) and others in the
2400 series. While the NEC website claims Cardbus support, I can't figure
out how that is possible.
Submitted by: Ben Timby <ben@webexc.com>
Cirrus Logic PD6834
O2micro OZ6836
O2micro OZ6912/6972
O2micro OZ6922
O2micro OZ6933
TI1260 Note: These two aren't on TI's site, but are in
TI1260B http://www.yourvote.com/pci/vendors.txt
Plus comments for other chips found in Windows INF files, and also
referenced in various spots on the net:
* Intel 82092AA 0x12218086 16bit
* smc/Databook DB87144 0x310610b3
* SMC/databook smc34c90 0xb10610b3
* Omega/Trident 82c094 0x00940123?
* Omega/Trident 82c194 0x01941023
* Omega/Trident 82c722 0x07221023?
* Opti 82c814 0xc8141045
* Opti 82c824 0xc8241045
* NEC uPD66369 0x003e1033
Second, the TI 1130 need to have the PCI_INTR set, not cleared.
This gets Soren's machine working with NEWCARD again.
# The whole initialization is a mess and needs to be organized ala OLDCARD.
Briefly, the significant changes include:
* Way better resource management in pccbb, pccard and cardbus.
* pccard hot-removal now appears to work.
* support pre-fetchable memory in cardbus.
* update cardbus to support new pci bus interface functions.
* Fix CIS reading to no longer use rman_get_virtual().
What's not there, but in the works:
* pccard needs to do interrupt properly and not read the ISR on single
function cards.
* real resource management for pccard
* a complete implementation of CIS parsing
* need to look into how to correctly use mutex in pccbb
This is the first part of a two-part update to NEWCARD. Changes in this
commit are non-functional, and includes the following:
* indentation and other changes to meet style(9).
* other minor style consistancy changes
* addition of comments
* renaming of device_t variables to be consistant across all of NEWCARD.
(note that not all style violations are fixed in this commit -- those that
aren't will be clobbered by the next commit.)
by both OLDCARD and NEWCARD.
# didn't make the tables the same because oldcard supports more devices than
# newcard and newcard's 16-bit stuff needs some work.
Add TI4451 as well.
These are untested since I don't have the hardware to test against.
Also, some O2Micro devices are #define w/o numbers as place holders so that
I can encourage people to submit them when they appear in the channels.
mtx_enter(lock, type) becomes:
mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks)
mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized)
similarily, for releasing a lock, we now have:
mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN.
We change the caller interface for the two different types of locks
because the semantics are entirely different for each case, and this
makes it explicitly clear and, at the same time, it rids us of the
extra `type' argument.
The enter->lock and exit->unlock change has been made with the idea
that we're "locking data" and not "entering locked code" in mind.
Further, remove all additional "flags" previously passed to the
lock acquire/release routines with the exception of two:
MTX_QUIET and MTX_NOSWITCH
The functionality of these flags is preserved and they can be passed
to the lock/unlock routines by calling the corresponding wrappers:
mtx_{lock, unlock}_flags(lock, flag(s)) and
mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN
locks, respectively.
Re-inline some lock acq/rel code; in the sleep lock case, we only
inline the _obtain_lock()s in order to ensure that the inlined code
fits into a cache line. In the spin lock case, we inline recursion and
actually only perform a function call if we need to spin. This change
has been made with the idea that we generally tend to avoid spin locks
and that also the spin locks that we do have and are heavily used
(i.e. sched_lock) do recurse, and therefore in an effort to reduce
function call overhead for some architectures (such as alpha), we
inline recursion for this case.
Create a new malloc type for the witness code and retire from using
the M_DEV type. The new type is called M_WITNESS and is only declared
if WITNESS is enabled.
Begin cleaning up some machdep/mutex.h code - specifically updated the
"optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN
and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently
need those.
Finally, caught up to the interface changes in all sys code.
Contributors: jake, jhb, jasone (in no particular order)
