Commit Graph

26 Commits

Author SHA1 Message Date
Bruno Ducrot
8867dfa953 o introduce a flags 'errata' for HW bugs onto the softc.
o remove errata_a0 and introduce the corresponding flags into 'errata'.
o introduce a new errata for K8, namely some platform might set the
  PENDING_BIT but aren't able to unset it, also don't loop forever
  waiting PENDING_BIT being cleared.
o try to introduce a workaround for the PENDING_BIT stuck problem,
o support now half multipliers for K8.

Tested by:	Abdullah Al-Marrie

Approved by:	njl
2007-01-23 19:20:30 +00:00
Poul-Henning Kamp
c40da00ca3 Since DELAY() was moved, most <machine/clock.h> #includes have been
unnecessary.
2006-05-16 14:37:58 +00:00
Nate Lawson
c404dfeae1 Add support for the VIA C7-M processor family.
Remove an unnecessary check of the table's bus clock.  CPUs that
support this feature export only the high/low settings via the MSR,
packed into 32 bits.

Hardware from:	Centaur Technologies
MFC after:	1 week
2006-05-11 17:35:44 +00:00
Colin Percival
69084095dc Add frequency-voltage tables for Intel 778, 758, 773, 753, and 733J
processors.

Obtained from:	Intel Datasheet 302189-008
2006-02-25 04:55:38 +00:00
Nate Lawson
b77b750ee9 Like acpi_throttle, set frequency to 100% in attach. Some BIOSen may set
this value lower, making the system quite slow after booting.
2005-10-23 19:38:06 +00:00
Colin Percival
a26ee70316 Print cpu_vendor and the MSR value if we don't support this processor
even though we're not asking people to contact us.

Requested by:	njl
2005-07-31 06:42:27 +00:00
Colin Percival
1c16098210 Remove the instruction to "contact the maintainer" for unrecognized
CPUs.  Intel refuses to give me the information I need, and getting
more emails about this doesn't help.
2005-07-31 01:57:05 +00:00
Nate Lawson
f8420b5828 Add a driver for SMI-based SpeedStep. The hardware supports two frequency
settings and is an older version of the same design used for ICH SpeedStep.
It is only known to be available on PIIX4 chipsets.

Many thanks to Bruno Ducrot for writing the driver and Jon Noack for
testing.

Submitted by:	Bruno Ducrot
2005-04-19 16:38:24 +00:00
Nate Lawson
273efb3d32 Properly terminate the table generated from ACPI info. The cpufreq
settings are length-counted while the EST table is null-terminated.
This fixes extra garbage states being reported with ACPI probing.
2005-04-10 19:57:47 +00:00
Nate Lawson
25554b1f2b Advertise p4tcc via acpi_get_features() _PDC support. 2005-04-10 19:16:27 +00:00
Nate Lawson
15785fbe81 Add support for _PDC/_OSC by advertising that we support direct access to
the PERF_CTL/STS MSRs via the new acpi_get_features() method.  This should
allow newer systems to use SpeedStep.
2005-04-04 15:51:13 +00:00
Nate Lawson
07b68f9266 Remove check of numpst to allow more K8 variants to attach. The other
checks, including cpuid_is_k7(), will catch CPUs that really don't support
this method.

Submitted by:	Bruno Ducrot
Tested by:	Jari Kirma (kirma cs.hut.fi)
2005-03-31 06:11:04 +00:00
Nate Lawson
98af5bd6a2 Add the powernow driver, which handles AMD Mobile Athlon PowerNow! (k7)
and AMD Cool&Quiet PowerNow! (k8) cpufreq control.  This driver is enabled
for both i386 and amd64 architectures.  It has both acpi and legacy BIOS
attachments.  Thanks to Bruno Ducrot for writing this driver and Jung-uk
Kim for testing.

Submitted by:	Bruno Ducrot (ducrot:poupinou.org)
2005-03-27 21:44:21 +00:00
Nate Lawson
b6604696b6 Add support for probing EST settings from ACPI. This should handle more
modern CPUs that have multiple VID#s that aren't detectable via public
methods.  We use the control value from acpi_perf as the id16 for setting
a given frequency.
2005-03-21 06:43:25 +00:00
Nate Lawson
97d31723e7 Make a pass through all drivers checking specs for desired behavior on
SMP systems.  It appears all drivers except ichss should attach to each
CPU and that settings should be performed on each CPU.  Add comments about
this.  Also, add a guard for p4tcc's identify method being called more than
once.
2005-02-27 02:43:02 +00:00
Nate Lawson
0c5897722c Correct an off-by-one error in the number of settings est announces.
The extraneous "0" state was not fatal but useless.
2005-02-24 20:20:11 +00:00
Nate Lawson
7d0c036d10 Import a rewrite of p4tcc for the cpufreq(4) framework. This includes
a bugfix of clearing the On-Demand flag when going back to 100%.  It
has been tested and works on an IBM R32.  Note original work done by
Ted Unangst and sobomax@.
2005-02-23 16:42:56 +00:00
Nate Lawson
0dc1b976eb Support disabling individual cpufreq drivers with hints, e.g.,
hint.ichss.0.disabled="1"
2005-02-22 06:31:45 +00:00
Nate Lawson
f0fe2e77e2 Add the Enhanced SpeedStep driver (EST). Currently, this driver only works
on the previous generation of Pentium-M processors (Banias).  Support for
Dothan and later processors involves working with acpi_perf(4) to extract
information about supported states.  This driver should work on MP systems
including HTT.  It is experimental and may have a few bugs but has been
tested to not crash at least.

Thanks to Colin Percival for his initial work on this driver.
2005-02-20 20:27:59 +00:00
Maxim Sobolev
aab8b1b55f Fix the problem with incorrect throttling level reported immediately after
reboot. Safter the reboot the TCC is usually in the Automatic mode, in which
reading current performance level is likely to produce bogus results make sure
to switch it to the On-Demand mode and set to some known performance level.
Unfortunately there is no reliable way to check that TCC is in the Automatic
mode. Reading bit 4 of ACPI Thermal Monitor Control Register produces 0
regardless of the current mode.

MFC after:	1 week
2005-02-07 11:35:24 +00:00
Warner Losh
1520214745 Start all license/copyright notice comments with /*-, per tradition 2005-01-05 19:10:48 +00:00
Maxim Sobolev
ae2f5301c8 o Fix whitespace bug introduced in the previous commit.
Submitted by:	ru

o Simplify p4tcc_power_profile().

Submitted by:	maxim
2004-08-23 10:09:29 +00:00
Maxim Sobolev
acac9ce485 o Extend boot output: print out mimimum/maximum performance value and number
of performance steps available;

o similarly to Enhanced SpeedStep driver, export list of all available steps
  via hw.p4tcc.cpuperf_levels sysctl.
2004-08-23 09:47:56 +00:00
Maxim Konovalov
16c36bbe5d o Typo: Ternal -> Thermal. 2004-02-29 18:30:35 +00:00
Maxim Sobolev
983a9b60e6 - Move performance-controlling sysctls into hw.p4tcc.* tree;
Suggested by:   nate

- get rid of "magick" values in code and make sysctl's reflecting reality
  on processor versions which have one or another frequency "forbidden"
  due to errata.

MFC after:      2 weeks
2004-01-24 21:13:13 +00:00
Maxim Sobolev
e7846ad79e Add new CPU_ENABLE_TCC option, from NOTES:
CPU_ENABLE_TCC enables Thermal Control Circuitry (TCC) found in some
Pentium(tm) 4 and (possibly) later CPUs. When enabled and detected,
TCC allows to restrict power consumption by using machdep.cpuperf*
sysctls. This operates independently of SpeedStep and is useful on
systems where other mechanisms such as apm(4) or acpi(4) don't work.

Given the fact that many, even modern, notebooks don't work properly
with Intel ACPI, this is indeed very useful option for notebook owners.

Obtained from:	OpenBSD
MFC after:	2 weeks
2004-01-18 21:06:56 +00:00