Commit Graph

14 Commits

Author SHA1 Message Date
Jayachandran C.
3ba09158c8 I2C drivers for XLR/XLS processors.
- Major update to xlr_i2c.c: do multi-byte ops correctly, remove unnecessary
  code, add mutex to protect bus operations, style(9) fixes.
- Drivers for I2C devices on XLR/XLS engineering boards, ds1374u RTC, max6657
  temparature sensor and at24co2n EEPROM.

Submitted by:	Sreekanth M. S. (kanthms at netlogicmicro com)
2010-12-12 06:00:26 +00:00
Jayachandran C.
d12f1e190e New driver nlge for XLR/XLS Network Accelerator. This will support the XGMAC
and XAUI 10G interfaces in addition RGMII/SGMII 1G interfaces.  This driver
is work in progress.

board.c and board.h expanded to include more info.

Only one of rge and nlge can be enabled at a time, rge will be deprecated
when nlge stabilizes.

Submitted by:	Sriram Gorti <srgorti at netlogicmicro com>
2010-08-28 19:02:51 +00:00
Jayachandran C.
97f047a80b Initial code for XLR CompactFlash driver.
Submitted by:	Sreekanth M. S. <kanthms at netlogicmicro com>
2010-08-28 07:58:10 +00:00
Jayachandran C.
afc1e71002 Rename on_chip.c to fmn.c, as the file has just the fast messaging network
code.  The iodi.c has the bus for SoC devices, so the name on_chip.c is
misleading.
2010-08-25 09:53:00 +00:00
Jayachandran C.
257ee8a425 mips/rmi/bus_space_rmi_pci.c is needed even when PCI is disabled. This
file really provides a bus that does byteswapping, and can be used by
non-PCI components too.
2010-07-27 19:31:10 +00:00
Jayachandran C.
135fcc6da0 Fixup mips/rmi for the new mips timer code(r210403). This will get XLR
booting again.

The code is a copy of the mips/mips/tick.c with minor modifications for
XLR interrupt handling. Disable mips/rmi/clock.c for now, the PIC based
timer code will be added later.
2010-07-27 09:22:41 +00:00
Randall Stewart
4542827d4d This pushes all of JC's patches that I have in place. I
am now able to run 32 cores ok.. but I still will hang
on buildworld with a NFS problem. I suspect I am missing
a patch for the netlogic rge driver.

JC check and see if I am missing anything except your
core-mask changes

Obtained from:	JC
2010-05-16 19:43:48 +00:00
Randall Stewart
6b9c94873a - Move rmi_pci_bus_space to header and avoid extern
- remove unused and commented code (MIPS_BUS_SPACE_PCI, pic_usb_ack)
- use rmi_pci_bus_space for USB too (needs byteswap)
- uncomment xls_ehci.c in files.xlr
- changes to xls_ehci.c - updated with dev/usb/controller/ehci_*.c as

Obtained from:	JC - c.jayachandran@gmail.com
2010-03-02 12:11:00 +00:00
Randall Stewart
019ee9781a Changes for pci and pci-e support
- add bus_space_rmi_pci.c for PCI bus space
- files.xlr update for changes in files
- pcibus.c merged into xlr_pci.c (they were small files with inter-dependencies)
- xlr_pci.c - lot of changes here with few fixes, formatting cleanup
Obtained from:	C. Jayachandran (JC) - c.jayachandran@gmail.com
2010-02-20 17:19:16 +00:00
Warner Losh
9965153d75 Attempt to cope with the dev/rmi -> mips/rmi/dev move. 2010-01-11 04:49:44 +00:00
Randall Stewart
eac3c4cd27 Ok With this commit we actually get through
the mi_startup (or to the last of it).. and
hit a panic after :

uart0: <16550 or compatible> on iodi0
Trap cause = 2 (TLB miss....)

I did have to take the pci bus OUT of the
build to get this far, hit a cache error with
the PCI code in. Interesting thing is the machine
reboots too ;-)
2009-11-06 12:52:51 +00:00
Randall Stewart
7a7f91f61b ok we now get so that the uart init's and we can print. We
cannot set baud rate as they did in 6.4, this hoses things and
we loose our 38400 default term.

We now lock somewhere in tcinit.
2009-11-05 18:14:25 +00:00
Randall Stewart
6e3272ee6f more Updates on the RMI code close to compiling now ;-) 2009-10-29 15:55:25 +00:00
Randall Stewart
8f28855b07 Adds the first files from the RMI work with my re-work of their
intr_machdep.c to use updated interfaces etc. More coming.. and
some day it may compile ;-)
2009-10-15 21:05:09 +00:00