Commit Graph

177 Commits

Author SHA1 Message Date
Ian Lepore
4d7abca057 Fix low-level uart drivers that set their fifo sizes in the softc too late.
uart(4) allocates send and receiver buffers in attach() before it calls
the low-level driver's attach routine.  Many low-level drivers set the
fifo sizes in their attach routine, which is too late.  Other drivers set
them in the probe() routine, so that they're available when uart(4)
allocates buffers.  This fixes the ones that were setting the values too
late by moving the code to probe().
2013-04-01 00:44:20 +00:00
Gavin Atkinson
9ec80eff4c Correct two spelling mistakes in a comment. 2013-03-07 13:24:49 +00:00
Marius Strobl
562799bb30 Revert the part of r247600 which turned the overtemperature and power fail
interrupt shutdown handlers into filters. Shutdown_nice(9) acquires a sleep
lock, which filters shouldn't do. It also seems that kern_reboot(9) still
may require Giant to be hold.

Submitted by:	bde
2013-03-02 13:04:58 +00:00
Marius Strobl
7e026d15d5 - While Netra X1 generally show no ill effects when registering a power
fail interrupt handler, there seems to be either a broken batch of them
  or a tendency to develop a defect which causes this interrupt to fire
  inadvertedly. Given that apart from this problem these machines work
  just fine, add a tunable allowing the setup of the power fail interrupt
  to be disabled.
  While at it, remove the DEBUGGER_ON_POWERFAIL compile time option and
  make that behavior also selectable via the newly added tunable.
- Apparently, it's no longer a problem to call shutdown_nice(9) from within
  an interrupt filter (some other drivers in the tree do the same). So
  change the power fail interrupt from an handler in order to simplify the
  code and get rid of a !INTR_MPSAFE handler.
- Use NULL instead of 0 for pointers.

MFC after:	1 week
2013-03-02 00:37:31 +00:00
Marius Strobl
22f19117ed - In sbbc_pci_attach() just pass the already obtained bus tag and handle
instead of acquiring these anew.
- Use NULL instead of 0 for pointers.

MFC after:	1 week
2013-03-01 20:36:59 +00:00
Marius Strobl
1a5a52f1f9 - Remove an unused header.
- Use NULL instead of 0 for pointers.
- Let ofw_pcib_probe() return BUS_PROBE_DEFAULT instead of 0 so specialized
  PCI-PCI-bridge drivers may attach instead.
- Add WARs for PLX Technology PEX 8114 bridges and PEX 8532 switches.
  Ideally, these should live in MI code but at least for the latter we're
  missing the necessary infrastructure there.

MFC after:	1 week
2013-03-01 20:34:02 +00:00
Dimitry Andric
29658c96ce Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not).  Most of these are of the form:

static const struct bzzt_type {
	[...list of members...]
} const bzzt_devs[] = {
	[...list of initializers...]
};

The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).

I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).

Reviewed by:	yongari, marius
MFC after:	1 week
2012-11-05 19:16:27 +00:00
Marius Strobl
9e8100e77c Add a global MD macro for the VIS block size instead of duplicating
it and using magic values all over the place.

MFC after:	1 week
2012-08-31 11:15:01 +00:00
Marius Strobl
4cb0ce8a60 - Remove erroneous trailing semicolon. [1]
- Correctly determine the maximum payload size for setting the TX link
  frequent NACK latency and replay timer thresholds.

Submitted by:	stefanf [1]
MFC after:	3 days
2012-03-30 15:08:09 +00:00
Marius Strobl
1376f3e1d1 Given that this is a host-PCI-Express bridge driver, create the parent
DMA tag with a 4 GB boundary as required by PCI-Express. With r232403 in
place this actually is redundant. However, the host-PCI-Express bridge
driver is the more appropriate place for implementing this restriction.

MFC after:	3 days
2012-03-24 13:11:58 +00:00
Nathan Whitehorn
0d8d9edaaa Make ofw_bus_get_node() consistently return -1 when there is no associated
OF node, instead of a random mixture of 0 and -1. Update all checks for 0
to check for -1 instead.

MFC after:	4 weeks
2012-03-15 22:53:39 +00:00
John Baldwin
1b1596a3b3 - Add a bus_dma tag to each PCI bus that is a child of a Host-PCI bridge.
The tag enforces a single restriction that all DMA transactions must not
  cross a 4GB boundary.  Note that while this restriction technically only
  applies to PCI-express, this change applies it to all PCI devices as it
  is simpler to implement that way and errs on the side of caution.
- Add a softc structure for PCI bus devices to hold the bus_dma tag and
  a new pci_attach_common() routine that performs actions common to the
  attach phase of all PCI bus drivers.  Right now this only consists of
  a bootverbose printf and the allocate of a bus_dma tag if necessary.
- Adjust all PCI bus drivers to allocate a PCI bus softc and to call
  pci_attach_common() from their attach routines.

MFC after:	2 weeks
2012-03-02 20:38:04 +00:00
Marius Strobl
96459db58f As it turns out r227960 may still be insufficient with PREEMPTION
so try harder to get the CDMA sync interrupt delivered and also in
a more efficient way:
- wrap the whole process of sending and receiving the CDMA sync
  interrupt in a critical section so we don't get preempted,
- send the CDMA sync interrupt to the CPU that is actually waiting
  for it to happen so we don't take a detour via another CPU,
- instead of waiting for up to 15 seconds for the interrupt to
  trigger try the whole process for up to 15 times using a one
  second timeout (the code was also changed to just ignore belated
  interrupts of a previous tries should they appear).

According to testing done by Peter Jeremy with the debugging also
added as part of this commit the first two changes apparently are
sufficient to now properly get the CDMA sync interrupts delivered
at the first try though.
2012-01-28 22:42:33 +00:00
Marius Strobl
7266520baf Increase the CDMA sync timeout for Schizo bridges to 15 seconds as used by
OpenSolaris. One second turned out to be not enough for certain loads while
10 seconds were sufficient.
Reported by: Peter Jeremy

MFC after:	3 days
2011-11-24 23:48:22 +00:00
Marius Strobl
848e30ff51 s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention
of kobj(9) from device drivers.
2011-11-22 21:55:40 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Marius Strobl
bda8e754a1 Make sparc64 compatible with NEW_PCIB and enable it:
- Implement bus_adjust_resource() methods as far as necessary and in non-PCI
  bridge drivers as far as feasible without rototilling them.
- As NEW_PCIB does a layering violation by activating resources at layers
  above pci(4) without previously bubbling up their allocation there, move
  the assignment of bus tags and handles from the bus_alloc_resource() to
  the bus_activate_resource() methods like at least the other NEW_PCIB
  enabled architectures do. This is somewhat unfortunate as previously
  sparc64 (ab)used resource activation to indicate whether SYS_RES_MEMORY
  resources should be mapped into KVA, which is only necessary if their
  going to be accessed via the pointer returned from rman_get_virtual() but
  not for bus_space(9) as the later always uses physical access on sparc64.
  Besides wasting KVA if we always map in SYS_RES_MEMORY resources, a driver
  also may deliberately not map them in if the firmware already has done so,
  possibly in a special way. So in order to still allow a driver to decide
  whether a SYS_RES_MEMORY resource should be mapped into KVA we let it
  indicate that by calling bus_space_map(9) with BUS_SPACE_MAP_LINEAR as
  actually documented in the bus_space(9) page. This is implemented by
  allocating a separate bus tag per SYS_RES_MEMORY resource and passing the
  resource via the previously unused bus tag cookie so we later on can call
  rman_set_virtual() in sparc64_bus_mem_map(). As a side effect this now
  also allows to actually indicate that a SYS_RES_MEMORY resource should be
  mapped in as cacheable and/or read-only via BUS_SPACE_MAP_CACHEABLE and
  BUS_SPACE_MAP_READONLY respectively.
- Do some minor cleanup like taking advantage of rman_init_from_resource(),
  factor out the common part of bus tag allocation into a newly added
  sparc64_alloc_bus_tag(), hook up some missing newbus methods and replace
  some homegrown versions with the generic counterparts etc.
- While at it, let apb_attach() (which can't use the generic NEW_PCIB code
  as APB bridges just don't have the base and limit registers implemented)
  regarding the config space registers cached in pcib_softc and the SYSCTL
  reporting nodes set up.
2011-10-02 23:22:38 +00:00
Marius Strobl
64020d8477 Re-reading the Schizo errata suggests that it's actually tolerable to
also use the streaming buffer of pre version 5/revision 2.3 hardware as
long as we stay away from context flushes (which iommu(4) so far doesn't
take advantage of). OpenSolaris does the same.
2011-10-01 00:31:30 +00:00
Marius Strobl
fed20d2081 - Current testing shows that (ab)using the JBC performance counter in bus
cycle mode as timecounter just works fine. My best guess is that a firmware
  update has fixed this, check at run-time whether it advances and use a
  positive quality if it does. The latter will cause this timecounter to be
  used instead of the tick counter based one, which just sucks for SMP.
- Remove a redundant NULL assignment from the timecounter initialization.
2011-07-12 17:56:42 +00:00
Marius Strobl
bd1c8dd51b - Add a missing shift in schizo_get_timecount(). This happened to be non-fatal
as STX_CTRL_PERF_CNT_CNT0_SHIFT actually is zero, if we were using the
  second counter in the upper 32 bits this would be required though as the MI
  timecounter code doesn't support 64-bit counters/counter registers.
- Remove a redundant NULL assignment from the timecounter initialization.
2011-07-12 17:55:34 +00:00
John Baldwin
83c41143ca Reimplement how PCI-PCI bridges manage their I/O windows. Previously the
driver would verify that requests for child devices were confined to any
existing I/O windows, but the driver relied on the firmware to initialize
the windows and would never grow the windows for new requests.  Now the
driver actively manages the I/O windows.

This is implemented by allocating a bus resource for each I/O window from
the parent PCI bus and suballocating that resource to child devices.  The
suballocations are managed by creating an rman for each I/O window.  The
suballocated resources are mapped by passing the bus_activate_resource()
call up to the parent PCI bus.  Windows are grown when needed by using
bus_adjust_resource() to adjust the resource allocated from the parent PCI
bus.  If the adjust request succeeds, the window is adjusted and the
suballocation request for the child device is retried.

When growing a window, the rman_first_free_region() and
rman_last_free_region() routines are used to determine if the front or
end of the existing I/O window is free.  From using that, the smallest
ranges that need to be added to either the front or back of the window
are computed.  The driver will first try to grow the window in whichever
direction requires the smallest growth first followed by the other
direction if that fails.

Subtractive bridges will first attempt to satisfy requests for child
resources from I/O windows (including attempts to grow the windows).  If
that fails, the request is passed up to the parent PCI bus directly
however.

The PCI-PCI bridge driver will try to use firmware-assigned ranges for
child BARs first and only allocate a "fresh" range if that specific range
cannot be accommodated in the I/O window.  This allows systems where the
firmware assigns resources during boot but later wipes the I/O windows
(some ACPI BIOSen are known to do this) to "rediscover" the original I/O
window ranges.

The ACPI Host-PCI bridge driver has been adjusted to correctly honor
hw.acpi.host_mem_start and the I/O port equivalent when a PCI-PCI bridge
makes a wildcard request for an I/O window range.

The new PCI-PCI bridge driver is only enabled if the NEW_PCIB kernel option
is enabled.  This is a transition aide to allow platforms that do not
yet support bus_activate_resource() and bus_adjust_resource() in their
Host-PCI bridge drivers (and possibly other drivers as needed) to use the
old driver for now.  Once all platforms support the new driver, the
kernel option and old driver will be removed.

PR:		kern/143874 kern/149306
Tested by:	mav
2011-05-03 17:37:24 +00:00
Marius Strobl
301afbce99 Allocate memory for a DMA method table only in case we need to override
the iommu(4) provided one, i.e. in case of Hummingbird and Sabre bridges,
otherwise just use the iommu(4) one. This also fixes a bug introduced in
r220039 which caused an empty DMA method table to be used for the second
of a pair of Psycho bridges.
2011-03-29 19:48:03 +00:00
Marius Strobl
22508b0153 - A closer inspection of the OpenSolaris code indicates that the DMA
syncing for Hummingbird and Sabre bridges should be applied with every
  BUS_DMASYNC_POSTREAD instead of in a wrapper around interrupt handlers
  for devices behind PCI-PCI bridges only as suggested by the documentation
  (code for the latter actually exists in OpenSolaris but is disabled by
  default), which also makes more sense.
- Take advantage of the ofw_pci_setup_device method introduced in r220038
  for disabling bus parking for certain EBus bridges in order to
- Mark some unused parameters as such.
2011-03-26 16:52:31 +00:00
Marius Strobl
b09c4bd47a - Merge the *_SET macros from fire(4) which generally print out the
register changes when compiled with SCHIZO_DEBUG and take advantage
  of them.
- Add support for the XMITS Fireplane/Safari to PCI-X bridges. I tought
  I'd need this for a Sun Fire 3800, which then turned out to not being
  equipped with such a bridge though. The support for these should be
  complete but given that it hasn't actually been tested probing is
  disabled for now.
  This required a way to alter the XMITS configuration in case a PCI-X
  device is found further down the device tree so the sparc64 specific
  ofw_pci kobj was revived with a ofw_pci_setup_device method, which is
  called by the ofw_pcibus code for every device added.
- A closer inspection of the OpenSolaris code indicates that consistent
  DMA flushing/syncing as well as the block store workaround should be
  applied with every BUS_DMASYNC_POSTREAD instead of in a wrapper around
  interrupt handlers for devices behind PCI-PCI bridges only as suggested
  by the documentation (code for the latter actually exists in OpenSolaris
  but is disabled by default), which also makes more sense.
- Add a workaround for Casinni/Skyhawk combinations. Chances are that
  this solves the crashes seen when using the the on-board Casinni NICs
  of Sun Fire V480 equipped with centerplanes other than 501-6780 or
  501-6790. This also takes advantage of the ofw_pci_setup_device method.
- Mark some unused parameters as such.
2011-03-26 16:49:12 +00:00
Marius Strobl
05bff80a71 - Make a panic message better reflect the actual problem.
- A closer inspection of the OpenSolaris code indicates the block store
  workaround is only necessary in case of BUS_DMASYNC_POSTREAD.
- Mark some unused parameters as such.
2011-03-19 20:36:05 +00:00
Marius Strobl
3273bf2d65 In case reading PCIR_MINGNT fails don't use it for calculating the
latency. This is more or less a theoretical problem though as it
typically indicates way bigger problems.
2011-03-19 19:30:49 +00:00
Marius Strobl
273fb3dc7c Sync licenses and the corresponding RCS IDs with NetBSD, mainly switching
the licenses of Matthew R. Green and the TNF to 2-clause.

Obtained from:	NetBSD
2011-03-12 14:33:32 +00:00
Marius Strobl
a2c5ab4bcb Resurrect ofw_pci_if.m from r178578. 2011-02-21 21:13:18 +00:00
Rebecca Cran
6bccea7c2b Fix typos - remove duplicate "the".
PR:	bin/154928
Submitted by:	Eitan Adler <lists at eitanadler.com>
MFC after: 	3 days
2011-02-21 09:01:34 +00:00
Marius Strobl
e68f0c6425 Inherit the APB and the generic OFW PCI-PCI bridge driver from the generic
PCI-PCI bridge driver in order to safe some code.
2011-01-04 16:21:14 +00:00
Marius Strobl
f4ff513c4b Reserve INTR_MD[1-4] similarly to what BUS_DMA_BUS[1-4] are intended for
and switch sparc64 to use the first one for bus error filter handlers of
bridge drivers instead of (ab)using INTR_FAST for that so we eventually
can get rid of the latter.

Reviewed by:	jhb
MFC after:	1 month
2011-01-04 16:11:32 +00:00
Marius Strobl
6948a04f2c Convert drivers somehow missed in r200874 to multipass probing. 2010-11-15 21:58:10 +00:00
John Baldwin
d1a02e0932 Catch up to rename of the constant for the Master Data Parity Error bit in
the PCI status register.

Pointed out by:	mdf
Pointy hat to:	jhb
2010-09-09 20:26:30 +00:00
Nathan Whitehorn
eaef5f0af8 Provide for multiple, cascaded PICs on PowerPC systems, and extend the
OFW interrupt map interface to also return the device's interrupt parent.

MFC after:	8.1-RELEASE
2010-06-18 14:06:27 +00:00
Marius Strobl
3eb0900b32 - Enable DMA write parity error interrupts on Schizo with a working
implementation.
- Revert the Sun Fire V890 WAR of r205254. Instead let schizo_pci_bus()
  only panic in case of fatal errors as the interrupt triggered by the
  error the firmware of these and also Sun Fire 280R with version 7
  Schizo caused may happen as late as using the HBA and not only prior
  to touching the PCI bus (in the former case the actual error still is
  fatal but we clear it before touching the PCI bus).
  While at it count and export non-fatal error interrupts via sysctl(9).
- Remove unnecessary locking from schizo_ue().
2010-05-14 20:00:21 +00:00
Marius Strobl
89fcb8cfa7 Add missing copyright shebang. 2010-04-10 12:10:11 +00:00
Marius Strobl
d5dba21cf6 Add sbbc(4), a driver for the BootBus controller found in Serengeti and
StarCat systems which provides time-of-day services for both as well as
console service for Serengeti, i.e. Sun Fire V1280. While the latter is
described with a device type of serial in the OFW device tree, it isn't
actually an UART. Nevertheless the console service is handled by uart(4)
as this allowed to re-use quite a bit of MD and MI code. Actually, this
idea is stolen from Linux which interfaces the sun4v hypervisor console
with the Linux counterpart of uart(4).
2010-04-10 11:52:12 +00:00
Marius Strobl
d7a0fc4dca Use device_get_nameunit(9) rather than device_get_name(9) so one can
identify the reporting bridge in machines with multiple PCI domains.
2010-03-31 22:32:56 +00:00
Marius Strobl
789a702ad3 Don't re-implement device_get_nameunit(9). 2010-03-31 22:27:33 +00:00
Marius Strobl
4a717bcedc - Take advantage of the INTCLR_* macros.
- Right-justify the backslashes as per style(9).
2010-03-31 22:19:00 +00:00
Marius Strobl
cb2f0c8ce1 - Add quirk handling for Sun Fire V1280. The firmware of these machines
provides no ino-bitmap properties so forge them using the default set
  of controller interrupts and let schizo_setup_intr() take care of the
  children, hoping for non-fancy routing.
- Add quirk handling for Sun Fire V890. When booting these machines from
  disk a Schizo comes up with PCI error residing which triggers as soon
  as we register schizo_pci_bus() even when clearing it from all involved
  registers (it's no longer indicated once we're in schizo_pci_bus()
  though). Thus make PCI bus errors non-fatal until we actually touch the
  bus. With this change schizo_pci_bus() typically triggers once during
  attach in this case. Obviously this approach isn't exactly race free
  but it's about the best we can do about this problem as we're not
  guaranteed that the interrupt will actually trigger on V890 either, as
  it certainly doesn't when for example netbooting them.
2010-03-17 20:01:01 +00:00
Marius Strobl
376a67cf64 - Zero the MSI/MSI-X queue argument, otherwise mtx_init(9) can panic
indicating an already initialized lock.
- Check for an empty MSI/MSI-X queue entry before asserting that we have
  received a MSI/MSI-X message in order to not panic in case of stray MSI/
  MSI-X queue interrupts which may happen in case of using an interrupt
  handler rather than a filter.

MFC after:	3 days
2010-01-27 20:30:14 +00:00
Marius Strobl
b10fd7e9cc When setting up MSIs with a filter ensure that the event queue interrupt
is cleared as it might have triggered before and given we supply NULL
as ic_clear, inthand_add() won't do this for us in this case.
2010-01-10 18:39:29 +00:00
Marius Strobl
0e34fcfba8 - According to OpenSolaris it's sufficient to align the MSIs of a
device in the table based on the count rather than the maxcount.
  Also the previous code didn't work properly as it would have been
  necessary to reserve the entire maxcount range in order keep later
  requests from filling the spare MSIs between count and maxcount,
  which would be complicated to unreserve in fire_release_msi().
- For MSIs with filters rather than handlers only don't clear the
  event queue interrupt via fire_intr_clear() since given that these
  are executed directly would clear it while we're still processing
  the event queue, which in turn would lead to lost MSIs.
- Save one level of indentation in fire_setup_intr().
- Correct a bug in fire_teardown_intr() which prevented it from
  correctly restoring the MSI in the resource, causing allocation of
  a resource representing an MSI to fail after the first pass when
  repeatedly loading and unloading a driver module.
2010-01-10 15:12:15 +00:00
Marius Strobl
c936816f6d - Preserve the PROM IOMMU in order to allow OFW drivers to continue to
work.
- Sanity check the parameters passed to the implementations of the
  pcib_{read,write}_config() methods. Using illegal values can cause
  no real harm but it doesn't hurt to avoid unnecessary data error
  traps requiring to flush and re-enable the level 1 caches.
2010-01-02 15:19:33 +00:00
Marius Strobl
c64b2eba8a - Remove a redundant variable and an unnecessary cast.
- Fix whitespace.
2009-12-29 14:06:36 +00:00
Marius Strobl
7d027c4ff2 - Prefer i and j over i and n for temporary integer variables.
- Wrap/shorten too long lines.
- Remove a redundant variable and an unnecessary cast in schizo(4).
2009-12-29 14:03:38 +00:00
Marius Strobl
4c6587a6cf Account for firmware versions which include the CDMA interrupts in
the OFW device tree.

MFC after:	3 days
2009-12-28 14:16:40 +00:00
Marius Strobl
5cb5104246 Add a driver for the `Fire' JBus to PCIe bridges found in at least
the Sun Fire V215/V245 and Sun Ultra 25/45 machines. This driver also
already includes all the code to support the `Oberon' Uranus to PCIe
bridges found in the Fujitsu-Siemens based Mx000 machines but due to
lack of access to such a system for testing, probing of these bridges
is currently disabled.
Unfortunately, the event queue mechanism of these bridges for MSIs/
MSI-Xs matches our current MD and MI interrupt frameworks like square
pegs fit into round holes so for now we are generous and use one event
queue per MSI, which limits us to 35 MSIs/MSI-Xs per Host-PCIe-bridge
(we use one event queue for the PCIe error messages). This seems
tolerable as long as most devices just use one MSI/MSI-X anyway.
Adding knowledge about MSIs/MSI-Xs to the MD interrupt code should
allow us to decouple the 1:1 mapping at the cost of no longer being
able to bind MSIs/MSI-Xs to specific CPUs as we currently have no
reliable way to quiesce a device during the transition of its MSIs/
MSI-Xs to another event queue. This would still require the problem
of interrupt storms generated by devices which have no one-shot
behavior or can't/don't mask interrupts while the filter/handler is
executed (like the older PCIe NICs supported by bge(4)) to be solved
though.

Committed from:	26C3
2009-12-27 16:55:44 +00:00
Marius Strobl
10a290af39 - Hook up the default implementations of the MSI/MSI-X pcib_if methods
so requests may bubble up to a host-PCI bridge driver.
- Distinguish between PCI and PCIe bridges in the device description
  so it's a bit easier to follow what hangs off of what in the dmesg.
  Unfortunately we can't also tell PCI and PCI-X apart based on the
  information provided in the OFW device tree.
- Add quirk handling for the ALi M5249 found in Fire-based machines
  which are used as a PCIe-PCIe bridge there. These are obviously
  subtractive decoding as as they have a PCI-ISA bridge on their
  secondary side (and likewise don't include the ISA I/O range in
  their bridge decode) but don't indicate this via the class code.
  Given that this quirk isn't likely to apply to all ALi M5249 and
  I have no datasheet for these chips so I could implement a check
  using the chip specific bits enabling subtractive decoding this
  quirk handling is added to the MD code rather than the MI one.
2009-12-25 15:03:05 +00:00