The ifaddr is already referenced by the rtentry, and we are holding
reference on the rtentry throughout the function execution.
Sponsored by: Netflix
Sponsored by: Nginx, Inc.
machine and ${MACHINE_CPUARCH}. Otherwise the presence of a file named
"x86" or "x86.c" in the make path can cause problems.
Submitted by: lwhsu (original version)
MFC after: 1 month
Centrino 2230 firmware.
This fixes the general statistics block to be actually valid.
I've verified this by contrasting the output of iwnstats before and
after the change. The general block is now correct.
Tested:
* Intel 5100 (old format stats message)
* Intel 2230 (new format stats message)
RADIX_NODE_HEAD_LOCK as grabbing the write lock,
but RADIX_NODE_HEAD_LOCK_ASSERT as checking the read lock.
Submitted by: Vijay Singh <vijju.singh at gmail.com>
MFC after: 1 month
memory attributes. The same applies to the mmap(2) interface. Not
doing so results in machine checks.
We find the memory attributes in the EFI memory map, as queried by
mem_phys2virt().
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there is bulk TCP receiver.
Reviewed by: yongari@
Approved by: stas (mentor)
(pvid=1) and we already configure them to send to other ports.
Setting pvid=portnum would mean that there were separate vlangroups
for each ports, but 'leaking' into other ports. The result? All port
traffic flooded to all other port traffic.
Tested:
* DB120, AR9344 + AR8327 switch
The OpenWRT AR8xxx switch support flushes the ATU (address translation
unit) after each port link 'up' status change. I've modified this to
just flush on any port transition.
Whilst here, bump the number of ports on the AR8327 to 6, rather than
the default of 5. It's DB120 specific; I'll go and make this configurable
later.
There's some debugging code in here still; I am still debugging whether
this is or isn't working fully.
Tested:
* DB120, AR9344 + AR8327 switch
Obtained from: OpenWRT
so there is no reason to assert that we won't hit an error. Instead,
just return that error to caller and have the upper layer handle it.
Obtained from: FreeNAS
Reported by: rodrigc
Reviewed by: Matthew Ahrens
MFC after: 2 weeks
by having uboot_autoload() do the fdt setup (which may load a file) rather
than waiting until we're actually in the process of launching the kernel.
As part of making this happen...
- Define LOADER_FDT_SUPPORT on the uboot/lib compile command line when
MK_FDT is set.
- Make fdt_setup_fdtb() public.
- Declare public fdt_whatever() functions in a header instead of using
scattered extern decls in .c files.
This patch does four things:
* it globally disables mirroring;
* it globally sets the mirroring on each port to be disabled;
* the initial port setup now programs a portmask for the port to allow
transmission (forwarding) to all other ports bar itself;
* the vlan setup path now programs the portmask for the port to
allow transmission (forwarding) to all other ports bar itself.
Before this, I hard-coded the portmask to 0x3f which would mean all
ports (bar port 6, which currently isn't hooked up to anything.)
This means that traffic would be duplicated back out the port it
received it. I bet this wasn't .. optimal.
In any case, this _seems_ to make DHCP from my macosx laptop
work through this access point. I'll do some further testing
to ensure it's actually working correctly on all my devices.
Tested:
* DB120, AR8327 switch
being updated outside of the vcpu_lock(). The race is benign and could
potentially result in a missed notification about a pending interrupt to
a vcpu. The interrupt would not be lost but rather delayed until the next
VM exit.
The vcpu's hostcpu is now updated concurrently with the vcpu state change.
When the vcpu transitions to the RUNNING state the hostcpu is set to 'curcpu'.
It is set to 'NOCPU' in all other cases.
Reviewed by: grehan
It turns out that there's a variant format of the RX statisitcs notification
from the intel firmware. It's even more whacked - the non-BT variant has
bluetooth fields; apparently some later NICs return even _more_ bluetooth
related fields.
I'll commit the statistics structure changes here - it's a no-op for the
driver. I'll later teach the driver code to populate a statistics structure
from the received message after reformatting things correctly.
I don't _think_ it's going to fix anything related to sensitivity programming
as the CCK/OFDM (non-11n) fields are in the same place for both formats.
But the HT structure and the general statistics aren't in the same place.
I'll go find some NIC(s) that spit out the other format and when I find one,
I'll go and update the driver to handle things correctly.
Tested:
* Intel 5100 (which returns the legacy, non-BT format)
Obtained from: Linux iwlwifi
Consistently use a single tab after a #define as mentioned in style(9).
Use tabs instead of space for indenting.
Fix a typo: "hash_vesion".
No functional change.
MFC after: 3 days
triggers a VM exit with the exit reason of an external interrupt but
without a valid interrupt set in the exit interrupt information.
Tested by: Michael Dexter
Reviewed by: neel
MFC after: 1 week
(1) Invoke cpp to bring in files via #include (although the old
/include/ stuff is supported still).
(2) bring in files from either vendor tree or freebsd-custom files
when building.
(3) move all dts* files from sys/boot/fdt/dts to
sys/boot/fdt/dts/${MACHINE} as appropriate.
(4) encode all the magic to do the build in sys/tools/fdt/make_dtb.sh
so that the different places in the tree use the exact same logic.
(5) switch back to gpl dtc by default. the bsdl one in the tree has
significant issues not easily addressed by those unfamiliar with
the code.
match the device. Pinctrl will need to be added before this will work,
in addition to migrating the current board_foo.c method of configuring
these pins to something else. Non-FDT systems won't be affected, yet.
we've been using was actually just spinning due to ARM having redefined
the old 'wait for interrupt' operation via the system coprocessor as a nop
and replacing it with a WFI instruction.
code can supply a better implementation. A SoC with variable CPU frequency
is likely to use a fixed-frequency timer for DELAY() (but still use the
mpcore private timers as eventtimers).
Also remove spaces from the eventtimer and timecounter names.
implementation in arm/machdep.c. Most arm platforms either don't need to
do anything, or just need to call the standard eventtimer init routines.
A generic implementation that does that is now provided via weak linkage.
Any platform that needs to do something different can provide a its own
implementation to override the generic one.
- Don't use spaces or dots in the eventtimer or timecounter names.
They turn into sysctl node names, and it's just confusing.
- Use comparator #3 instead of #1 for one-shot events. There's an
extra 1-cycle penalty in the hardware for accessing the registers
for comparator 1, no point in paying that penalty.
- Lower the quality of the eventtimer from 1000 to 800, because the
device can't support PERCPU timers and some other device in the system
may be able to provide that.
processor-specific VMCS or VMCB. The pending exception will be delivered right
before entering the guest.
The order of event injection into the guest is:
- hardware exception
- NMI
- maskable interrupt
In the Intel VT-x case, a pending NMI or interrupt will enable the interrupt
window-exiting and inject it as soon as possible after the hardware exception
is injected. Also since interrupts are inherently asynchronous, injecting
them after the hardware exception should not affect correctness from the
guest perspective.
Rename the unused ioctl VM_INJECT_EVENT to VM_INJECT_EXCEPTION and restrict
it to only deliver x86 hardware exceptions. This new ioctl is now used to
inject a protection fault when the guest accesses an unimplemented MSR.
Discussed with: grehan, jhb
Reviewed by: jhb
were primarily used to size the sysctl name list macros that were removed
in r254295. A few other constants either did not have an associated
sysctl node, or the associated node used OID_AUTO instead.
PR: ports/184525 (exp-run)
Apparently, LIBZFS is set to a non-empty string when WITHOUT_CDDL/WITHOUT_ZFS
are set, I think this is a bug, but work around this feature for now.
Reviewed by: grehan
In my specific case, this fixes the problem of my PowerMac G5 displaying a
4:3 console on a 16:10 display with black bars on the left and right.
PR: kern/180558
Reviewed by: nwhitehorn
MFC after: 5 days
1) Add support for page back/forward.
2) While doing HOR scrolling, disable VER scrolling.
3) Checking dx_sum and dy_sum before emulate right button, this can
avoids unexpected right button press.
4) Fix stable pointer operation when emulating middle button.
Submitted by: Huang Wen Hui <huanghwh@gmail.com>
MFC after: 2 weeks
casting to the appropriate type. (Note this fix cannot be done in
sys/sparc64/sparc64/spitfire.c, since that file is also included by
assembly source files.)
Reviewed by: marius
MFC after: 3 days
that this is done for SDT probes. This fixes the syscall/tst.args.d test,
which was failing because mmap(2)'s sixth argument wasn't available to the
probe.
MFC after: 2 weeks
Quartz is a tiny module utilized Freescale VF6xx
system-on-chip and development kit produced by
Device Solutions.
Quartz is available in a form of LGA (38x38x2mm)
or as a module with high-density connectors.
Sponsored by: Device Solutions
while this won't actually be used for anything (yet), it doesn't hurt to
ensure it is exposed to the tinderbox.
Requested by: imp, jmallett
MFC after: 3 weeks
fragments; while this won't actually be used for anything (yet), it
doesn't hurt to ensure it is exposed to the tinderbox.
Requested by: imp, jmallett
MFC after: 3 weeks
The first I2C controller is only used to manage the on-board devices (PMIC
and HDMI framer) and its bus is not exposed on the expasion headers.
With this change the following pins on the P9 expansion headers are now
reserved as I2C pins:
Pin 17 - I2C1 SCL
Pin 18 - I2C1 SDA
Pin 19 - I2C2 SCL
Pin 20 - I2C2 SDA
The I2C2 is the bus that should be used to read the contents of cape
eeproms.
Approved by: adrian (mentor, implicit)
It's still hardcoded (for db120) but it is now hardcoded in all the
same place (ie, the pdata path.) The port config/status code now checks
port0/port6 as appropriate to configure things.
Tested:
* Qualcomm Atheros DB120, AR8327 switch.
There's plenty of hints that I haven't yet fleshed out and are hardcoded
in arswitch_8327.c. They're listed here (from OpenWRT) for completeness.
This is enough to get the thing up, running and pinging.
Note that the mdiobus for the on-switch switch changes - the AR8327
probes first, which exposes mdio1, and thus the arge1 mdiobus will probe
and attach as mdio2. That is what the AR9344 on-chip switch has to
attach to.
Tested:
* Qualcomm Atheros DB120
This is (almost!) enough to actually probe, attach, configure a default
port group and do some basic work. It's also totally hard-coded for
the Qualcomm Atheros DB120 board - it doesn't yet have any of the code
from OpenWRT which parses extra configuration data to know how to program
the switch. The LED stuff is also missing.
But, it's enough to facilitate board, PHY, switch and VLAN bringup,
so I am committing it now.
Tested:
* Qualcomm Atheros DB120
Obtained from: OpenWRT
switches.
* Add some new VLAN HAL methods that will be used by the VLAN configuration
code. The AR933x and later switches use slightly different register
layouts (even though the driver currently doesn't support it.)
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.
The caches really need to be invalidated even earlier than this, but this
is a big step in the right direction. The invalidate needs to happen
before the MMU is enabled, which means it has to be called from asm code
that's running with physical addressing. Fixing that will be handled in
a future change.
implementations for each of the chips we support. Most chips up through
armv6 can use the armv4 implementation which has a single coprocessor
opcode for this operation. The rather more complex armv7 implementation
comes from netbsd.
- Support for double-tap and drag.
- Support for 2-finger horizontal scrolling which translates to page-back/forward events.
- Single finger tap is equivalent to a left-button press.
- Two-finger taps are mapped to the right-button click.
- Three fingers are mapped to middle button.
- Add sysctl to disable single finger tapping.
- Fix for multiple open of /dev/atp0
- Enhanced support for the Fountain/Geyser family by adding Geyser4.
- Update manual page.
Submitted by: Rohit Grover <rgrover1@gmail.com>
MFC after: 2 weeks
While this is technically more correct, I don't think it much matters,
because the only thing in the tree that calls cpu_flush_dcache() is md(4)
and I'm > 99% sure it's bogus that it does so; md has no ability to do
anything that can perturb data cache coherency.
it into a bunch of different .c files. Remove declarations for the unused
mptramp() function from everywhere except AramadaXP (and I think it's
really not used there either, because the code that references it appears
to be insanely does-nothing in nature).
these binaries aren't immediately useful on other MIPSes, still build them
as part of mips64 world in order to expose them to tinderbox.
MFC after: 3 weeks
Sponsored by: DARPA, AFRL
a 64-bit architecture, rather than trying to share the 32-bit MIPS ficl
configuration.
When building ficl on MIPS, don't conflate 32-bit and 64-bit ISAs -- unlike
x86, we don't want a 32-bit loader on a 64-bit CPU. Use quite conservative
code generation -- e.g., softfloat, no GOT, etc -- suitable for early boot.
MFC after: 3 weeks
Sponsored by: DARPA, AFRL
-mcmodel=large, for now. While here, disable -msoft-float for clang
since it is not supported, and add -fno-dwarf2-cfi-asm to stop it from
emitting .cfi directives, which GNU as does not support.
WANDBOARD.common config, but with the freescale-specific optons and devices
all together at the bottom now. In addition to reformatting and shuffling
lines around, two new options are added because they're now known to work,
VFP and FREEBSD_BOOT_LOADER.
This config does not include any static DTB, it requires that u-boot
provide a DTB (or a custom kernel config can compile one in).
This will supercede all the existing WANDBOARD* configs, but those will
be left around for a while to help people transition their customized
configs to include this new one instead.
The name is taken from the u-boot env vars fdtfile or fdt_file. If the
name isn't fully-qualified a search is done in module_path locations.
The search order for a usable dtb in fdt_setup_fdtp() is now
- A dtb loaded with an explicit "load -t dtb" command.
- A dtb already loaded into memory somehow[*] and pointed to by fdt_to_load.
- A dtb in the memory pointed to by the u-boot env vars fdtaddr or fdt_addr.
- A file named by the u-boot env vars fdtfile or fdt_file.
- A static dtb compiled into the kernel.
* Presumably by some arch-specific command or code.
The ext4 developers tend to tag Ext4-specific flags as
"incompatible" even when such features are not relevant for
read-only support. This is a consequence of the process
though which this filesystem is implemented without design
and the fact that some new features are not extensible to
ext2/3.
Organize the features according to what we support and sort
them so that we can now read-only mount filesystems with
some features that may be found in newly formatted ext4 fs.
Submitted by: Zheng Liu
Reviewed by: pfg
MFC after: 5 days
arguments from type,filename to filename,type to be consistant with other
public file_whatever() functions, and change it to return a pointer to
the preloaded_file struct describing the file. Adjust existing callers.
The old code basically said it was going to use some particular blob
without knowing whether it could successfully do so, then it would invoke
the function to do that and return its status. If it failed, you were
done, even if other blobs might be available. Now the code attempts to use
some particular blob and if that succeeds it says so and returns success,
otherwise it moves on to try another potential blob.
One specific problem this solves is when u-boot sets an fdtaddr variable
to point to some memory address, then doesn't actually load a blob at
that address. Now the header check will fail, and the code will move
on to the fallback dtb compiled into the kernel (if any).
processor family to determine if the workaround for AMD Family 10h Erratum
383 should be enabled. To enable virtual machine migration among a
heterogeneous collection of physical machines, the hypervisor may have
been configured to report an older processor family with a reduced feature
set. Effectively, the reported processor family and its features are like
a "least common denominator" for the collection of machines.
Therefore, when the kernel is running in a virtual machine, instead of
relying upon the processor family, we now test for features that prove
that the underlying processor is not affected by the erratum. (The
features that we test for are unlikely to ever be emulated in software
on an affected physical processor.)
PR: 186061
Tested by: Simon Matter
Discussed with: jhb, neel
MFC after: 2 weeks
If a "loaderdev=<device>" env variable is set and the named device
exists, it is used. If the device doesn't exist, fall back to the
historic "probe" loop that prefers disk devices over network devices.
If the env var is not set, preserve the historic behavior of using the
first working disk device provided by u-boot, or a network device if no
functional disk device is found and a network device exists.
The old probe loop is reworked so that it checks all bootable devices
provided by u-boot rather than taking an early-out on the first device
found. This results in the cosmetic change of listing all potential boot
devices for the user, but the behavior of which device it chooses is the
same as it has always been.
Modelled after the i386 zfsloader. However, with no
2nd stage zfsboot to search for a bootable dataset,
attempt a ZFS boot if there is more than one ZFS
dataset found during the disk probe.
sys/boot/userboot/zfs
- build the ZFS boot library
sys/boot/userboot/userboot/
conf.c
- Add the ZFS pool and filesystem tables
devicename.c
- correctly format ZFS devices
main.c
- increase the size of the libstand malloc pool
to account for the increased usage from ZFS buffers
- probe for a ZFS dataset, and if one is
found, attempt to boot from it.
usr.sbin/bhyveload/bhyveload.c
- allow multiple invocations of the '-d' option
to specify multiple disks e.g. a raidz set.
Up to 32 disks are supported.
Tested with various combinations of GPT, MBR, single
and multiple disks, RAID-Z, mirrors.
Reviewed by: neel
Discussed with: avg
Tested by: Michael Dexter and others
MFC after: 3 weeks
illumos/illumos-gate@6fb4854bed
This fixes the tst.resize1.d and tst.resize2.d DTrace tests, which have
been failing since r261122 since they were causing dtrace(1) to attempt to
allocate and use large amounts of memory, and get killed by the OOM killer
as a result.
MFC after: 1 month
upstream DTrace code. It indicates that the kernel memory allocator need not
attempt to satisfy non-blocking allocations in low-memory conditions. This
has no direct equivalent in the malloc(9) flags, so it is just defined to 0
for now.
source shows that board vendors seem to be about evenly split on this.
This commit is a trivial change to note that while the previous change
was supposed to be whitespace only, this functional change also crept in.
The added lines were:
/* Board vendors use both fdtaddr and fdt_addr names. Grrrr. */
if (s == NULL)
s = ub_env_get("fdt_addr");
to use-after-free.
fdescfree proceeds to free file pointers once fd_refcnt reaches 0, but
kern_proc_{o,}filedesc_out only checked for hold count.
MFC after: 3 days
The vlapic.ops handler 'enable_x2apic_mode' is called when the vlapic mode
is switched to x2APIC. The VT-x implementation of this handler turns off the
APIC-access virtualization and enables the x2APIC virtualization in the VMCS.
The x2APIC virtualization is done by allowing guest read access to a subset
of MSRs in the x2APIC range. In non-root operation the processor will satisfy
an 'rdmsr' access to these MSRs by reading from the virtual APIC page instead.
The guest is also given write access to TPR, EOI and SELF_IPI MSRs which
get special treatment in non-root operation. This is documented in the
Intel SDM section titled "Virtualizing MSR-Based APIC Accesses".
Enforce that APIC-write and APIC-access VM-exits are handled only if
APIC-access virtualization is enabled. The one exception to this is
SELF_IPI virtualization which may result in an APIC-write VM-exit.
The temperature monitor device is enabled to sample the die temperature at
16hz. The temperature is published via sysctl. A callout routine at 10hz
monitors the temperature and throttles back the cpu if the temperature
goes over a user-settable throttle point (by default 10C less than the
critical high-point temperature for the chip). The hardware is supposed
to be able to deliver an interrupt when the temperature exceeds a settable
limit, but the interrupt never arrives so for now a callout does the job.
At attach time we read the maximum cpu frequency the chip is allowed to run
at and the cpu is set to run at that speed. It's reported at attach time.
A sysctl variable reports the current speed when queried.
New sysctl values:
dev.imx6_anatop.0.cpu_mhz: 984
dev.imx6_anatop.0.temperature: 37.9C
dev.imx6_anatop.0.throttle_temperature: 95.0C
Steven Lawrance did the initial heavy lifting on this, but I changed
enough stuff that I'm the one to blame if anything breaks.
Submitted by: Steven Lawrance <stl@koffein.net>
While here, don't overwrite the error message on interactive use and add
the missing '\n' at end of error message for the non interactive use.
Tested by: ian, myself
Approved by: adrian (mentor, implicit)
simplify the implementation of the x2APIC virtualization assist in VT-x.
Prior to this change the vlapic allowed the guest to change its mode from
xAPIC to x2APIC. We don't allow that any more and the vlapic mode is locked
when the virtual machine is created. This is not very constraining because
operating systems already have to deal with BIOS setting up the APIC in
x2APIC mode at boot.
Fix a bug in the CPUID emulation where the x2APIC capability was leaking
from the host to the guest.
Ignore MMIO reads and writes to the vlapic in x2APIC mode. Similarly, ignore
MSR accesses to the vlapic when it is in xAPIC mode.
The default configuration of the vlapic is xAPIC. The "-x" option to bhyve(8)
can be used to change the mode to x2APIC instead.
Discussed with: grehan@
HAL methods.
This allows the AR8327 code to override it as appropriate.
Tested:
* DB120 - AR8327 and AR9340 on-board switch; only running 'etherswitchcfg'
to check configs. The actual VLAN programming wasn't tested.
The registers (and perhaps the flags) are different for the AR8327, so
I'll stub those out until they're written.
Tested:
* DB120 - both on-chip AR9340 and AR8327 switches.
a single port to setup.
This may end up later being used as part of some logic to program
the PHY for a single port, rather than having to reinitialise them
all at once.
Tested:
* DB120
license, although the former is pretty safe, it wasn't intended to be
used in the version of MIPS boot2/loader upstreamed to FreeBSD.
MFC after: 3 weeks
Sponsored by: DARPA, AFRL
particular interest in (and support for) SRI International and the
University of Cambridge's BERI FPGA soft-core processor. This includes
micro device drivers for the Altera JTAG UART console, memory-mapped
flash, and the Altera SD Card IP core in both boot2 and loader. boot2
can be written to the on-board Intel StrataFlash on the DE4 board, and
loader can be placed in StrataFlash or the SD Card.
Plenty of XXX comments, but works quite well locally in practice and I
am using it daily. Although I had originally ported the ARM version
of boot2, the current version is x86-derived as that proved more
feature-complete. As we don't currently use partitions on our flash
disks, support for that has been commented out relative to x86, but
would be easy to add back. FDT support has not yet been hooked up,
although some skeleton parts have been put in place for that.
This may well be a useful starting point for ports to other 32-bit and
64-bit MIPS-ISA systems.
This merge is synchronised to CheriBSD github commit
e41d74fd71, but with some additions of
$FreeBSD.
MFC after: 3 weeks
Sponsored by: DARPA, AFRAL
capability.h currently only wraps some of its declarations in __BEGIN_DECLS/__END_DECLS, so cap_enter(), cap_sandboxed(), etc. are usable from C++ code but cap_rights_init(), cap_rights_is_valid() etc. are not. This commit fixes this distinction.
Approved by: rwatson (mentor)
MFC after: 1 week
Sponsored by: DARPA, AFRL
- intercept FIONBIO and FIOASYNC ioctls on netmap file descriptors.
libpcap calls them to set non blocking I/O on the file descriptor,
for netmap this is a no-op because there is no read/write,
but not intercepting would cause fcntl() to return -1
- rate limit and put under netmap.verbose some messages that occur
when threads use concurrently the same file descriptor.
emulated instructions.
- Add helper routines to inject interrupt information for a hardware
exception from the VM exit callback routines.
- Use the new routines to inject GP and UD exceptions for invalid
operations when emulating the xsetbv instruction.
- Don't directly manipulate the entry interrupt info when a user event
is injected. Instead, store the event info in the vmx state and
only apply it during a VM entry if a hardware exception or NMI is
not already pending.
- While here, use HANDLED/UNHANDLED instead of 1/0 in a couple of
routines.
Reviewed by: neel
Before this patch, curvnet was NULL.
When the VIMAGE kernel option is enabled, this eliminates
kernel panics when USB ethernet devices are plugged in.
PR: 183835
Submitted by: Hiroo Oono <hiroo.ono at gmail dot com>
in x2apic mode. Reads to this MSR are currently ignored but should cause a
general proctection exception to be injected into the vcpu.
All accesses to the corresponding offset in xAPIC mode are ignored.
Also, do not panic the host if there is mismatch between the trigger mode
programmed in the TMR and the actual interrupt being delivered. Instead the
anomaly is logged to aid debugging and to prevent a misbehaving guest from
panicking the host.
This is necessary because if the vlapic is configured in x2apic mode the
vioapic_process_eoi() function is called inside the critical section
established by vm_run().
about uss820dci_odevd being unused, by adding it to the part that
handles getting descriptors.
Reported by: loos
Reviewed by: hselasky
MFC after: 3 days
tested and is unfinished. However, I've tested my version,
it works okay. As before it is unfinished: timeout aren't
driven by TCP session state. To enable the HASH_ALL mode,
one needs in kernel config:
options FLOWTABLE_HASH_ALL
o Reduce the alignment on flentry to 64 bytes. Without
the FLOWTABLE_HASH_ALL option, twice less memory would
be consumed by flows.
o API to ip_output()/ip6_output() got even more thin: 1 liner.
o Remove unused unions. Simply use fle->f_key[].
o Merge all IPv4 code into flowtable_lookup_ipv4(), and do same
flowtable_lookup_ipv6(). Stop copying data to on stack
sockaddr structures, simply use key[] on stack.
o Move code from flowtable_lookup_common() that actually works
on insertion into flowtable_insert().
Sponsored by: Netflix
Sponsored by: Nginx, Inc.
and CAMBRIA boards that does not use loader to load the kernel. This
is basically how it was done for i386. This way tunables can also be
set. For example in config file:
env "/conf/AVILA.env"
And in AVILA.env:
vfs.unmapped_buf_allowed=0
MFC after: 2 weeks
fdgrowtable() now only reallocates fd_map when necessary.
This fixes fdgrowtable() to use the same logic as fdescfree() for
when to free the fd_map. The logic in fdescfree() is intended to
not free the initial static allocation, however the fd_map grows
at a slower rate than the table does. The table is intended to hold
20 fd, but its initial map has many more slots than 20. The slot
sizing causes NDSLOTS(20) through NDSLOTS(63) to be 1 which matches
NDSLOTS(20), so fdescfree() was assuming that the fd_map was still
the initial allocation and not freeing it.
This partially reverts r244510 by reintroducing some of the logic
it removed in fdgrowtable().
Reviewed by: mjg
Approved by: bapt (mentor)
MFC after: 2 weeks
all of the features in the current working draft of the upcoming C++
standard, provisionally named C++1y.
The code generator's performance is greatly increased, and the loop
auto-vectorizer is now enabled at -Os and -O2 in addition to -O3. The
PowerPC backend has made several major improvements to code generation
quality and compile time, and the X86, SPARC, ARM32, Aarch64 and SystemZ
backends have all seen major feature work.
Release notes for llvm and clang can be found here:
<http://llvm.org/releases/3.4/docs/ReleaseNotes.html>
<http://llvm.org/releases/3.4/tools/clang/docs/ReleaseNotes.html>
MFC after: 1 month
rather than SDHCI_RESET_ALL; the latter turns off clocks and power, removing
any possibility of recovering from the error.
Also, double the timeout to 2 seconds. Despite what the SD spec says about
all transactions completing in 250ms or less, I have a card which sometimes
takes more than a second to complete a write.
is attached, by establishing a temporary mapping of the registers when
necessary. This is a temporary measure to keep progress moving; in the
long run we need better control over the order in which devices attach
(better than "the order they appear in the fdt dts source").
matching 'compatible' property. This probably has a short half-life (as
do most of the fdt_ functions), but it helps solve some near-term needs
until we work out the larger problems of device instantiation order
versus the order of things in the fdt data.
If the hardware is not in a good state (like maybe clocks aren't running
because of a configuration glitch) its timeout clock may also not work
correctly, and the next command sent will hang that thread forever. The
thread in question is usually the one and only thread (at init time) or
a bio queue worker thread whose lockup will eventually lead to the whole
system locking up when it runs out of buffers.
No sd card command should take longer than 250ms. This new code establishes
a 1-second timeout to allow plenty of safety margin over that.
Normally it never needs to wait here at all; waiting is done at the end
of the prior command. When doing a crash dump, the normal interrupt
mechanism isn't used; instead the interrupt handler is called repeatedly
in a polling-like manner. This can subvert hardware-specific drivers
and lead to trying to start a new command while the previous command is
still busy on the bus. Since the SD spec says the longest a card can
take to execute any command is 250ms, use that as a timeout.
Attempt to demote the superpage if trying to pmap_enter() on
one. Panic only when the particular superpage should
no longer exist for that pmap and address.
Because pmap_enter_locked() is called from few different functions
some redundancy in superpage promotion attempts can be observed.
Hence, avoid promotion in pmap_enter_object() (if the object can
be mapped by superpage it will be handled by pmap_enter_object()
itself) and also do not waste time in pmap_enter_quick().
From now on the promotion will be performed only in pmap_enter().
It was possible to create RW superpage mapping even if
the base pages were RO due to wrong setting of the prot
flag passed to pmap_map_section().
Promotion attempt should be canceled in case of attributes
mismatch between any two base pages. Since we still use
pv_flags to maintain permission to write (PVF_WRITE) and
wired status (PVF_WIRED) for a page, it is also necessary
to take those variables into account.
Invalidate L1 PTE regardles of existance of the corresponding
l2_bucket. This is relevant when superpage is entered via
pmap_enter_object() and will fix crash on entering page
in place of not properly removed superpage.
- netmap pipes, providing bidirectional blocking I/O while moving
100+ Mpps between processes using shared memory channels
(no mistake: over one hundred million. But mind you, i said
*moving* not *processing*);
- kqueue support (BHyVe needs it);
- improved user library. Just the interface name lets you select a NIC,
host port, VALE switch port, netmap pipe, and individual queues.
The upcoming netmap-enabled libpcap will use this feature.
- optional extra buffers associated to netmap ports, for applications
that need to buffer data yet don't want to make copies.
- segmentation offloading for the VALE switch, useful between VMs.
and a number of bug fixes and performance improvements.
My colleagues Giuseppe Lettieri and Vincenzo Maffione did a substantial
amount of work on these features so we owe them a big thanks.
There are some external repositories that can be of interest:
https://code.google.com/p/netmap
our public repository for netmap/VALE code, including
linux versions and other stuff that does not belong here,
such as python bindings.
https://code.google.com/p/netmap-libpcap
a clone of the libpcap repository with netmap support.
With this any libpcap client has access to most netmap
feature with no recompilation. E.g. tcpdump can filter
packets at 10-15 Mpps.
https://code.google.com/p/netmap-ipfw
a userspace version of ipfw+dummynet which uses netmap
to send/receive packets. Speed is up in the 7-10 Mpps
range per core for simple rulesets.
Both netmap-libpcap and netmap-ipfw will be merged upstream at some
point, but while this happens it is useful to have access to them.
And yes, this code will be merged soon. It is infinitely better
than the version currently in 10 and 9.
MFC after: 3 days
