Commit Graph

14 Commits

Author SHA1 Message Date
Jung-uk Kim
2a9dc1317c Fix style(9) nits. 2006-10-09 20:26:32 +00:00
Jung-uk Kim
b5d9e49dcc Fix 32-bit PTE in the GART table.
Noticed by:	jmg
2006-10-09 20:24:49 +00:00
Jung-uk Kim
668e25a26c Use aperture base address from north bridge. Some BIOS does not encode
misc. control registers correctly and it is inconsistent with north bridge.
In fact, there are too many broken BIOS implementations out there and we
cannot fix every possible combination but at least it is consistent with
what we advertise with ioctl(2).
2006-08-21 19:10:58 +00:00
Jung-uk Kim
08945e887f Move SiS 760 to where it belongs.
PR:		98094
Submitted by:	Mike M < mmcgus at yahoo dot com >
2006-05-30 18:41:26 +00:00
John Baldwin
c626f1fe9a Change the various AGP drivers that attach to the Host-PCI bridge device to
attach to the hostb driver instead.  This means that agp can now be loaded
at runtime (in theory at least).  Also, the drivers no longer have to
explicity call device_verbose() to cancel out any earlier calls to
device_quiet() by the hostb(4) driver (this shows a limitation in new-bus,
drivers really shouldn't be doing device_quiet() until they know they are
going to drive that device, i.e. in attach).
2005-12-20 21:12:26 +00:00
Jung-uk Kim
5c0619a7f0 0xb1881106 seems to be an AGP bridge and some BIOSes incorrectly handle
the bridge.  Therefore, we give the same treatment as we did for nForce3-250
and ULi chipsets.  VIA AGPv3 code was copied from agp_via.c.
2005-11-14 21:54:20 +00:00
Jung-uk Kim
d8e205ef93 - Add a work-around for nForce3-250. Aperture base address encoded in misc.
control register and AGP bridge seems to be inconsistent with some BIOS.
Instead of relying on BIOS settings, we just take the initial aperture size
and encode them for both miscellaneous control register and AGP bridge.
Some idea was borrowed from agp_nvidia.c.

- Add preliminary ULi M1689 chipset support.  The idea was taken from Linux
because hardware and documentation are unavailable.  Not tested.

- Add more VIA chipset PCI IDs taken from Linux driver.

Approved by:	anholt (mentor)
Tested by:	Adam Gregoire <ebola at psychoholics dot org>
		Ganael Laplanche <ganael.laplanche at martymac dot com>
		K Wieland <kwieland at wustl dot edu>
2005-09-27 20:57:50 +00:00
David E. O'Brien
fd92279bef Add nForce3-250. 2005-04-08 18:04:39 +00:00
David E. O'Brien
824a5e96dc nVidia AGP chipsets beyond nForce2 are AMD64-specific.
So move the AGP support to there.

Submitted by:	Jung-uk Kim <jkim@niksun.com>
2005-04-02 01:10:09 +00:00
Warner Losh
d701c91325 Return BUS_PROBE_DEFAULT instead of 0. 2005-02-24 21:32:56 +00:00
Eric Anholt
9271f7b6d5 Correct the SiS 755 PCI ID. Confirmed against Linux code.
PR:		kern/76411
Submitted by:	Jonathan Fosburgh, jonathan at fosburgh dot org
Obtained from:	Jung-uk Kim, jkim at niksun.com
2005-02-14 07:30:04 +00:00
Eric Anholt
161cb1a5c6 Add PCI ID for VIA K8T800Pro chipset. Tested with agptest and X with DRI
enabled, but not 3D.
2004-10-05 04:40:32 +00:00
David E. O'Brien
f49f2ca64e Unconditionally support the AMD64 GART HW. 2004-08-19 20:58:24 +00:00
David E. O'Brien
3c749e3fb1 AMD64 on-CPU GART support.
This also applies to AMD64 HW running 'i386' OS.

Submitted by:	Jung-uk Kim <jkim@niksun.com>
Integration by:	obrien
2004-08-16 12:25:48 +00:00