for initializing the parts. Since I don't have any of these parts in
any of my working laptops, I'm committing this to allow people to test
it. Will MFC when I receive reports of it working.
# Note: The ToPIC 100 and the ToPIC 97 datasheets are in disagreement
# as to if this bit is supposed to be set or cleared to enable INTA routing
# so I made my best guess.
Also, comments about the various chipsets, including some grumpy ones
about how vague the O2micro datasheets are.
function and csc interrupt routing path (eg, ISA or PCI) so that we
can more easily switch between the two.
When we don't have a card ISR, put the function interrupt into ISA
mode. This effectively masks the interrupt since it happens once, and
not again until we have an ISR. This should help hangs, and might
help people that unwisely update the kernel w/o updating pccardd.
This is done at mapirq time.
Force CL-PD6729/30 to use ISA interrupt routing and maybe even detect
the number of pccard slots properly (this is still WIP). We aren't
going to support PCI interrupts for this release. A future release
should support them, however. Shibata-san's 3.3V fixes are not
included.
Add a hack which should, in i386, rewrite IRQ 0 cardbus bridges to be
IRQ 255, which should cause interrupts to be routed. This is mostly
untested since my one tester disappeared after reporting nothing
changed.
Implement, but do not use, a power method called cardbus. It looked
like a great way to get around the 3.3V problem, but it seems that you
can only use it to power cardbus cards (I get no CIS when I enable it,
so maybe we're programming things bogusly).
GC the intr and argp stuff from the slot database.
Improve the ToPIC support with the power hacks that Nakagawa-san
published in FreeBSD Press and that Hiroyuki Aizu-san ported to
-stable. The ToPIC hacks were for 3.3V support in ToPIC 100, but it
looks like the '97 also has identical registers, so use them too.
Add some #defines for the cardbus power stuff.
Finally implement making CSC on the Ricoh chips ISA or PCI. This will
allow polling mode to work on vaios, I think.
Add some minor debugging. This should likely be cleaned up or put
behing a bootverbose.
Some of this work, and earlier work, was influanced by Chiharu
Shibata-san's power handing patches posted to bsd-nomads:15866.
MFC: Soon, if possible.
the ISR. We keep track of the card state and don't call the IRS when
the card isn't inserted. This helps quite a bit with card ejection
problems that Ian was seeing.
Submitted by: Ian Dowse
MFC upon: re approvel.
register. It enables Zoom Video. It appears that on at least one
card that Monzoon is using sets these bits by default. Nothing works
when these bits are set, everything works when they are clear.
Add commentary on some of the ti bits. Make code a little clearer.
Also remove a call to pcic_pci_pd6729 which was prematurely added in
the last commit.
is the diagnostics register at offset 0x93. When bit 5 is set in this
register, bits 4-7 in ExCA register 0x5 being 0000 are required for
pci interrupt routing. When it is clear, then bit 4 of ExCA register
0x3 is used to enable it.
The only other issue is that when you route interrupts this way, you
must read ExCA register 0x4 in order to clear the interrupt, else you
get an interrupt storm.
Deal with this requirement by setting things up. It is believed that
this won't hurt other chipsets, but other chipsets may require their
own work arounds.
card bus bridges.
We now always use pci interrupts for pci cards. This will allow us to
more easily configure things. You must change your IRQ lines in
/etc/pccard.conf to match what we've probed. I'm not sure the right
way to deal with this right now.
Development of pci pcmcia has been funded by Monzoon Networks AG. I
am grateful for their generosity.
parts. This is based on the newcard code that turns it off :-). We
can now reboot after NEWCARD or Windows and have OLDCARD work. Add
support for the RL5C466 while I'm at it.
Treat TI1031 the same as the CLPD6832. It doesn't work yet, but sucks
less than it did before.
Also add a few #defines for other changes in the pipe.
cardbus bridge init routine for all cardbuses. This routine attempts
to compensate for BIOSes that do not setup the cardbus bridge into
legacy mode. Since this is becoming more common, and cardbus pci
cards have appeared on the market, this makes sense.
Do some TI113x specific initialization. This came in as part of the
patch. Report TI1[1234]XX specific config registers protected by
bootverbose.
Minor code cleanup while I'm here. I've also removed the unused code
present in the original patches, and cleaned it up slightly in places
as well.
The original patches supported more than one card, but these patches
support just one. We should likely revisit this in the future.
This makes the Compaq card that Walnut Creek CD purchased for me work
in my bouncer box.
This is a MFC candidate. However, I'd like to get some airtime on
these patches on as many laptops as possible before doing the MFC. It
does change things somewhat. In theory, apart from the minor TI
tweaks, this shouldn't change anything if the bridge is in legacy mode
already.
Submitted by: sanpei@sanpei.org (MIHIRA Yoshiro)
probes are at the 'chip' level and will get overridden by pcic_p if it is
compiled in. It's still nice to get the better probe message if it's not...
Requested by: imp
and initializes the next two ports in order starting at 03e0. This
also patches pcic_p.h to reduce the I/O ports mapped from 4 to 2.
Submitted by: Ted Faber <faber@ISI.EDU>
mode. Currently, the only supported controller is the Cirrus Logic
PD6832, but others can be supported with docs on them.
Submitted by: Ted Faber <faber@ISI.EDU>
