external NatSemi PHY chip was programmed to respond to MII address 24.
In the 3c905B ASICs, the transceiver is internal but it's still mapped
to MII address 24. But *some* 3Com 3c905B ASIC revisions map the
transceiver control registers to *all* MII addresses (0 through 31).
The miibus code probes for PHYs at all MII addresses and because of
this unusual behavior, it will attempt to map the same PHY registers
several times over, which doesn't work.
Naturally, the 3c905B NIC that I tested happened not to exhibit this
behavior.
The fix is to tweak xl_miibus_readreg() and xl_miibus_writereg()
to only respond when attempting to read from MII address 24. This
is safe to do since the 3Com documentation indicates that the PHY
and/or internal transceiver will always be mapped to address 24,
and there are no 3Com XL NICs with more than one PHY.
Add back "src-eBones" to "cvs-supfile" and "secure-cvs-supfile".
Even though the eBones tree is disused, it still has files in the
repository. People fetching the repository might want them.
didn't document the couple day window when the units were in terms of
ticks rather than ms.
Also add note about libreadline major version retrograde motion.
New Features:
Greatly improved VBI capture support. (mainly for the AleVT port)
Supports select() on /dev/vbi
Improved RISC program for RGB+VBI capture to capture both evenodd
VBI data even when only capturing even only (or odd only) video
Based on code from Juha Nurmela <Juha.Nurmela@quicknet.inet.fi>
Support for Hauppauge 627 and Temic 4006
Submitted by: Maurice Castro <maurice@atum.castro.aus.net>
Bug Fix:
Fix bug in AverMedia card detection.
Judge: TN3270, you are charged with being superfluous to
requirement, and have been found guilty.
Defence, do you have any final words?
Defence lawyer: Yes,..
*!BLAM!*
Judge: Contempt of court!! That blood is disgusting! Sergeant?
Sergeant: Sah!?
Judge: Get that mess out of here.
Sergeant: Sah!!
Judge: Anyone else have anything else to say?
...
Judge: Executioner!
Executioner: My lord?
Judge: Carry out the sentence, forthwith!
Executioner: As my lord wishes...
*!BLAM!* *!BLAM!* *!BLAM!*
Judge: Any more matters for the court today?
...
an operation, as a kernel client may not have previously checked the CPU
type (it may not be able to).
Also correct the function declaration style for the mem_range functions to
match the rest of this file (oops).
Submitted by: gibbs
- eliminate the fast/slow timeout lists for TCP and instead use a
callout entry for each timer.
- increase the TCP timer granularity to HZ
- implement "bad retransmit" recovery, as presented in
"On Estimating End-to-End Network Path Properties", by Allman and Paxson.
Submitted by: jlemon, wollmann
Break out the detection logic for the aic7855 and properly report
these chips as 7855s instead of 7850s.
The 2940AU_CN is an aic7860 based card, not aic7860.
Not setting CACHETHEN turned out to be a bad idea. It can cause
spurious corruption under heavy PCI load with multiple masters.
