Commit Graph

242 Commits

Author SHA1 Message Date
Gleb Smirnoff
b2d3d26fa0 Move rl(4) to dev/rl. 2014-09-19 10:32:20 +00:00
Gleb Smirnoff
c8dfaf382f Mechanically convert to if_inc_counter(). 2014-09-19 03:51:26 +00:00
Gleb Smirnoff
1bffa9511f Use define from if_var.h to access a field inside struct if_data,
that resides in struct ifnet.

Sponsored by:	Nginx, Inc.
2014-08-30 19:55:54 +00:00
John Baldwin
068d8643ad Fix various NIC drivers to properly cleanup static DMA resources.
In particular, don't check the value of the bus_dma map against NULL
to determine if either bus_dmamem_alloc() or bus_dmamap_load() succeeded.
Instead, assume that bus_dmamap_load() succeeeded (and thus that
bus_dmamap_unload() should be called) if the bus address for a resource
is non-zero, and assume that bus_dmamem_alloc() succeeded (and thus
that bus_dmamem_free() should be called) if the virtual address for a
resource is not NULL.

In many cases these bugs could result in leaks when a driver was detached.

Reviewed by:	yongari
MFC after:	2 weeks
2014-06-11 14:53:58 +00:00
Pyun YongHyeon
74a034464e Disable TX IP/TCP/UDP checksum offloading for RTL8168C/RTL8168CP.
Previously only TX IP checksum offloading was disabled but it's
reported that TX checksum offloading for UDP datagrams with IP
options also generates corrupted frames.  Reporter's controller is
RTL8168CP but I guess RTL8168C also have the same issue since it
shall share the same core.

Reported and tested by:	tuexen
2014-05-13 05:19:29 +00:00
Marius Strobl
f1a5f291dd - Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
driver as version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8111B. This
  makes reception of packets work with the RTL8168G (HW rev. 0x4c000000) in
  my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with:	yongari

MFC after:	5 days
2014-02-05 23:13:40 +00:00
Luigi Rizzo
ce3ee1e7c4 update to the latest netmap snapshot.
This includes the following:
- use separate memory regions for VALE ports
- locking fixes
- some simplifications in the NIC-specific routines
- performance improvements for the VALE switch
- some new features in the pkt-gen test program
- documentation updates

There are small API changes that require programs to be recompiled
(NETMAP_API has been bumped so you will detect old binaries at runtime).

In particular:
- struct netmap_slot now is 16 bytes to support an extra pointer,
  which may save one data copy when using VALE ports or VMs;
- the struct netmap_if has two extra fields;

MFC after:	3 days
2013-11-01 21:21:14 +00:00
Pyun YongHyeon
c3767eab77 Add preliminary support for RTL8168EP.
Submitted by:	Edward O'Callaghan (eocallaghan <> alterapraxis dot com)
2013-10-29 05:37:05 +00:00
Pyun YongHyeon
ab9f923ebf Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
RTL8168GU has two variants(GMII and MII) but it uses the same chip
revision id.  Driver checks PCI device id of controller and
sets internal capability flag(i.e. jumbo frame and link speed down
in WOL).

H/W donated by:	RealTek Semiconductor Corp.
2013-10-29 05:30:21 +00:00
Gleb Smirnoff
76039bc84f The r48589 promised to remove implicit inclusion of if_var.h soon. Prepare
to this event, adding if_var.h to files that do need it. Also, include
all includes that now are included due to implicit pollution via if_var.h

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-26 17:58:36 +00:00
Pyun YongHyeon
214c71f64d Add preliminary support for RTL8106E PCIe FastEthernet.
H/W donated by:	RealTek Semiconductor Corp.
2013-10-21 06:27:20 +00:00
Pyun YongHyeon
fd3ae0f5be Correct MAC revision bits. Previously it always cleared bit 20 and
bit 21.
2013-10-21 06:22:20 +00:00
Sergey Kandaurov
2df0539200 Correct comment typos. 2013-06-28 14:41:06 +00:00
Luigi Rizzo
d61ba75247 use netmap_rx_irq() / netmap_tx_irq() to handle interrupts in
netmap mode, removing the logic from individual drivers.

(note: if_lem.c not updated yet due to some other pending modifications)
2013-04-30 16:18:29 +00:00
Pyun YongHyeon
3c2a957d2d Disable TX IP header checksum offloading on RL_HWREV_8168CP. The
controller generates wrong checksummed frame if the IP packet has
IP options.

Submitted by:	Alexander Bluhm via brad@openbsd
2013-03-13 02:11:45 +00:00
Gleb Smirnoff
c6499eccad Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags in sys/dev.
2012-12-04 09:32:43 +00:00
Dimitry Andric
29658c96ce Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not).  Most of these are of the form:

static const struct bzzt_type {
	[...list of members...]
} const bzzt_devs[] = {
	[...list of initializers...]
};

The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).

I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).

Reviewed by:	yongari, marius
MFC after:	1 week
2012-11-05 19:16:27 +00:00
Gavin Atkinson
e935190a33 Switch some PCI register reads from using magic numbers to using the names
defined in pcireg.h

MFC after:	1 week
2012-09-19 12:27:23 +00:00
Gavin Atkinson
389c8bd51e Align the PCI Express #defines with the style used for the PCI-X
#defines.  This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
  s/PCIR_EXPRESS_/PCIER_/g
  s/PCIM_EXP_/PCIEM_/g
  s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with:	jhb
MFC after:	1 week
2012-09-18 22:04:59 +00:00
Ed Maste
1221cc675d Use array notation for consistency. 2012-08-13 16:03:30 +00:00
Kevin Lo
de8925a261 Fix size of the bcopy when extracting ethernet address
Obtained from:	DragonFly
2012-06-25 05:47:12 +00:00
Kevin Lo
82242c11a6 Make sure we don't dereference a null pointer 2012-05-11 07:12:18 +00:00
Bjoern A. Zeeb
fca1e0abf3 Do not toggle IFCAP_TSO4 if we would also do TSO6. Given the driver does
not currently announce/support TSO6 that cannot happen. Clean it up anyway
for consistency.

Reviewed by:	yongari
MFC after:	1 week
2012-04-24 08:30:55 +00:00
Pyun YongHyeon
fed3ed710d Prefer RL_GMEDIASTAT register to RGEPHY_MII_SSR register to
extract a link status of PHY when parent driver is re(4).
RGEPHY_MII_SSR register does not seem to report correct PHY status
on some integrated PHYs used with re(4).
Unfortunately, RealTek PHYs have no additional information to
differentiate integrated PHYs from external ones so relying on PHY
model number is not enough to know that.  However, it seems
RGEPHY_MII_SSR register exists for external RealTek PHYs so
checking parent driver would be good indication to know which PHY
was used. In other words, for non-re(4) controllers, the PHY is
external one and its revision number is greater than or equal to 2.
This change fixes intermittent link UP/DOWN messages reported on
RTL8169 controller.

Also, mii_attach(9) is tried after setting interface name since
rgephy(4) have to know parent driver name.

PR:	kern/165509
2012-02-28 05:23:29 +00:00
Luigi Rizzo
64ae02c365 A bunch of netmap fixes:
USERSPACE:
1. add support for devices with different number of rx and tx queues;

2. add better support for zero-copy operation, adding an extra field
   to the netmap ring to indicate how many buffers we have already processed
   but not yet released (with help from Eddie Kohler);

3. The two changes above unfortunately require an API change, so while
   at it add a version field and some spares to the ioctl() argument
   to help detect mismatches.

4. update the manual page for the two changes above;

5. update sample applications in tools/tools/netmap

KERNEL:

1. simplify the internal structures moving the global wait queues
   to the 'struct netmap_adapter';

2. simplify the functions that map kring<->nic ring indexes

3. normalize device-specific code, helps mainteinance;

4. start exploring the impact of micro-optimizations (prefetch etc.)
   in the ixgbe driver.
   Use 'legacy' descriptors on the tx ring and prefetch slots gives
   about 20% speedup at 900 MHz. Another 7-10% would come from removing
   the explict calls to bus_dmamap* in the core (they are effectively
   NOPs in this case, but it takes expensive load of the per-buffer
   dma maps to figure out that they are all NULL.

   Rx performance not investigated.

I am postponing the MFC so i can import a few more improvements
before merging.
2012-02-27 19:05:01 +00:00
Pyun YongHyeon
e7e7593cd8 Use correct Config registers for RTL8139 family. Unlike RTL8168 and
RTL810x family , RTL8139 has different register map for Config
registers.

While here, follow the lead of re(4) in WOL configuration.
 - Disable WOL_UCAST and WOL_MCAST capabilities by default.
 - Config5 register write does not need to unlock EEPROM access
   on RTL8139 family but unlocking EEPROM access does not affect
   its operation and make it consistent with re(4).

Reported by:	Matt Renzelmann  mjr <> cs dot wisc dot edu
2012-02-25 04:54:51 +00:00
Pyun YongHyeon
df2dc2b3ae For RTL8168/8111D controller, make sure to wake PHY from power down
mode.  Otherwise, PHY access times out under certain conditions.
2012-02-14 00:54:40 +00:00
Pyun YongHyeon
bc6b129bcd Fix a logic error which resulted in putting PHY into sleep when WOL
is active.  If WOL is active driver should not put PHY into sleep.
This change makes WOL work on RTL8168E.
2012-01-19 20:13:16 +00:00
Pyun YongHyeon
1f32d3b76f Free allocated jumbo buffers when controller is stopped. 2012-01-17 19:36:53 +00:00
Pyun YongHyeon
cba163625e Use a RX DMA tag to free loaded RX DMA maps.
Previously it used a TX DMA tag.
2012-01-17 19:31:03 +00:00
Luigi Rizzo
579a6e3c4e add netmap support for "em", "lem", "igb" and "re".
On my hardware, "em" in netmap mode does about 1.388 Mpps
on one card (on an Asus motherboard), and 1.1 Mpps on another
card (PCIe bus). Both seem to be NIC-limited, because
i have the same rate even with the CPU running at 150 MHz.

On the "re" driver the tx throughput is around 420-450 Kpps
on various (8111C and the like) chipsets. On the Rx side
performance seems much better, and i can receive the full
load generated by the "em" cards.

"igb" is untested as i don't have the hardware.
2011-12-05 15:33:13 +00:00
Pyun YongHyeon
6830588dd1 To save more power, switch to 10/100Mbps link when controller is
put into suspend/shutdown.  Old PCI controllers performed that
operation in firmware but for RTL8111C or newer controllers, it's
responsibility of driver.  It's not clear whether the firmware of
RTL8111B still downgrades its speed to 10/100Mbps so leave it as it
was.
2011-11-23 23:29:18 +00:00
Pyun YongHyeon
eef0e49628 Make sure to stop TX MAC before freeing queued TX frames.
For RTL8111DP, check if the TX MAC is active by reading RL_GTXSTART
register.  For RTL8402/8168E-VL/8168F/8411, wait until TX queue is
empty.
2011-11-23 22:07:13 +00:00
Pyun YongHyeon
fcb220acd1 Disable accepting frames in re_stop() to put RX MAC into idle state.
Because there is no reliable way to know whether RX MAC is in
stopped state, rejecting all frames would be the only way to
minimize possible races.
Otherwise it's possible to receive frames while stop command
execution is in progress and controller can DMA the frame to freed
RX buffer during that period.
This was observed on recent PCIe controllers(i.e. RTL8111F).

While this change may not be required on old controllers it
wouldn't make negative effects on old controllers.  One side effect
of this change is disabling receive so driver reprograms RL_RXCFG
to receive WOL frames when it is put into suspend or shutdown.

This should address occasional 'memory modified free' errors seen
on recent RealTek controllers.
2011-11-23 02:08:05 +00:00
Pyun YongHyeon
1662c49e56 Perform media change after setting IFF_DRV_RUNNING flag. Without it,
driver would ignore the first link state update if controller
already established a link such that it would have to take
additional link state handling in re_tick().
2011-11-22 23:27:59 +00:00
Pyun YongHyeon
44f7cbf586 Writing access to RL_CFG5 register also requires EEPROM write
access.
While I'm here, enable WOL through magic packet but disable waking
up system via unicast, multicast and broadcast frames.  Otherwise,
multicast or unicast frame(e.g. ICMP echo request) can wake up
system which is not probably wanted behavior on most environments.
This was not known as problem because RL_CFG5 register access had
not effect until this change.
The capability to wake up system with unicast/multicast frames
are still set in driver, default off, so users who need that
feature can still activate it with ifconfig(8).
2011-11-22 23:19:49 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Pyun YongHyeon
d467ffaa66 Add preliminary support for RTL8168/8111F PCIe Gigabit ethernet.
H/W donated by:	RealTek Semiconductor Corp.
2011-11-17 22:07:50 +00:00
Pyun YongHyeon
6b0a8e0476 Add preliminary support for second generation RTL8105E PCIe
FastEthernet.

H/W donated by:	RealTek Semiconductor Corp.
2011-11-17 21:24:56 +00:00
Pyun YongHyeon
017f1c8db9 Disable PCIe ASPM (Active State Power Management) for all
controllers.
More and more RealTek controllers started to implement EEE feature.
Vendor driver seems to load a kind of firmware for EEE with
additional PHY fixups.  It is known that the EEE feature may need
ASPM support.  Unfortunately there is no documentation for EEE of
the controller so enabling ASPM may cause more problems.
2011-11-16 23:29:27 +00:00
Pyun YongHyeon
600af6c29b Add missing driver lock in SIOCSIFCAP handler. 2011-11-16 22:09:14 +00:00
Pyun YongHyeon
d56f7f5284 Add preliminary support for RTL8411 PCIe Gigabit ethernet with
integrated card reader.

H/W donated by:	RealTek Semiconductor Corp.
2011-11-16 22:05:38 +00:00
Pyun YongHyeon
a9e3362a07 Add preliminary support for RTL8402 PCIe FastEthernet with
integrated card reader.

H/W donated by:	RealTek Semiconductor Corp.
2011-11-16 21:37:45 +00:00
Marius Strobl
b303030684 Sprinkle some const. 2011-11-02 23:23:19 +00:00
Pyun YongHyeon
57c81d92ae Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
Pyun YongHyeon
caa19d50d1 Add new device id of D-Link DGE-530T Rev. C controller. DGE-503T
Rev A1 and B1 is supported by sk(4) but the DGE-530T Rev. C
controller is re-branded RealTek 8169 controller.

PR:	kern/159116
Approved by:	re (kib)
2011-07-30 01:06:12 +00:00
John Baldwin
3b0a4aef96 Do a sweep of the tree replacing calls to pci_find_extcap() with calls to
pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
Pyun YongHyeon
39e692013a Add initial support for RTL8401E PCIe Fast Ethernet.
PR:	154789
2011-02-16 21:59:42 +00:00
Pyun YongHyeon
bc2a100257 Disable TX IP checksum offloading for RTL8168C controllers. The
controller in question generates frames with bad IP checksum value
if packets contain IP options.  For instance, packets generated by
ping(8) with record route option have wrong IP checksum value. The
controller correctly computes checksum for normal TCP/UDP packets
though.
There are two known RTL8168/8111C variants in market and the issue
I observed happened on RL_HWREV_8168C_SPIN2. I'm not sure
RL_HWREV_8168C also has the same issue but it would be better to
assume it has the same issue since they shall share same core.
RTL8102E which is supposed to be released at the time of
RTL8168/8111C announcement does not have the issue.

Tested by:	Konstantin V. Krotov ( kkv <> insysnet dot ru )
2011-02-04 17:49:55 +00:00
Pyun YongHyeon
54899a96e1 Add support for RTL8105E PCIe Fast Ethernet controller. It seems
the controller has a kind of embedded controller/memory and vendor
applies a large set of magic code via undocumented PHY registers in
device initialization stage. I guess it's a firmware image for the
embedded controller in RTL8105E since the code is too big compared
to other DSP fixups. However I have no idea what that magic code
does and what's purpose of the embedded controller. Fortunately
driver seems to still work without loading the firmware.

While I'm here change device description of RTL810xE controller.

H/W donated by:	Realtek Semiconductor Corp.
2011-01-26 21:14:20 +00:00