Commit Graph

134 Commits

Author SHA1 Message Date
Pyun YongHyeon
52ee8ac027 Increase the number of TX DMA segments from 32 to 35. It turned
out 32 is not enough to support a full sized TSO packet.
While I'm here fix a long standing bug introduced in r169632 in
bce(4) where it didn't include L2 header length of TSO packet in
the maximum DMA segment size calculation.

In collaboration with:	rmacklem
MFC after:		2 weeks
2014-03-31 01:54:59 +00:00
Pyun YongHyeon
f6f20128c7 Revert r234666. Clearing TWSI IRQ seems to cause watchdog timeout
on old Yukon II controllers.

Tested by:	bsam
MFC after:	2 weeks
2014-02-07 05:08:59 +00:00
Eitan Adler
7a22215c53 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
Pyun YongHyeon
b52d3ddba3 Perform media change after setting IFF_DRV_RUNNING flag. Without it,
driver would ignore the first link state update if controller
already established a link.

Reported by:	bsam
Tested by:	bsam
2013-11-01 05:03:47 +00:00
Gleb Smirnoff
76039bc84f The r48589 promised to remove implicit inclusion of if_var.h soon. Prepare
to this event, adding if_var.h to files that do need it. Also, include
all includes that now are included due to implicit pollution via if_var.h

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-26 17:58:36 +00:00
Marius Strobl
2dc26832f7 - Merge from r249476: Ensure that PCI bus BUS_GET_DMA_TAG() method sees
the actual PCI device which makes the request for DMA tag, instead of
  some descendant of the PCI device, by creating a pass-through trampoline.
- Sprinkle const on tables.
- Use NULL instead of 0 for pointers.
- Take advantage of nitems().

MFC after:	1 week
2013-05-30 12:16:55 +00:00
Gabor Kovesdan
ab3f6b347e - Correct mispellings of the word occurrence
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de> (via private mail)
2013-04-17 11:40:10 +00:00
Pyun YongHyeon
1c3515d2d5 RX checksum offloading on old Yukon controllers seem to cause more
problems.  Disable RX checksum offloading on controllers that don't
use new descriptor format but give chance to enable it with
ifconfig(8).
2013-02-27 05:03:35 +00:00
Gleb Smirnoff
c6499eccad Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags in sys/dev.
2012-12-04 09:32:43 +00:00
Pyun YongHyeon
fca56fb2c3 For Yukon II controllers that implement optional temperature sensor
and voltage sensor, TWSI is used to get sensor data.  msk(4) does
not monitor these sensors and interrupt for TWSI completion is
disabled by default.
However, due to unknown reason, the TWSI completion interrupt fires
and it resulted in interrupt storm.  To fix it, acknowledges the
TWSI completion interrupt if driver see the event.  Given that not
all Yukon II controllers show the issue it could be a silicon bug
which does not honor interrupt masking.

Probably the right way to address the issue is disabling automatic
TWSI cycle initiation against these sensors.  It would be even
better to implement reading voltage/temperature from the NIC but it
requires access to National LM80 through TWSI and documentation to
do that is not available yet(probably will never happen).

Reported by:	jhb
Tested by:	jhb
MFC after:	2 weeks
2012-04-25 02:46:13 +00:00
Kevin Lo
5bbe0c5357 ether_ifattach() sets if_mtu to ETHERMTU, don't bother set it again
Reviewed by:	yongari
2012-01-07 09:41:57 +00:00
Pyun YongHyeon
7659f3c35d Increase wait time for OP_TCPSTART command processing. It seems
100us is not enough to ensure prefetch unit work.
2011-12-19 19:02:36 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Pyun YongHyeon
355a415e92 Enable 64bit DMA addressing support for all msk(4) controllers.
Unnecessarily complex LE format used on Marvell controller was
main reason not to enable 64bit DMA addressing in driver.  If high
32bit address of DMA address of TX/RX buffer is changed, driver has
to generate a new LE.  In TX path, driver will keep track of lastly
used high 32bit address of DMA address and generate a new LE
whenever it sees high address change in the DMA address. In RX path,
driver will always use two LEs to specify 64bit DMA address of RX
buffer.  If the high 32bit address of DMA address of RX buffer is
the same as previous DMA address of RX buffer, driver does not have
to use two LEs but driver will use two LEs for simplicity in RX
ring management.

One of draw back for switching to 64bit DMA addressing is that the
large amount of LEs are used to specify 64bit DMA address such that
number of available LEs for TX/RX buffers are considerably reduced.
To mitigate the issue, increase number of available LEs from 256 to
384 for TX and from 256 to 512 for RX. For 32bit architectures,
msk(4) does not use 64bit DMA addressing to save resources.

Tested by:	das
2011-11-16 19:25:26 +00:00
Pyun YongHyeon
57c81d92ae Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
Pyun YongHyeon
7c017a713e Correctly check MAC running status before disabling TX/RX MACs. 2011-05-31 01:30:58 +00:00
Pyun YongHyeon
81e2a01a77 style(9) 2011-05-24 20:39:07 +00:00
Pyun YongHyeon
8be664b8b7 When MTU is changed, check whether driver should be reinitialized or
not.  If reinitialized is required, clear driver running flag.
2011-05-23 21:56:04 +00:00
Pyun YongHyeon
e0029a7260 Add initial support for Marvell 88E8055/88E8075 Yukon Supreme. 2011-05-23 21:51:47 +00:00
Pyun YongHyeon
fe0b141e73 Do not touch ASF related register for controllers that do not have
these registers. Also disable Watchdog of ASF microcontroller.
2011-05-23 21:11:46 +00:00
Pyun YongHyeon
c6a34f768e Make sure to enable all clocks before accessing registers.
Releasing PHY from power down/COMA is done after enabling all
clocks. While I'm here remove unnecessary controller reset.
2011-05-23 21:00:56 +00:00
Pyun YongHyeon
d91192e329 Do not configure RAM registers for controllers that do not have
them.  These registers are defined only for Yukon XL, Yukon EC and
Yukon FE.
2011-05-23 20:18:09 +00:00
Pyun YongHyeon
7b4f47c1db Rework store and forward configuration of TX MAC FIFO. Basically it
enables store and forward mode except for jumbo frame on Yukon
Ultra.
2011-05-23 20:09:32 +00:00
Pyun YongHyeon
10e71e2260 Do not blindly clear entire GPHY control register. It seems some
bits of the register is used for other purposes such that clearing
these bits resulted in unexpected results such as corrupted RX
frames or missing LE status updates.  For old controllers like
Yukon EC it had no effect but it caused all kind of troubles on
Yukon Supreme.
This change shall improve stability of controllers like Yukon
Ultra, Ultra2, Extreme, Optima and Supreme.
2011-05-23 19:58:08 +00:00
Gleb Smirnoff
4c5a247b54 When msk_detach() is called from msk_attach(), ifp may be
yet not initialized.
2011-04-25 04:55:50 +00:00
John Baldwin
3b0a4aef96 Do a sweep of the tree replacing calls to pci_find_extcap() with calls to
pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
Matthew D Fleming
cbc134ad03 Introduce signed and unsigned version of CTLTYPE_QUAD, renaming
existing uses.  Rename sysctl_handle_quad() to sysctl_handle_64().
2011-01-19 23:00:25 +00:00
Matthew D Fleming
f4f04709ac Fix a few more SYSCTL_PROC() that were missing a CTLFLAG type specifier. 2011-01-19 00:57:58 +00:00
Pyun YongHyeon
3c5571b374 Fix endianness bug introduced in r205091.
After controller updates control word in a RX LE, driver converts
it to host byte order. The checksum value in the control word is
stored in big endian form by controller. r205091 didn't account for
the host byte order conversion such that the checksum value was
incorrectly interpreted on big endian architectures which in turn
made all TCP/UDP frames dropped. Make RX checksum offload work
on any architectures by swapping the checksum value.

Reported by:	Sreekanth M. ( kanthms <> netlogicmicro dot com )
Tested by:	Sreekanth M. ( kanthms <> netlogicmicro dot com )
2010-12-31 22:18:41 +00:00
Marius Strobl
efd4fc3fb3 o Flesh out the generic IEEE 802.3 annex 31B full duplex flow control
support in mii(4):
  - Merge generic flow control advertisement (which can be enabled by
    passing by MIIF_DOPAUSE to mii_attach(9)) and parsing support from
    NetBSD into mii_physubr.c and ukphy_subr.c. Unlike as in NetBSD,
    IFM_FLOW isn't implemented as a global option via the "don't care
    mask" but instead as a media specific option this. This has the
    following advantages:
    o allows flow control advertisement with autonegotiation to be
      turned on and off via ifconfig(8) with the default typically
      being off (though MIIF_FORCEPAUSE has been added causing flow
      control to be always advertised, allowing to easily MFC this
      changes for drivers that previously used home-grown support for
      flow control that behaved that way without breaking POLA)
    o allows to deal with PHY drivers where flow control advertisement
      with manual selection doesn't work or at least isn't implemented,
      like it's the case with brgphy(4), e1000phy(4) and ip1000phy(4),
      by setting MIIF_NOMANPAUSE
    o the available combinations of media options are readily available
      from the `ifconfig -m` output
  - Add IFM_FLOW to IFM_SHARED_OPTION_DESCRIPTIONS and IFM_ETH_RXPAUSE
    and IFM_ETH_TXPAUSE to IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS so
    these are understood by ifconfig(8).
o Make the master/slave support in mii(4) actually usable:
  - Change IFM_ETH_MASTER from being implemented as a global option via
    the "don't care mask" to a media specific one as it actually is only
    applicable to IFM_1000_T to date.
  - Let mii_phy_setmedia() set GTCR_MAN_MS in IFM_1000_T slave mode to
    actually configure manually selected slave mode (like we also do in
    the PHY specific implementations).
  - Add IFM_ETH_MASTER to IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS so it
    is understood by ifconfig(8).
o Switch bge(4), bce(4), msk(4), nfe(4) and stge(4) along with brgphy(4),
  e1000phy(4) and ip1000phy(4) to use the generic flow control support
  instead of home-grown solutions via IFM_FLAGs. This includes changing
  these PHY drivers and smcphy(4) to no longer unconditionally advertise
  support for flow control but only if the selected media has IFM_FLOW
  set (or MIIF_FORCEPAUSE is set) and implemented for these media variants,
  i.e. typically only for copper.
o Switch brgphy(4), ciphy(4), e1000phy(4) and ip1000phy(4) to report and
  set IFM_1000_T master mode via IFM_ETH_MASTER instead of via IFF_LINK0
  and some IFM_FLAGn.
o Switch brgphy(4) to add at least the the supported copper media based on
  the contents of the BMSR via mii_phy_add_media() instead of hardcoding
  them. The latter approach seems to have developed historically, besides
  causing unnecessary code duplication it was also undesirable because
  brgphy_mii_phy_auto() already based the capability advertisement on the
  contents of the BMSR though.
o Let brgphy(4) set IFM_1000_T master mode on all supported PHY and not
  just BCM5701. Apparently this was a misinterpretation of a workaround
  in the Linux tg3 driver; BCM5701 seem to require RGPHY_1000CTL_MSE and
  BRGPHY_1000CTL_MSC to be set when configuring autonegotiation but
  this doesn't mean we can't set these as well on other PHYs for manual
  media selection.
o Let ukphy_status() report IFM_1000_T master mode via IFM_ETH_MASTER so
  IFM_1000_T master mode support now is generally available with all PHY
  drivers.
o Don't let e1000phy(4) set master/slave bits for IFM_1000_SX as it's
  not applicable there.

Reviewed by:	yongari (plus additional testing)
Obtained from:	NetBSD (partially), OpenBSD (partially)
MFC after:	2 weeks
2010-11-14 13:26:10 +00:00
Rebecca Cran
b1ce21c6ef Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
John Baldwin
d1a02e0932 Catch up to rename of the constant for the Master Data Parity Error bit in
the PCI status register.

Pointed out by:	mdf
Pointy hat to:	jhb
2010-09-09 20:26:30 +00:00
Pyun YongHyeon
3edfecaa37 When VLAN hardware tagging is disabled, make sure to disable VLAN
checksum offloading as well as TSO over VLAN.

Reported by:	jhb
2010-05-04 22:24:19 +00:00
Pyun YongHyeon
31fefd0d5d Make sure to check whether driver is running before processing
received frames. Also check driver has valid ifp pointer before
calling msk_stop() in device_shutdown handler. While I'm here
remove unnecessary accesses to interrupt mask registers in
device_shutdown handler because driver puts the controller into
reset state.
With these changes, msk(4) now survive from heavy RX traffic(1byte
UDP frame) while reboot is in progress.

Reported by:	Mark Atkinson < atkin901 <> gmail dot com >
2010-05-04 17:12:36 +00:00
Pyun YongHyeon
3d763c3133 Drop driver lock before exiting from interrupt handler.
Submitted by:	jhb
MFC after:	3 days
2010-05-04 17:02:34 +00:00
Pyun YongHyeon
e19bd6ee55 Add basic support for Marvell 88E8059 Yukon Optima.
Tested by:	James LaLagna < jameslalagna <> gmail dot com >
MFC after:	5 days
2010-04-30 18:58:55 +00:00
Pyun YongHyeon
7c8db6fd16 Disable non-ASF packet flushing on Yukon Extreme as vendor's driver
does. Without this change, Yukon Extreme seems to generate lots of
RX FIFO overruns even though controller has available RX buffers.
These excessive RX FIFO overruns generated lots of pause frames
which in turn killed devices plugged into switch. It seems there is
still occasional RX frame corruption on Yukon Extreme but this
change seems to fix the pause frame storm.

Reported by:	jhb
Tested by:	jhb
MFC after:	5 days
2010-04-30 18:04:46 +00:00
Pyun YongHyeon
106b2e2ff2 Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. If
it is 8bits register then RX FIFO size can't exceed 2KB which is
not true for almost all Yukon II controller.
2010-04-30 00:34:00 +00:00
Pyun YongHyeon
6da6d0a9e3 With r206844, CSUM_TCP is also set for CSUM_TSO case. Modify
drivers to take into account for the change. Basically CSUM_TSO
should be checked before checking CSUM_TCP.
2010-04-19 22:10:40 +00:00
Pyun YongHyeon
07fa07514b Partial revert r204545.
Just relying on status LE ownership of status block seems to cause
poor performance. Always read current status index register first
and then check status ownership as we had before. Accessing status
index register seems to trigger immediate status update if
controller have pending status updates.

MFC after:	1 week
Reported by:	Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
Tested by:	Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
2010-04-07 17:12:57 +00:00
Pyun YongHyeon
b45923a62d It seems PCI_OUR_REG_[1-5] registers are not mapped on PCI
configuration space on Yukon Ultra(88E8056) such that accesses to
these registers were NOPs which in turn make msk(4) instable on
this controller. Use indirect access method to access
PCI_OUR_REG_[1-5] registers. This should fix a long standing
instability bug which prevented msk(4) working on Yukon Ultra.
Special thanks to koitsu who gave me remote access to his system.

PR:	kern/114631, kern/116853
MFC after:	1 week
2010-03-14 23:23:57 +00:00
Pyun YongHyeon
388214e4f2 Implement Rx checksum offloading for Yukon EC, Yukon Ultra,
Yukon FE and Yukon Ultra2. These controllers provide very simple
checksum computation mechanism and it requires additional pseudo
header checksum computation in upper stack. Even though I couldn't
see much performance difference with/without Rx checksum offloading
it may help notebook based controllers.

Actually controller can compute two checksum value by giving
different starting position of checksum computation on received
frame. However, for long time, Marvell's checksum offloading engine
have been known to have several silicon bugs so don't blindly trust
computed partial checksum value. Instead, compute partial checksum
twice by giving the same checksum computation position and compare
the result. If the value is different it's clear indication of
hardware bug. This configuration lose IP checksum offloading
capability but I think it's better to take safe route.
Note, Rx checksum offloading for Yukon XL was still disabled due to
known silicon bug.
2010-03-12 18:41:41 +00:00
Pyun YongHyeon
c876b43f42 Remove taskqueue based interrupt handling. After r204541 msk(4)
does not generate excessive interrupts any more so we don't need
to have two copies of interrupt handler.
While I'm here remove two STAT_PUT_IDX register accesses in LE
status event handler. After r204539 msk(4) always sync status LEs
so there is no need to resort to reading STAT_PUT_IDX register to
know the end of status LE processing. Just trust status LE's
ownership bit.
2010-03-02 01:45:02 +00:00
Pyun YongHyeon
cf570c1f34 Implement rudimentary interrupt moderation with programmable
countdown timer register. The timer resolution may vary among
controllers but the value would be represented by core clock
cycles. msk(4) will automatically computes number of required clock
cycles from given micro-seconds unit.
The default interrupt holdoff timer value is 100us which will
ensure less than 10k interrupts under load. The timer value can be
changed with dev.mskc.0.int_holdoff sysctl node.

Note, the interrupt moderation is shared resource on dual-port
controllers so you can't use separate interrupt moderation value
for each port. This means we can't stop interrupt moderation in
driver stop routine. Also have msk_tick() reclaim transmitted Tx
buffers as safety belt. With this change there is no need to check
missing Tx completion interrupt in watchdog handler, so remove it.
2010-03-01 23:39:43 +00:00
Pyun YongHyeon
42f3ea9fc2 Make sure to enable flow-control only if established link is
full-duplex. Previously msk(4) used to allow flow-control on
1000baseT half-duplex media. Also GMAC pause is enabled if link
partner is capable of handling it.
While I'm here use IFM_OPTIONS instead of using IFM_GMASK to check
optional flags of link.
2010-03-01 22:55:35 +00:00
Pyun YongHyeon
17f6f326e9 Properly sync status LEs after processing. 2010-03-01 22:43:22 +00:00
Pyun YongHyeon
8c1643b6db Remove trailing white spaces. 2010-02-26 19:38:12 +00:00
Pyun YongHyeon
c72f075a24 Allocate single MSI message. msk(4) used to allocate 2 MSI messages
for controllers like 88E8053 which reports two MSI messages.
Because we don't get anything useful things with 2 MSI messages,
allocating 1 MSI message would be more sane approach.
While I'm here, enable MSI for dual-port controllers too. Because
status block is shared for dual-port controllers, I don't think
msk(4) will encounter problem for using MSI on dual-port
controllers.
2010-02-26 19:37:03 +00:00
Pyun YongHyeon
7420e9dc9d Don't hardcod register offset to set PCIe max read request size.
The register offset is not valid on 88E8072 controller. Also don't
blindly increase max read request size to 4096, instead, use 2048
which seems to be more sane value and only change the value if the
hardware default size(512) was used on that register.
For PCIX controllers, use system defined constant rather than using
magic value.
While I'm here stop showing negotiated link width.
2010-02-26 19:18:29 +00:00