processor-specific VMCS or VMCB. The pending exception will be delivered right
before entering the guest.
The order of event injection into the guest is:
- hardware exception
- NMI
- maskable interrupt
In the Intel VT-x case, a pending NMI or interrupt will enable the interrupt
window-exiting and inject it as soon as possible after the hardware exception
is injected. Also since interrupts are inherently asynchronous, injecting
them after the hardware exception should not affect correctness from the
guest perspective.
Rename the unused ioctl VM_INJECT_EVENT to VM_INJECT_EXCEPTION and restrict
it to only deliver x86 hardware exceptions. This new ioctl is now used to
inject a protection fault when the guest accesses an unimplemented MSR.
Discussed with: grehan, jhb
Reviewed by: jhb
src/ and ports/ distributions.
While I am thinking about it, exclude .git directories for src/
and ports/, as somewhat of a followup to r262499.
Sponsored by: The FreeBSD Foundation
Notable changes:
- Support of $2b$ password format to address a problem where very
long passwords (more than 256 characters, when an integer
overflow would happen and cause the length to wrap at 256).
- Updated pseudo code in comments to reflect the reality.
- Removed our local shortcut of processing magic string and rely
on the centralized and tigntened validation.
- Diff reduction from upstream.
For now we are still generating the older $02a$ format of password
but we will migrate to the new format once the format is formally
finalized.
MFC after: 1 month
- Add a VCSCMD variable that defaults to 'svn checkout',
and update places 'svn co' is used directly.
- After sourcing a configuration file, prefix SRCBRANCH,
PORTBRANCH, and DOCBRANCH with the SVNROOT.
- Properly capitalize 'FreeBSD.org' in the default SVNROOT.
- Update Copyright.
release.conf.sample:
- Add an example to use git instead of svn, by nullifying
SVNROOT, and setting SRCBRANCH, DOCBRANCH, and PORTBRANCH
to the URL fo a git repository.
release.7:
- Document VCSCMD.
Submitted by: Rick Miller (based on)
Sponsored by: The FreeBSD Foundation
were primarily used to size the sysctl name list macros that were removed
in r254295. A few other constants either did not have an associated
sysctl node, or the associated node used OID_AUTO instead.
PR: ports/184525 (exp-run)
Apparently, LIBZFS is set to a non-empty string when WITHOUT_CDDL/WITHOUT_ZFS
are set, I think this is a bug, but work around this feature for now.
Reviewed by: grehan
what btxldr expects (.set MEM_DATA,start+0x1000 in btxldr.S).
This makes resulting ELF binaries bootable with grub, gptboot and boot2.
PR: 153801
Submitted by: Gleb Kurtsou <gleb.kurtsou at gmail.com>
Tested by: Ruben Kerkhof <ruben at rubenkerkhof.com>
Glanced at by: jhb, peter
MFC after: 1 month
In my specific case, this fixes the problem of my PowerMac G5 displaying a
4:3 console on a 16:10 display with black bars on the left and right.
PR: kern/180558
Reviewed by: nwhitehorn
MFC after: 5 days
1) Add support for page back/forward.
2) While doing HOR scrolling, disable VER scrolling.
3) Checking dx_sum and dy_sum before emulate right button, this can
avoids unexpected right button press.
4) Fix stable pointer operation when emulating middle button.
Submitted by: Huang Wen Hui <huanghwh@gmail.com>
MFC after: 2 weeks
casting to the appropriate type. (Note this fix cannot be done in
sys/sparc64/sparc64/spitfire.c, since that file is also included by
assembly source files.)
Reviewed by: marius
MFC after: 3 days
that this is done for SDT probes. This fixes the syscall/tst.args.d test,
which was failing because mmap(2)'s sixth argument wasn't available to the
probe.
MFC after: 2 weeks
fact I should actually waited the build to be finished before
committing.
A proper fix would be committed once my test build passes.
Pointy hat to: delphij
Quartz is a tiny module utilized Freescale VF6xx
system-on-chip and development kit produced by
Device Solutions.
Quartz is available in a form of LGA (38x38x2mm)
or as a module with high-density connectors.
Sponsored by: Device Solutions
while this won't actually be used for anything (yet), it doesn't hurt to
ensure it is exposed to the tinderbox.
Requested by: imp, jmallett
MFC after: 3 weeks
fragments; while this won't actually be used for anything (yet), it
doesn't hurt to ensure it is exposed to the tinderbox.
Requested by: imp, jmallett
MFC after: 3 weeks
fields of an internal struct so it corresponds with the way variables of
this type are initialised.
PR: 185964
Submitted by: Manuel Mausz <manuel-freebsd@mausz.at>
MFC after: 5 days
The first I2C controller is only used to manage the on-board devices (PMIC
and HDMI framer) and its bus is not exposed on the expasion headers.
With this change the following pins on the P9 expansion headers are now
reserved as I2C pins:
Pin 17 - I2C1 SCL
Pin 18 - I2C1 SDA
Pin 19 - I2C2 SCL
Pin 20 - I2C2 SDA
The I2C2 is the bus that should be used to read the contents of cape
eeproms.
Approved by: adrian (mentor, implicit)
It's still hardcoded (for db120) but it is now hardcoded in all the
same place (ie, the pdata path.) The port config/status code now checks
port0/port6 as appropriate to configure things.
Tested:
* Qualcomm Atheros DB120, AR8327 switch.
There's plenty of hints that I haven't yet fleshed out and are hardcoded
in arswitch_8327.c. They're listed here (from OpenWRT) for completeness.
This is enough to get the thing up, running and pinging.
Note that the mdiobus for the on-switch switch changes - the AR8327
probes first, which exposes mdio1, and thus the arge1 mdiobus will probe
and attach as mdio2. That is what the AR9344 on-chip switch has to
attach to.
Tested:
* Qualcomm Atheros DB120
This is (almost!) enough to actually probe, attach, configure a default
port group and do some basic work. It's also totally hard-coded for
the Qualcomm Atheros DB120 board - it doesn't yet have any of the code
from OpenWRT which parses extra configuration data to know how to program
the switch. The LED stuff is also missing.
But, it's enough to facilitate board, PHY, switch and VLAN bringup,
so I am committing it now.
Tested:
* Qualcomm Atheros DB120
Obtained from: OpenWRT
switches.
* Add some new VLAN HAL methods that will be used by the VLAN configuration
code. The AR933x and later switches use slightly different register
layouts (even though the driver currently doesn't support it.)
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.
The caches really need to be invalidated even earlier than this, but this
is a big step in the right direction. The invalidate needs to happen
before the MMU is enabled, which means it has to be called from asm code
that's running with physical addressing. Fixing that will be handled in
a future change.
