Switch the majority of device configuration to FDT from hints.
Add BERI_*_BASE configs to reduce duplication in the MDROOT and SDROOT
kernels.
Add NFS and GSSAPI support by default.
MFC after: 3 days
Sponsored by: DARPA/AFRL
The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols). This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.
The MMCHS hardware is pretty much a standard SDHCI v2.0 controller with a
couple quirks, which are now supported by sdhci(4) as of r254507.
This should work for all TI SoCs that use the MMCHS hardware, but it has
only been tested on AM335x right now, so this enables it on those platforms
but leaves the existing ti_mmchs driver in place for other OMAP variants
until they can be tested.
This initial incarnation lacks DMA support (coming soon). Even without it
this improves performance pretty noticibly over the ti_mmchs driver,
primarily because it now does multiblock IO.
Add support for A20 timer.
Correct interrupt offset depending from chip.
Add basic code for CPU configuration module.
For now, add kernel config and dts file
(only FDT blob related problem needs to be solved later in
order to have one kernel for both cubieboard1 and 2).
Approved by: ray@
the beaglebone-specific .dts file.
Add a new .dts for the BeagleBone Black with more memory,
slightly different pinmux initialization, and with mmchs1
configured (though the latter doesn't quite work yet).
to driver specific files.
- window initialization is done during device attach
- CESA TDMA decoding windows values are set based on DTS,
not copied from CPU registers
- remove unnecessary virtual mapping
- update dts file
Obtained from: Semihalf
initialized after FPIO controller since they might rely on GPIO
functionality
- Update interrupts property of dma node to contain all allocated
interrupts
This adds support for version 10, revision 01, but it should also work
without changes for the 0901 model, at least until we get drivers for the
two different wifi chips involved.
Many users contributed to and tested the various patchsets floating around
for the past year that have eventually evolved into this checkin, most notably
Richard Neese who provided the bulk of the kernel config file.
Approved by: cognet (mentor)
Rasperry Pi firmware has a set of hardcoded pathes it uses to fill
FDT with system-specific information like display resolution, memory
size, UART and SDHCI clocks, ethernet MAC address. Handle two of them:
- Add placeholder for ethernet MAC address
- Move display node out of "axi" node
MSI are implemented via software interrupt. PCIe cards will write
into software interrupt register which will cause inbound shared
interrupt which will be interpreted as a MSI.
Obtained from: Marvell, Semihalf
- Add functions to calculate clocks instead using hardcoded values
- Update reset and timers functions
- Update number of interrupts
- Change name of platform from db88f78100 to db78460
- Correct DRAM size and PCI IRQ routing in dts file.
Obtained from: Semihalf
r239274 added support for ranges. Update XLP DTS to provide the correct
range parameter for the XLP SoC bus. Also fix bus_space_map method
for XLP bus space.
Submitted by: Sreekanth M. <sreekanth.molagavalli@broadcom.com>
