Commit Graph

1177 Commits

Author SHA1 Message Date
Marcel Moolenaar
01d8aa0d31 The first argment of mtdbatu or mtibatu is part of the encoding.
It needs to be constant, so eliminate the loop and "hand-unroll".
2008-04-28 03:04:41 +00:00
Marcel Moolenaar
12640815f8 MFp4: SMP support 2008-04-27 22:33:43 +00:00
Marcel Moolenaar
b66bd41daa Eliminate track_modified_needed(), better known as pmap_track_modified()
on other platforms.  We no longer need it because we do not create managed
mappings within the clean submap.

Pointed out by: alc
2008-04-27 21:04:54 +00:00
Marcel Moolenaar
9d5a22b928 MFp4: SMP support 2008-04-27 19:51:34 +00:00
Marcel Moolenaar
5f99a64689 Make sure tmpstk is aligned and make it 8KB in size -- not 8KB+16. 2008-04-27 19:03:14 +00:00
Marcel Moolenaar
6937461ee9 Remove mfsvr():
o  The function is defined unconditionally but depends on SPR_SVR,
   which is defined conditionally.
o  spr.h defines mfspr() and mtspr(), which is no worse to use.
2008-04-27 17:13:22 +00:00
Marcel Moolenaar
4924db935d Take into account the size of the interrupt cell. It's determined
by the parent for interrupt resources. This corrects parsing of
the interrupts property.

With parsing of the property fixed, add all interrupts to the
resource list. Bump the max. number of interrupts from 5 to 6
as scc(4) attached to macio(4) has 6 interrupts (3 per channel).

Submitted by: Nathan Whitehorn <nathanw@uchicago.edu>
2008-04-26 18:35:44 +00:00
Rafal Jaworowski
8b79898eb7 Use RSTCR for resetting the MPC8572 (the old way does not apply).
Obtained from:	Freescale, Semihalf
2008-04-26 18:03:00 +00:00
Rafal Jaworowski
a1cd472a40 Introduce a dedicated file for MPC85xx-specific routines. Move cpu_reset()
there, as it's not relevant to Book-E specification, but is an implementation
detail, directly dependent on the given SoC version.
2008-04-26 17:57:29 +00:00
Rafal Jaworowski
8464af7949 Improve handling of Local Access Windows on MPC85xx systems:
- detect number of LAWs in run time and initalize accordingly
- introduce decode windows target IDs used in MPC8572
- other minor updates

Obtained from:	Freescale, Semihalf
2008-04-26 17:47:28 +00:00
Rafal Jaworowski
653b7b4943 Move System Revision defines to a bit better place, add MPC8572 systems IDs. 2008-04-26 17:39:55 +00:00
Rafal Jaworowski
90a37a5a28 Enable NFSLOCKD for MPC85XX kernel to comply with recent NFS rework. 2008-04-26 17:37:13 +00:00
Jeff Roberson
6c47aaae12 - Add an integer argument to idle to indicate how likely we are to wake
from idle over the next tick.
 - Add a new MD routine, cpu_wake_idle() to wakeup idle threads who are
   suspended in cpu specific states.  This function can fail and cause the
   scheduler to fall back to another mechanism (ipi).
 - Implement support for mwait in cpu_idle() on i386/amd64 machines that
   support it.  mwait is a higher performance way to synchronize cpus
   as compared to hlt & ipis.
 - Allow selecting the idle routine by name via sysctl machdep.idle.  This
   replaces machdep.cpu_idle_hlt.  Only idle routines supported by the
   current machine are permitted.

Sponsored by:	Nokia
2008-04-25 05:18:50 +00:00
Poul-Henning Kamp
9b4a8ab7ba Now that all platforms use genclock, shuffle things around slightly
for better structure.

Much of this is related to <sys/clock.h>, which should really have
been called <sys/calendar.h>, but unless and until we need the name,
the repocopy can wait.

In general the kernel does not know about minutes, hours, days,
timezones, daylight savings time, leap-years and such.  All that
is theoretically a matter for userland only.

Parts of kernel code does however care: badly designed filesystems
store timestamps in local time and RTC chips almost universally
track time in a YY-MM-DD HH:MM:SS format, and sometimes in local
timezone instead of UTC.  For this we have <sys/clock.h>

<sys/time.h> on the other hand, deals with time_t, timeval, timespec
and so on.  These know only seconds and fractions thereof.

Move inittodr() and resettodr() prototypes to <sys/time.h>.
Retain the names as it is one of the few surviving PDP/VAX references.

Move startrtclock() to <machine/clock.h> on relevant platforms, it
is a MD call between machdep.c/clock.c.  Remove references to it
elsewhere.

Remove a lot of unnecessary <sys/clock.h> includes.

Move the machdep.disable_rtc_set sysctl to subr_rtc.c where it belongs.
XXX: should be kern.disable_rtc_set really, it's not MD.
2008-04-22 19:38:30 +00:00
Poul-Henning Kamp
0051271e12 Make genclock standard on all platforms.
Thanks to: grehan & marcel for platform support on ia64 and ppc.
2008-04-21 10:09:55 +00:00
Marcel Moolenaar
25bb36a74e Switch to using genclock. Have nexus double as clock device for
now. While here, add a proper attach() method to nexus.

Requested by: phk
2008-04-21 04:41:37 +00:00
Marcel Moolenaar
5b43c63ded Simplify the pmap_zero_page family of functions by making use of
the fact that we have a 1:1 mapping by virtue of the BATs.
Eliminate the now unused moea_rkva_alloc(), moea_pa_map() and
moea_pa_unmap() functions.

Pointed out by: grehan.
2008-04-17 00:37:40 +00:00
Marcel Moolenaar
014ffa990d Allocate a stack (with optional guard pages) for thread0 and
switch to it before calling mi_startup().
2008-04-16 23:28:12 +00:00
Poul-Henning Kamp
943f6ddd39 Get rid of an empty RTC implementation and hook up genclock instead. 2008-04-13 21:20:26 +00:00
Jeff Roberson
9b33b154b5 - Add the interrupt vector number to intr_event_create so MI code can
lookup hard interrupt events by number.  Ignore the irq# for soft intrs.
 - Add support to cpuset for binding hardware interrupts.  This has the
   side effect of binding any ithread associated with the hard interrupt.
   As per restrictions imposed by MD code we can only bind interrupts to
   a single cpu presently.  Interrupts can be 'unbound' by binding them
   to all cpus.

Reviewed by:	jhb
Sponsored by:	Nokia
2008-04-11 03:26:41 +00:00
Marcel Moolenaar
bf8ad5a884 Fix copy-n-paste typos in free text. 2008-04-10 02:37:26 +00:00
Peter Grehan
2aa95aceb6 Include <sys/types.h> before <sys/systm.h> to get typedefs required
by new atomic.h. Fixes tinderbox LINT build.
2008-04-09 08:50:37 +00:00
Marcel Moolenaar
c563d53362 Reimplement atomic_add, atomic_clear, atomic_set and atomic_subtract
so that all implemented variants have proper prototypes. The 8-bit,
16-bit and 64-bit variants are not implemented.

This really fixes the current build breakages caused by type casting
and struct aliasing rules.
2008-04-09 01:00:35 +00:00
Marcel Moolenaar
ca6f63a1ed Quick fix for the kernel build breakage in netgraph and the
aliasing warning in libthr. A more elaborate fix is in the
works that makes sure that all variants have proper inline
functions with proper types.
2008-04-08 16:34:50 +00:00
John Baldwin
1ee1b68792 Add a MI intr_event_handle() routine for the non-INTR_FILTER case. This
allows all the INTR_FILTER #ifdef's to be removed from the MD interrupt
code.
- Rename the intr_event 'eoi', 'disable', and 'enable' hooks to
  'post_filter', 'pre_ithread', and 'post_ithread' to be less x86-centric.
  Also, add a comment describe what the MI code expects them to do.
- On amd64, i386, and powerpc this is effectively a NOP.
- On arm, don't bother masking the interrupt unless the ithread is
  scheduled in the non-INTR_FILTER case to match what INTR_FILTER did.
  Also, don't bother unmasking the interrupt in the post_filter case if
  we never masked it.  The INTR_FILTER case had been doing this by having
  arm_unmask_irq for the post_filter (formerly 'eoi') hook.
- On ia64, stray interrupts are now masked for the non-INTR_FILTER case.
  They were already masked in the INTR_FILTER case.
- On sparc64, use the a NULL pre_ithread hook and use intr_enable_eoi() for
  both the 'post_filter' and 'post_ithread' hooks to match what the
  non-INTR_FILTER code did.
- On sun4v, retire the ithread wrapper hack by using an appropriate
  'post_ithread' hook instead (it's what 'post_ithread'/'enable' was
  designed to do even in 5.x).

Glanced at by:	piso
Reviewed by:	marius
Requested by:	marius [1], [5]
Tested on:	amd64, i386, arm, sparc64
2008-04-05 19:58:30 +00:00
Marcel Moolenaar
7256cdffc9 Align functions to 16-byte boundaries due to profiling granularity. 2008-04-03 17:40:20 +00:00
Marcel Moolenaar
66821a4c67 Set sc_psim so that the openpic core can correct the off-by-one
error in the number of IRQs that PSIM gives us.
2008-04-03 17:38:27 +00:00
Doug Rabson
fa9d9930ca Add kernel module support for nfslockd and krpc. Use the module system
to detect (or load) kernel NLM support in rpc.lockd. Remove the '-k'
option to rpc.lockd and make kernel NLM the default. A user can still
force the use of the old user NLM by building a kernel without NFSLOCKD
and/or removing the nfslockd.ko module.
2008-03-27 11:54:20 +00:00
John Birrell
e483943791 When building a kernel module, define MAXCPU the same as SMP so
that modules work with and without SMP.
2008-03-27 05:03:26 +00:00
Poul-Henning Kamp
e465985885 The "free-lance" timer in the i8254 is only used for the speaker
these days, so de-generalize the acquire_timer/release_timer api
to just deal with speakers.

The new (optional) MD functions are:
	timer_spkr_acquire()
	timer_spkr_release()
and
	timer_spkr_setfreq()

the last of which configures the timer to generate a tone of a given
frequency, in Hz instead of 1/1193182th of seconds.

Drop entirely timer2 on pc98, it is not used anywhere at all.

Move sysbeep() to kern/tty_cons.c and use the timer_spkr*() if
they exist, and do nothing otherwise.

Remove prototypes and empty acquire-/release-timer() and sysbeep()
functions from the non-beeping archs.

This eliminate the need for the speaker driver to know about
i8254frequency at all.  In theory this makes the speaker driver MI,
contingent on the timer_spkr_*() functions existing but the driver
does not know this yet and still attaches to the ISA bus.

Syscons is more tricky, in one function, sc_tone(), it knows the hz
and things are just fine.

In the other function, sc_bell() it seems to get the period from
the KDMKTONE ioctl in terms if 1/1193182th second, so we hardcode
the 1193182 and leave it at that.  It's probably not important.

Change a few other sysbeep() uses which obviously knew that the
argument was in terms of i8254 frequency, and leave alone those
that look like people thought sysbeep() took frequency in hertz.

This eliminates the knowledge of i8254_freq from all but the actual
clock.c code and the prof_machdep.c on amd64 and i386, where I think
it would be smart to ask for help from the timecounters anyway [TBD].
2008-03-26 20:09:21 +00:00
John Baldwin
6d2d1c044f Simplify the interrupt code a bit:
- Always include the ie_disable and ie_eoi methods in 'struct intr_event'
  and collapse down to one intr_event_create() routine.  The disable and
  eoi hooks simply aren't used currently in the !INTR_FILTER case.
- Expand 'disab' to 'disable' in a few places.
- Use function casts for arm and i386:intr_eoi_src() instead of wrapper
  routines since to trim one extra indirection.

Compiled on:	{arm,amd64,i386,ia64,ppc,sparc64} x {FILTER, !FILTER}
Tested on:	{amd64,i386} x {FILTER, !FILTER}
2008-03-17 22:42:01 +00:00
Marcel Moolenaar
294800e52d Make remote GDB work for AIM processors. For BookE, the kernel
will have a special section, named .PPC.EMB.apuinfo, which will
tell GDB that a BookE processor is targeted and which will
result in GDB using a different register definition. In order
to support remote GDB for BookE, we need the GDB stub in the
kernel look for that section and use the BookE definitions.
2008-03-17 00:46:52 +00:00
Pawel Jakub Dawidek
6eb4157ffc Implement atomic_fetchadd_long() for all architectures and document it.
Reviewed by:	attilio, jhb, jeff, kris (as a part of the uidinfo_waitfree.patch)
2008-03-16 21:20:50 +00:00
Robert Watson
237fdd787b In keeping with style(9)'s recommendations on macros, use a ';'
after each SYSINIT() macro invocation.  This makes a number of
lightweight C parsers much happier with the FreeBSD kernel
source, including cflow's prcc and lxr.

MFC after:	1 month
Discussed with:	imp, rink
2008-03-16 10:58:09 +00:00
John Baldwin
eaf86d1678 Add preliminary support for binding interrupts to CPUs:
- Add a new intr_event method ie_assign_cpu() that is invoked when the MI
  code wishes to bind an interrupt source to an individual CPU.  The MD
  code may reject the binding with an error.  If an assign_cpu function
  is not provided, then the kernel assumes the platform does not support
  binding interrupts to CPUs and fails all requests to do so.
- Bind ithreads to CPUs on their next execution loop once an interrupt
  event is bound to a CPU.  Only shared ithreads are bound.  We currently
  leave private ithreads for drivers using filters + ithreads in the
  INTR_FILTER case unbound.
- A new intr_event_bind() routine is used to bind an interrupt event to
  a CPU.
- Implement binding on amd64 and i386 by way of the existing pic_assign_cpu
  PIC method.
- For x86, provide a 'intr_bind(IRQ, cpu)' wrapper routine that looks up
  an interrupt source and binds its interrupt event to the specified CPU.
  MI code can currently (ab)use this by doing:

	intr_bind(rman_get_start(irq_res), cpu);

  however, I plan to add a truly MI interface (probably a bus_bind_intr(9))
  where the implementation in the x86 nexus(4) driver would end up calling
  intr_bind() internally.

Requested by:	kmacy, gallatin, jeff
Tested on:	{amd64, i386} x {regular, INTR_FILTER}
2008-03-14 19:41:48 +00:00
Rafal Jaworowski
ecb1ab1761 Obtain TSEC h/w address from the parent bus (OCP) and not rely blindly on what
might be currently programmed into the registers.

Underlying firmware (U-Boot) would typically program MAC address into the
first unit only, and others are left uninitialized. It is now possible to
retrieve and program MAC address for all units properly, provided they were
passed on in the bootinfo metadata.

Reviewed by:	imp, marcel
Approved by:	cognet (mentor)
2008-03-12 16:32:08 +00:00
Jeff Roberson
6617724c5f Remove kernel support for M:N threading.
While the KSE project was quite successful in bringing threading to
FreeBSD, the M:N approach taken by the kse library was never developed
to its full potential.  Backwards compatibility will be provided via
libmap.conf for dynamically linked binaries and static binaries will
be broken.
2008-03-12 10:12:01 +00:00
Marcel Moolenaar
1c25a4fc75 In intr_lookup(), when adding an IRQ to powerpc_intrs[], also
set a default name. If the IRQ is added as a consequence of
configurating the IRQ without there ever being a handler
assigned to it, we will not have a name. This breaks the
fragile intrcnt/intrnames logic.
2008-03-11 19:58:52 +00:00
Marcel Moolenaar
27080415a2 Don't use in32() and out32() when writing to the CCSRBAR. The
in*() and out*() primitives should not be used, other than by
ISA drivers. In this case they were used for memory-mapped I/O
and were not even used in the spirit of the primitives.
2008-03-09 02:29:19 +00:00
Marcel Moolenaar
704bb9b36f Enable the D-cache and I-cache when not already enabled.
It so happens that U-Boot disables the D-cache when booting
an ELF image, so this change makes sure we run with the
D-cache enabled from now on. It shows too...

While here, remove the duplicate definition of the hw.model
sysctl.
2008-03-08 05:36:25 +00:00
Marcel Moolenaar
8a109fa3d8 For AIM, have cpu_idle() set MSR_POW when the powerpc_pow_enabled
variable is set. On my Mac Mini this puts the CPU in NAP mode when
the kernel is idle and, any technical or environmental reasons
aside, avoids that I have to listen to the fan all day :-)
2008-03-07 22:27:06 +00:00
Marcel Moolenaar
d6f5929710 Add support for the BUS_CONFIG_INTR() method to the platform and to
openpic(4). Make use of it in ocpbus(4). On the MPC85xxCDS, IRQ0:4
are active-low.
2008-03-07 22:08:43 +00:00
Marcel Moolenaar
d5bbdb25b5 Add a catch-all for PCPU_MD_FIELDS. While we expect this to be
used in the kernel only (by virtue of checking for _KERNEL),
ports like lsof (part of gtop) cheat. It sets _KERNEL, but does
not set either AIM or E500. As such, PCPU_MD_FIELDS didn't get
defined and the build broke.
The catch-all is to define PCPU_MD_FIELDS with a dummy integer
when at the end of line we ended up without a definition for it.
2008-03-06 16:59:36 +00:00
Marcel Moolenaar
4fa8db5df0 o We don't have to keep track of the PIC, nor do we have to make sure
it's probed first. The PowerPC platform code deals with everything.
   As such, probe devices in order of their location in the memory map.
o  Refactor the ocpbus_alloc_resource for readability and make sure we
   set the RID in the resource as per the new convention.
2008-03-05 18:39:01 +00:00
Marcel Moolenaar
b164215d32 o Various fixes related to PCI Express:
- Even for the PCI Express host controller we need to use bus 0
     for configuration space accesses to devices directly on the
     host controller's bus.
   - Pass the maximum number of slots to pci_ocp_init() because the
     caller knows how many slots the bus has. Previously a PCI or
     PCI-X bus underneath a PCI Express host controller would not
     be enumerated properly.
o  Pull the interrupt routing logic out of pci_ocp_init() and into
   its own function. The logic is not quite right and is expected
   to be a bit more complex.
o  Fix/add support for PCI domains. The PCI domain is the unit
   number as per other PCI host controller drivers. As such, we
   can use logical bus numbers again and don't have to guarantee
   globally unique bus numbers. Remove pci_ocp_busnr. Return the
   highest bus number ito the caller of pci_ocp_init() now that
   we don't have a global variable anymore.
o  BAR programming fixes:
   - Non-type0 headers have at most 1 BAR, not 0.
   - First write ~0 to the BAR in question and then read back its
     size.

Obtained from: Juniper Networks (mostly)
2008-03-05 16:46:38 +00:00
Marcel Moolenaar
88d1762161 Also comment-out options MPC85XX. We don't define CCSRBAR_* without E500. 2008-03-04 03:05:53 +00:00
Marcel Moolenaar
9b9f2abc3c Comment-out cpu E500. We can't yet build it with AIM at the same time. 2008-03-04 02:20:27 +00:00
Marcel Moolenaar
85cce1fcd6 Add the pic_ipi method. While here, eliminate the unused openpic_ocpbus_softc
struct.
2008-03-04 01:40:26 +00:00
Rafal Jaworowski
69fa057973 Import the omitted gdb_machdep.c for PowerPC kernel.
Approved by:	cognet (mentor)
MFp4:		e500
2008-03-03 22:00:46 +00:00
Rafal Jaworowski
321578e3d0 Connect MPC85XX to the PowerPC build.
The kernel config file is KERNCONF=MPC85XX, so the usual procedure applies:

1. make buildworld TARGET_ARCH=powerpc
2. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX

This default config uses kernel-level FPU emulation. For the soft-float world
approach:

1. make buildworld TARGET_ARCH=powerpc TARGET_CPUTYPE=e500
2. disable FPU_EMU option in sys/powerpc/conf/MPC85XX
3. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX

Approved by:	cognet (mentor)
MFp4:		e500
2008-03-03 20:40:20 +00:00