Commit Graph

894 Commits

Author SHA1 Message Date
John Baldwin
ad54157b5e Simplify MACHINE_ARCH to be a single string.
Big endian and armv4 mean that we are now down to only two supported
variants.  A future change will use MACHINE_ARCH in assembly which
does not support C-style string concatentation and thus needs
MACHINE_ARCH defined as a single string.

Reviewed by:	imp
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D25211
2020-06-15 18:57:43 +00:00
Mitchell Horne
cd9207569f Remove remnant of arm's ELF trampoline
The trampoline code used for loading gzipped a.out kernels on arm was
removed in r350436. A portion of this code allowed for DDB to find the
symbol tables when booting without loader(8), and some of this was
untouched in the removal. Remove it now.

Differential Revision:	https://reviews.freebsd.org/D24950
2020-05-31 14:43:04 +00:00
Mitchell Horne
49439183ce Convert arm's physmem interface to MI code
The arm_physmem interface found in arm's MD code provides a convenient
set of routines for adding/excluding physical memory regions and
initializing important kernel globals such as Maxmem, realmem,
phys_avail[], and dump_avail[]. It is especially convenient for FDT
systems, since we can use FDT parsing functions and pass the result
directly to one of these physmem routines. This interface is already in
use on arm and arm64, and can be used to simplify this early
initialization on RISC-V as well.

This requires only a couple trivial changes:
  - Move arm_physmem_kernel_addr to arm/machdep.c. It is unused on arm64,
    and manipulated entirely in arm MD code.
  - Convert arm32_btop/arm64_btop to atop. This is equivalently defined
    on all architectures.
  - Drop the "arm" prefix.

Reviewed by:	manu, emaste ("looks reasonable")
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D24153
2020-04-19 00:12:30 +00:00
Ian Lepore
638dcf6ecf Add a missing suffix that was causing a whole word to get loaded instead
of the proper 8 or 16 bits when the macro was expanded for those sizes.

Fixes a hang in the armv7 kernel.

Submitted by:	Thomas Skibo
Pointy hat:	ian@
2020-03-29 17:30:08 +00:00
Conrad Meyer
ca0ec73c11 Expand generic subword atomic primitives
The goal of this change is to make the atomic_load_acq_{8,16},
atomic_testandset{,_acq}_long, and atomic_testandclear_long primitives
available in MI-namespace.

The second goal is to get this draft out of my local tree, as anything that
requires a full tinderbox is a big burden out of tree.  MD specifics can be
refined individually afterwards.

The generic implementations may not be ideal for your architecture; feel
free to implement better versions.  If no subword_atomic definitions are
needed, the include can be removed from your arch's machine/atomic.h.
Generic definitions are guarded by defined macros of the same name.  To
avoid picking up conflicting generic definitions, some macro defines are
added to various MD machine/atomic.h to register an existing implementation.

Include _atomic_subword.h in arm and arm64 machine/atomic.h.

For some odd reason, KCSAN only generates some versions of primitives.
Generate the _acq variants of atomic_load.*_8, atomic_load.*_16, and
atomic_testandset.*_long.  There are other questionably disabled primitives,
but I didn't run into them, so I left them alone.  KCSAN is only built for
amd64 in tinderbox for now.

Add atomic_subword implementations of atomic_load_acq_{8,16} implemented
using masking and atomic_load_acq_32.

Add generic atomic_subword implementations of atomic_testandset_long(),
atomic_testandclear_long(), and atomic_testandset_acq_long(), using
atomic_fcmpset_long() and atomic_fcmpset_acq_long().

On x86, add atomic_testandset_acq_long as an alias for
atomic_testandset_long.

Reviewed by:	kevans, rlibby (previous versions both)
Differential Revision:	https://reviews.freebsd.org/D22963
2020-03-25 23:12:43 +00:00
Conrad Meyer
2596eb8847 arm: Fix atomic long APIs to correct 'u_long' signedness
As defined in atomic(9) and implemented on other architectures, the
atomic(9) functions all act on unsigned pointers and types.  Prior to this
revision, arm implemented some atomic(9) 'long' sized routines with correct
unsigned type, but others were incorrectly signed.

Reviewed by:	tinderbox
Sponsored by:	Dell EMC Isilon
2020-03-23 23:00:13 +00:00
Ian Lepore
39c614c6b7 Implement atomic_testandclear_{32,int,long} for 32-bit arm. Also, replace
the existing implementation of atomic_testandset with the same new algorithm,
which uses fewer instructions and fewer registers.
2020-02-10 00:05:04 +00:00
Mark Johnston
c3d326fd44 Define MAXCPU consistently between the kernel and KLDs.
This reverts r177661.  The change is no longer very useful since
out-of-tree KLDs will be built to target SMP kernels anyway.  Moveover
it breaks the KBI in !SMP builds since cpuset_t's layout depends on the
value of MAXCPU, and several kernel interfaces, notably
smp_rendezvous_cpus(), take a cpuset_t as a parameter.

PR:		243711
Reviewed by:	jhb, kib
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23512
2020-02-05 19:08:21 +00:00
Warner Losh
bf19e5b9ee Remove old boardid/mach-types support.
This has been long obsolete in linux and now that all armv4/5 support
is gone, it can be retired too.
2020-02-02 06:52:10 +00:00
Ian Lepore
b19c9dea3e Rewrite arm kernel stack unwind code to work when unwinding through modules.
The arm kernel stack unwinder has apparently never been able to unwind when
the path of execution leads through a kernel module. There was code that
tried to handle modules by looking for the unwind data in them, but it did
so by trying to find symbols which have never existed in arm kernel
modules. That caused the unwind code to panic, and because part of panic
handling calls into the unwind code, that just created a recursion loop.

Locating the unwind data in a loaded module requires accessing the Elf
section headers to find the SHT_ARM_EXIDX section. For preloaded modules
those headers are present in a metadata blob. For dynamically loaded
modules, the headers are present only while the loading is in progress; the
memory is freed once the module is ready to use. For that reason, there is
new code in kern/link_elf.c, wrapped in #ifdef __arm__, to extract the
unwind info while the headers are loaded. The values are saved into new
fields in the linker_file structure which are also conditional on __arm__.

In arm/unwind.c there is new code to locally cache the per-module info
needed to find the unwind tables. The local cache is crafted for lockless
read access, because the unwind code often needs to run in context where
sleeping is not allowed.  A large comment block describes the local cache
list, so I won't repeat it all here.
2019-12-15 21:16:35 +00:00
Mark Johnston
5cff1f4dc3 Introduce vm_page_astate.
This is a 32-bit structure embedded in each vm_page, consisting mostly
of page queue state.  The use of a structure makes it easy to store a
snapshot of a page's queue state in a stack variable and use cmpset
loops to update that state without requiring the page lock.

This change merely adds the structure and updates references to atomic
state fields.  No functional change intended.

Reviewed by:	alc, jeff, kib
Sponsored by:	Netflix, Intel
Differential Revision:	https://reviews.freebsd.org/D22650
2019-12-10 18:14:50 +00:00
Ian Lepore
e214f286f0 Declare the global kernel symbols created by ldscript.arm in arm's machdep.h,
and remove a couple scattered local declarations.

Most of these aren't referenced in C code (there are some references in
asm code), and they also aren't documented anywhere.  This helps a bit
with the latter.
2019-12-06 03:48:35 +00:00
Warner Losh
f86e60008b Regularize my copyright notice
o Remove All Rights Reserved from my notices
o imp@FreeBSD.org everywhere
o regularize punctiation, eliminate date ranges
o Make sure that it's clear that I don't claim All Rights reserved by listing
  All Rights Reserved on same line as other copyright holders (but not
  me). Other such holders are also listed last where it's clear.
2019-12-04 16:56:11 +00:00
Warner Losh
5bebf8b402 Remove two obsolete comments that reference splhigh/splx. 2019-11-21 18:49:54 +00:00
Konstantin Belousov
96448820a3 Port r353622 to sparc64 and arm v4.
Noted by:	alc
Reviewed by:	alc, jeff, markj
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D22056
2019-10-16 21:07:18 +00:00
Andriy Gapon
80475f9523 align use of cp15_pmccntr_get with its availability
According to ian, the only armv6 cpu we support is the 1176, so this
change is effectively a no-op.
The change is just to make the code more self-consistent.
The issue was noticed by a standalone module build for armv6.

Reviewed by:	ian
MFC after:	3 weeks
2019-10-07 07:37:42 +00:00
Ian Lepore
044477e294 Add 8 and 16 bit versions of atomic_cmpset and atomic_fcmpset for arm.
This adds 8 and 16 bit versions of the cmpset and fcmpset functions. Macros
are used to generate all the flavors from the same set of instructions; the
macro expansion handles the couple minor differences between each size
variation (generating ldrexb/ldrexh/ldrex for 8/16/32, etc).

In addition to handling new sizes, the instruction sequences used for cmpset
and fcmpset are rewritten to be a bit shorter/faster, and the new sequence
will not return false when *dst==*old but the store-exclusive fails because
of concurrent writers. Instead, it just loops like ldrex/strex sequences
normally do until it gets a non-conflicted store. The manpage allows LL/SC
architectures to bogusly return false, but there's no reason to actually do
so, at least on arm.

Reviewed by:	cognet
2019-10-01 19:39:00 +00:00
Konstantin Belousov
a2a0f90654 Centralize __pcpu definitions.
Many extern struct pcpu <something>__pcpu declarations were
copied/pasted in sources.  The issue is that the definition is MD, but
it cannot be provided by machine/pcpu.h due to actual struct pcpu
defined in sys/pcpu.h later than the inclusion of machine/pcpu.h.
This forced the copying when other code needed direct access to
__pcpu.  There is no way around it, due to machine/pcpu.h supplying
part of struct pcpu fields.

To work around the problem, add a new machine/pcpu_aux.h header, which
should fill any needed MD definitions after struct pcpu definition is
completed. This allows to remove copies of __pcpu spread around the
source.  Also on x86 it makes it possible to remove work arounds like
OFFSETOF_CURTHREAD or clang specific warnings supressions.

Reported and tested by:	lwhsu, bcran
Reviewed by:	imp, markj (previous version)
Discussed with:	jhb
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D21418
2019-08-29 07:25:27 +00:00
Jeff Roberson
2194393787 Move phys_avail definition into MI code. It is consumed in the MI layer and
doing so adds more flexibility with less redundant code.

Reviewed by:	jhb, markj, kib
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D21250
2019-08-16 00:45:14 +00:00
Ian Lepore
b522e138c5 De-pollute arm's sysarch.h.
Instead of including stdint.h for uintptr_t, include sys/_types.h and use
__types for everything that isn't a native C keyword type.

Remove the #include of cdefs.h.  It appears after the include of armreg.h
which has a precondition of cdefs.h being included before it, so everyone
including sysarch.h is already including cdefs.h.  (When armv5 support
goes away, there will be no need include armreg.h here either.)

Unfortunately, the unprefixed struct member names "addr" and "len" cannot
be changed, because 3rd-party software is relying on them (libcompiler_rt
is one known consumer).
2019-07-10 14:34:52 +00:00
Doug Moore
1c76d3a9fb Implement the ffs and fls functions, and their longer counterparts, in
cpufunc, in terms of __builtin_ffs and the like, for arm32 v6 and v7
architectures, and use those, rather than the simple libkern
implementations, in building arm32 kernels.

Reviewed by: manu
Approved by: kib, markj (mentors)
Tested by: iz-rpi03_hs-karlsruhe.de, mikael.urankar_gmail.com, ian
Differential Revision: https://reviews.freebsd.org/D20412
2019-05-28 15:47:00 +00:00
Michal Meloun
966e7b050d Use named field's initializer when constructing <foo>_platform structure.
In current code, the delay argument in FDT_PLATFORM_DEF(2) improperly
initialize refs field from kobj_class structure instead of delay_count
field.
This causes not working DELAY() function (due to never initialized
delay_count) in earlier boot stages, until the first timer was attached.

MFC after:	2 weeks
2019-03-19 14:32:54 +00:00
Konstantin Belousov
fd8d844f76 amd64 KPTI: add control from procctl(2).
Add the infrastructure to allow MD procctl(2) commands, and use it to
introduce amd64 PTI control and reporting.  PTI mode cannot be
modified for existing pmap, the knob controls PTI of the new vmspace
created on exec.

Requested by:	jhb
Reviewed by:	jhb, markj (previous version)
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D19514
2019-03-16 11:44:33 +00:00
Konstantin Belousov
e7a9df16e6 Add kernel support for Intel userspace protection keys feature on
Skylake Xeons.

See SDM rev. 68 Vol 3 4.6.2 Protection Keys and the description of the
RDPKRU and WRPKRU instructions.

Reviewed by:	markj
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D18893
2019-02-20 09:51:13 +00:00
Hans Petter Selasky
d7a9bfee8f Implement atomic_swap_xxx() for all platforms.
Differential Revision:	https://reviews.freebsd.org/D18450
Reviewed by:		kib@
MFC after:		3 days
Sponsored by:		Mellanox Technologies
2018-12-10 13:38:13 +00:00
Michal Meloun
025489d337 Fix cut&paste typo in atomic_fetchadd_64().
Reported by:	Jia-Shiun Li <jiashiun@gmail.com>
MFC after:	1 week
2018-12-07 11:10:27 +00:00
John Baldwin
4cbbb74888 Add a KPI for the delay while spinning on a spin lock.
Replace a call to DELAY(1) with a new cpu_lock_delay() KPI.  Currently
cpu_lock_delay() is defined to DELAY(1) on all platforms.  However,
platforms with a DELAY() implementation that uses spin locks should
implement a custom cpu_lock_delay() doesn't use locks.

Reviewed by:	kib
MFC after:	3 days
2018-11-05 21:34:17 +00:00
Konstantin Belousov
f6bb885ff6 Move the fixed base for PIE loading on arm.
Existing base causes conflicts for direct execution of ld-elf.so.1
because default linking base for non-PIE binaries is 0x10000.

Reported and tested by:	Mark Millard <marklmi26-fbsd@yahoo.com>
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-11-04 19:11:32 +00:00
Brooks Davis
c3adaa3305 Consolidate identical ELF auxargs type defintions.
All platforms except powerpc use the same values and powerpc shares a
majority of them.

Go ahead and declare AT_NOTELF, AT_UID, and AT_EUID in favor of the
unused AT_DCACHEBSIZE, AT_ICACHEBSIZE, and AT_UCACHEBSIZE for powerpc.

Reviewed by:	jhb, imp
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D17397
2018-10-22 22:24:32 +00:00
Andrew Turner
a24d3c094e Remove the L1 and L2 xscale page defines and rename the generic macros to
the common name. While here move the macros to check these into pmap-v4.c
as they're only used there.

Sponsored by:	DARPA, AFRL
2018-08-16 10:00:51 +00:00
Andrew Turner
d8ba426351 Remove pmap_kenter_section from the arm pmap. It's unused.
Sponsored by:	DARPA, AFRL
2018-08-15 14:57:34 +00:00
Andrew Turner
ac2d0191fc Remove ARM_HAVE_SUPERSECTIONS. It was only supported on some XScale CPUs.
Sponsored by:	DARPA, AFRL
2018-08-15 14:52:56 +00:00
Andrew Turner
d20512fab9 Make code and data only used within the arm pmap code as static.
Sponsored by:	DARPA, AFRL
2018-08-15 14:45:01 +00:00
Andrew Turner
fa68430df2 Remove arm pmap variables that are only ever set and never read.
Sponsored by:	DARPA, AFRL
2018-08-15 14:29:04 +00:00
Andrew Turner
8082df3c7e Remove ARM_MMU_GENERIC, it's the only ARMV4/v5 MMU we support.
Sponsored by:	DARPA, AFRL
2018-08-15 14:19:07 +00:00
Andrew Turner
795272d885 Remove checks for now unsupported CPU_* values in arm headers.
Sponsored by:	DARPA, AFRL
2018-08-15 13:48:59 +00:00
Andrew Turner
daa5b12a0a Start to remove XScale support from the ARMv4/v5 pmap. Support for XScale
has been removed from the kernel so we can remove it from here to help
simplify the code.

Sponsored by:	DARPA, AFRL
2018-08-15 13:40:16 +00:00
Andrew Turner
3f9baabdd0 Remove cpu_pfr from arm. It's unused. 2018-08-14 16:01:25 +00:00
Alan Cox
2bf8cb3804 Add support for pmap_enter(..., psind=1) to the armv6 pmap. In other words,
add support for explicitly requesting that pmap_enter() create a 1 MB page
mapping.  (Essentially, this feature allows the machine-independent layer
to create superpage mappings preemptively, and not wait for automatic
promotion to occur.)

Export pmap_ps_enabled() to the machine-independent layer.

Add a flag to pmap_pv_insert_pte1() that specifies whether it should fail
or reclaim a PV entry when one is not available.

Refactor pmap_enter_pte1() into two functions, one by the same name, that
is a general-purpose function for creating pte1 mappings, and another,
pmap_enter_1mpage(), that is used to prefault 1 MB read- and/or execute-
only mappings for execve(2), mmap(2), and shmat(2).

In addition, as an optimization to pmap_enter(..., psind=0), eliminate the
use of pte2_is_managed() from pmap_enter().  Unlike the x86 pmap
implementations, armv6 does not have a managed bit defined within the PTE.
So, pte2_is_managed() is actually a call to PHYS_TO_VM_PAGE(), which is O(n)
in the number of vm_phys_segs[].  All but one call to PHYS_TO_VM_PAGE() in
pmap_enter() can be avoided.

Reviewed by:	kib, markj, mmel
Tested by:	mmel
MFC after:	6 weeks
Differential Revision:	https://reviews.freebsd.org/D16555
2018-08-08 16:55:01 +00:00
Marius Strobl
ac97c7e4c1 Implement atomic_swap_64(9). 2018-08-07 18:56:01 +00:00
Andrew Turner
cb5ce014d4 Use the cp15 functions to read cp15 registers rather than using assembly
functions. The former are static inline functions so will compile to a
single instruction.
2018-07-28 17:21:34 +00:00
Andrew Turner
90e9f8828e Make the arm cpu setup functions static. Any other place that needs these
functions will use the function pointer we create for them.
2018-07-28 12:20:42 +00:00
Andrew Turner
0faf121391 Remove old CPU_ values from the arm cpufunc code. These have been removed. 2018-07-28 12:00:32 +00:00
Andrew Turner
15bff09749 Only support INTRNG in the SMP code on arm. We already require INTRNG on
anything that could be multicore on arm.
2018-07-28 07:54:21 +00:00
Warner Losh
c81b12e0d7 Revert r336773: it removed too much.
r336773 removed all things xscale. However, some things xscale are
really armv5. Revert that entirely. A more modest removal will follow.

Noticed by: andrew@
2018-07-27 21:25:01 +00:00
Warner Losh
626930c2fd Remove xscale support
The OLD XSCALE stuff hasn't been useful in a while. The original
committer (cognet@) was the only one that had boards for it. He's
blessed this removal. Newer XSCALE (GUMSTIX) is for hardware that's
quite old. After discussion on arm@, it was clear there was no support
for keeping it.

Differential Review: https://reviews.freebsd.org/D16313
2018-07-27 18:33:09 +00:00
Warner Losh
58d5c51106 Remove Atmel AT91RM9200 and AT91SAM9 support.
The last known robust version of this code base was FreeBSD 8.2. There
are no users of this on current, and all users of it have abandoned
this platform or are in legacy mode with a prior version of FreeBSD.

All known users on arm@ approved this removal, and there were no
objections.

Differential Revision: https://reviews.freebsd.org/D16312
2018-07-27 18:28:22 +00:00
Emmanuel Vadot
6185fb0f81 arm: Implement cpu_est_clockrate for armv[67] 2018-07-19 11:27:11 +00:00
Michal Meloun
cc28ae0479 Remove the dead code from ARM cpufunc_* files.
The elf trampoline was never been supported for ARMv6 and ARMv7 and was
disconnected from kernel build many months ago.

MFC after:	2 weeks
2018-07-18 10:33:07 +00:00
Andrew Turner
b04e143189 Also check if __ARM_ARCH_6KZ__ is defined when detecting when to use ARMv6
instructions. There is some code that still uses the _ARM_ARCH_* macros.

Sponsored by:	DARPA, AFRL
2018-07-18 09:17:37 +00:00