2017-01-10 04:50:26 +00:00
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/*-
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2017-11-20 19:36:21 +00:00
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* SPDX-License-Identifier: BSD-2-Clause
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*
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2018-03-21 15:57:36 +00:00
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* Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
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2017-01-10 04:50:26 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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This delta has a few important items:
PR 122839 is fixed in both em and in igb
Second, the issue on building modules since the static kernel
build changes is now resolved. I was not able to get the fancier
directory hierarchy working, but this works, both em and igb
build as modules now.
Third, there is now support in em for two new NICs, Hartwell
(or 82574) is a low cost PCIE dual port adapter that has MSIX,
for this release it uses 3 vectors only, RX, TX, and LINK. In
the next release I will add a second TX and RX queue. Also, there
is support here for ICH10, the followon to ICH9. Both of these are
early releases, general availability will follow soon.
Fourth: On Hartwell and ICH10 we now have IEEE 1588 PTP support,
I have implemented this in a provisional way so that early adopters
may try and comment on the functionality. The IOCTL structure may
change. This feature is off by default, you need to edit the Makefile
and add the EM_TIMESYNC define to get the code.
Enjoy all!!
2008-04-25 21:19:41 +00:00
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/*$FreeBSD$*/
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2017-01-10 03:23:22 +00:00
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#include "opt_ddb.h"
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#include "opt_inet.h"
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#include "opt_inet6.h"
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#ifdef HAVE_KERNEL_OPTION_HEADERS
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#include "opt_device_polling.h"
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#ifdef DDB
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#include <sys/types.h>
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#include <ddb/ddb.h>
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#endif
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#if __FreeBSD_version >= 800000
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#include <sys/buf_ring.h>
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#endif
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/malloc.h>
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#include <sys/mbuf.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/smp.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/sysctl.h>
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#include <sys/taskqueue.h>
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#include <sys/eventhandler.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <net/bpf.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_arp.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/iflib.h>
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#include <net/if_types.h>
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#include <net/if_vlan_var.h>
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#include <netinet/in_systm.h>
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#include <netinet/ip.h>
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#include <netinet/ip6.h>
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#include <netinet/tcp.h>
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#include <netinet/udp.h>
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#include <machine/in_cksum.h>
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#include <dev/led/led.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include "e1000_api.h"
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#include "e1000_82571.h"
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#include "ifdi_if.h"
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2001-12-02 07:37:17 +00:00
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2002-02-13 18:19:27 +00:00
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2001-12-02 07:37:17 +00:00
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#ifndef _EM_H_DEFINED_
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#define _EM_H_DEFINED_
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2009-06-24 17:41:29 +00:00
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2002-12-23 19:11:23 +00:00
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/* Tunables */
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/*
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2017-08-25 22:38:55 +00:00
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* EM_MAX_TXD: Maximum number of Transmit Descriptors
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2002-11-08 18:14:17 +00:00
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* Valid Range: 80-256 for 82542 and 82543-based adapters
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2003-06-05 17:51:38 +00:00
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* 80-4096 for others
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2017-08-25 22:38:55 +00:00
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* Default Value: 1024
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2002-11-08 18:14:17 +00:00
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* This value is the number of transmit descriptors allocated by the driver.
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* Increasing this value allows the driver to queue more transmits. Each
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2002-12-23 19:11:23 +00:00
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* descriptor is 16 bytes.
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2005-11-21 04:17:43 +00:00
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* Since TDLEN should be multiple of 128bytes, the number of transmit
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* desscriptors should meet the following condition.
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2007-05-04 00:00:12 +00:00
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* (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
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2002-12-23 19:11:23 +00:00
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*/
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2017-01-10 03:23:22 +00:00
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#define EM_MIN_TXD 128
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2005-11-17 10:13:18 +00:00
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#define EM_MAX_TXD 4096
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2017-01-10 03:23:22 +00:00
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#define EM_DEFAULT_TXD 1024
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#define EM_DEFAULT_MULTI_TXD 4096
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2017-08-25 22:38:55 +00:00
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#define IGB_MAX_TXD 4096
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2002-11-08 18:14:17 +00:00
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/*
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2017-08-25 22:38:55 +00:00
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* EM_MAX_RXD - Maximum number of receive Descriptors
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2002-11-08 18:14:17 +00:00
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* Valid Range: 80-256 for 82542 and 82543-based adapters
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2003-06-05 17:51:38 +00:00
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* 80-4096 for others
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2017-08-25 22:38:55 +00:00
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* Default Value: 1024
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2002-11-08 18:14:17 +00:00
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* This value is the number of receive descriptors allocated by the driver.
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* Increasing this value allows the driver to buffer more incoming packets.
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* Each descriptor is 16 bytes. A receive buffer is also allocated for each
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* descriptor. The maximum MTU size is 16110.
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2005-11-21 04:17:43 +00:00
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* Since TDLEN should be multiple of 128bytes, the number of transmit
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* desscriptors should meet the following condition.
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2007-05-04 00:00:12 +00:00
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* (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
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2002-11-08 18:14:17 +00:00
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*/
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2017-01-10 03:23:22 +00:00
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#define EM_MIN_RXD 128
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2005-11-17 10:13:18 +00:00
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#define EM_MAX_RXD 4096
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2017-01-10 03:23:22 +00:00
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#define EM_DEFAULT_RXD 1024
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#define EM_DEFAULT_MULTI_RXD 4096
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2017-08-25 22:38:55 +00:00
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#define IGB_MAX_RXD 4096
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2002-11-08 18:14:17 +00:00
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/*
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2003-08-27 21:52:37 +00:00
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* EM_TIDV - Transmit Interrupt Delay Value
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2002-11-08 18:14:17 +00:00
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value delays the generation of transmit interrupts in units of
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* 1.024 microseconds. Transmit interrupt reduction can improve CPU
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* efficiency if properly tuned for specific network traffic. If the
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* system is reporting dropped transmits, this value may be set too high
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* causing the driver to run out of available transmit descriptors.
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*/
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2002-12-23 19:11:23 +00:00
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#define EM_TIDV 64
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/*
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2006-10-31 15:00:14 +00:00
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* EM_TADV - Transmit Absolute Interrupt Delay Value
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* (Not valid for 82542/82543/82544)
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2002-12-23 19:11:23 +00:00
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value, in units of 1.024 microseconds, limits the delay in which a
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2003-08-27 21:52:37 +00:00
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* transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
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2002-12-23 19:11:23 +00:00
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* this value ensures that an interrupt is generated after the initial
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* packet is sent on the wire within the set amount of time. Proper tuning,
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2003-08-27 21:52:37 +00:00
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* along with EM_TIDV, may improve traffic throughput in specific
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2002-12-23 19:11:23 +00:00
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* network conditions.
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*/
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#define EM_TADV 64
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2002-11-08 18:14:17 +00:00
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/*
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2003-08-27 21:52:37 +00:00
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* EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
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2002-11-08 18:14:17 +00:00
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* Valid Range: 0-65535 (0=off)
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* Default Value: 0
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* This value delays the generation of receive interrupts in units of 1.024
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* microseconds. Receive interrupt reduction can improve CPU efficiency if
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* properly tuned for specific network traffic. Increasing this value adds
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* extra latency to frame reception and can end up decreasing the throughput
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* of TCP traffic. If the system is reporting dropped receives, this value
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* may be set too high, causing the driver to run out of available receive
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* descriptors.
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*
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2003-08-27 21:52:37 +00:00
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* CAUTION: When setting EM_RDTR to a value other than 0, adapters
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2002-12-23 19:11:23 +00:00
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* may hang (stop transmitting) under certain network conditions.
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2006-10-31 15:00:14 +00:00
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* If this occurs a WATCHDOG message is logged in the system
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* event log. In addition, the controller is automatically reset,
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* restoring the network connection. To eliminate the potential
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* for the hang ensure that EM_RDTR is set to 0.
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2002-11-08 18:14:17 +00:00
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*/
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2002-12-23 19:11:23 +00:00
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#define EM_RDTR 0
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/*
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2003-08-27 21:52:37 +00:00
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* Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
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2002-12-23 19:11:23 +00:00
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value, in units of 1.024 microseconds, limits the delay in which a
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2003-08-27 21:52:37 +00:00
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* receive interrupt is generated. Useful only if EM_RDTR is non-zero,
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2002-12-23 19:11:23 +00:00
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* this value ensures that an interrupt is generated after the initial
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* packet is received within the set amount of time. Proper tuning,
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2003-08-27 21:52:37 +00:00
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* along with EM_RDTR, may improve traffic throughput in specific network
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2002-12-23 19:11:23 +00:00
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* conditions.
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*/
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#define EM_RADV 64
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2002-11-08 18:14:17 +00:00
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/*
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* This parameter controls whether or not autonegotation is enabled.
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* 0 - Disable autonegotiation
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* 1 - Enable autonegotiation
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*/
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#define DO_AUTO_NEG 1
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/*
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* This parameter control whether or not the driver will wait for
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* autonegotiation to complete.
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* 1 - Wait for autonegotiation to complete
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* 0 - Don't wait for autonegotiation to complete
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*/
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2003-06-05 17:51:38 +00:00
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#define WAIT_FOR_AUTO_NEG_DEFAULT 0
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2002-11-08 18:14:17 +00:00
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2007-05-04 00:00:12 +00:00
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/* Tunables -- End */
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2006-11-23 05:43:39 +00:00
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2007-05-04 00:00:12 +00:00
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#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
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ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
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ADVERTISE_1000_FULL)
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2006-11-23 05:43:39 +00:00
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2007-05-04 00:00:12 +00:00
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#define AUTO_ALL_MODES 0
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2001-12-02 07:37:17 +00:00
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2007-05-04 00:00:12 +00:00
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/* PHY master/slave setting */
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#define EM_MASTER_SLAVE e1000_ms_hw_default
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2002-12-23 19:11:23 +00:00
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2007-05-04 00:00:12 +00:00
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/*
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* Micellaneous constants
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*/
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2001-12-02 07:37:17 +00:00
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#define EM_VENDOR_ID 0x8086
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2007-05-04 00:00:12 +00:00
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#define EM_FLASH 0x0014
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2003-03-21 21:47:31 +00:00
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2001-12-02 07:37:17 +00:00
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#define EM_JUMBO_PBA 0x00000028
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#define EM_DEFAULT_PBA 0x00000030
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2003-03-21 21:47:31 +00:00
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#define EM_SMARTSPEED_DOWNSHIFT 3
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#define EM_SMARTSPEED_MAX 15
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Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
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#define EM_MAX_LOOP 10
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2003-03-21 21:47:31 +00:00
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2001-12-02 07:37:17 +00:00
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#define MAX_NUM_MULTICAST_ADDRESSES 128
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#define PCI_ANY_ID (~0U)
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#define ETHER_ALIGN 2
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2007-05-04 00:00:12 +00:00
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#define EM_FC_PAUSE_TIME 0x0680
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#define EM_EEPROM_APME 0x400;
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2009-12-08 01:07:44 +00:00
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#define EM_82544_APME 0x0004;
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2001-12-02 07:37:17 +00:00
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2017-07-19 22:41:22 +00:00
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/* Support AutoMediaDetect for Marvell M88 PHY in i354 */
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#define IGB_MEDIA_RESET (1 << 0)
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/* Define the starting Interrupt rate per Queue */
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#define IGB_INTS_PER_SEC 8000
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#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
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#define IGB_LINK_ITR 2000
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#define I210_LINK_DELAY 1000
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#define IGB_TXPBSIZE 20408
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#define IGB_HDR_BUF 128
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#define IGB_PKTTYPE_MASK 0x0000FFF0
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#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
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2015-06-02 18:28:41 +00:00
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/*
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* Driver state logic for the detection of a hung state
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* in hardware. Set TX_HUNG whenever a TX packet is used
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* (data is sent) and clear it when txeof() is invoked if
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* any descriptors from the ring are cleaned/reclaimed.
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* Increment internal counter if no descriptors are cleaned
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* and compare to TX_MAXTRIES. When counter > TX_MAXTRIES,
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* reset adapter.
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*/
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#define EM_TX_IDLE 0x00000000
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#define EM_TX_BUSY 0x00000001
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#define EM_TX_HUNG 0x80000000
|
|
|
|
#define EM_TX_MAXTRIES 10
|
2010-10-26 00:07:58 +00:00
|
|
|
|
2016-02-05 17:14:37 +00:00
|
|
|
#define PCICFG_DESC_RING_STATUS 0xe4
|
|
|
|
#define FLUSH_DESC_REQUIRED 0x100
|
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
|
|
|
|
#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \
|
|
|
|
((hw->mac.type <= e1000_82576) ? 16 : 8))
|
|
|
|
#define IGB_RX_HTHRESH 8
|
|
|
|
#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
|
|
|
|
(adapter->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4)
|
|
|
|
|
|
|
|
#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
|
|
|
|
#define IGB_TX_HTHRESH 1
|
|
|
|
#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \
|
|
|
|
(adapter->intr_type == IFLIB_INTR_MSIX) ? 1 : 16)
|
|
|
|
|
2006-08-03 09:20:11 +00:00
|
|
|
/*
|
|
|
|
* TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
|
|
|
|
* multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
|
|
|
|
* also optimize cache line size effect. H/W supports up to cache line size 128.
|
|
|
|
*/
|
|
|
|
#define EM_DBA_ALIGN 128
|
|
|
|
|
Change EM_MULTIQUEUE to a real kernconf entry and enable support for
up to 2 rx/tx queues for the 82574.
Program the 82574 to enable 5 msix vectors, assign 1 to each rx queue,
1 to each tx queue and 1 to the link handler.
Inspired by DragonFlyBSD, enable some RSS logic for handling tx queue
handling/processing.
Move multiqueue handler functions so that they line up better in a diff
review to if_igb.c
Always enqueue tx work to be done in em_mq_start, if unable to acquire
the TX lock, then this will be processed in the background later by the
taskqueue. Remove mbuf argument from em_start_mq_locked() as the work
is always enqueued. (stolen from igb)
Setup TARC, TXDCTL and RXDCTL registers for better performance and stability
in multiqueue and singlequeue implementations. Handle Intel errata 3 and
generic multiqueue behavior with the initialization of TARC(0) and TARC(1)
Bind interrupt threads to cpus in order. (stolen from igb)
Add 2 new DDB functions, one to display the queue(s) and their settings and
one to reset the adapter. Primarily used for debugging.
In the multiqueue configuration, bump RXD and TXD ring size to max for the
adapter (4096). Setup an RDTR of 64 and an RADV of 128 in multiqueue configuration
to cut down on the number of interrupts. RADV was arbitrarily set to 2x RDTR
and can be adjusted as needed.
Cleanup the display in top a bit to make it clearer where the taskqueue threads
are running and what they should be doing.
Ensure that both queues are processed by em_local_timer() by writing them both
to the IMS register to generate soft interrupts.
Ensure that an soft interrupt is generated when em_msix_link() is run so that
any races between assertion of the link/status interrupt and a rx/tx interrupt
are handled.
Document existing tuneables: hw.em.eee_setting, hw.em.msix, hw.em.smart_pwr_down, hw.em.sbp
Document use of hw.em.num_queues and the new kernel option EM_MULTIQUEUE
Thanks to Intel for their continued support of FreeBSD.
Reviewed by: erj jfv hiren gnn wblock
Obtained from: Intel Corporation
MFC after: 2 weeks
Relnotes: Yes
Sponsored by: Limelight Networks
Differential Revision: https://reviews.freebsd.org/D1994
2015-06-03 18:01:09 +00:00
|
|
|
/*
|
|
|
|
* See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9
|
|
|
|
*/
|
|
|
|
#define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */
|
|
|
|
#define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */
|
|
|
|
#define TARC_MQ_FIX (1 << 23) | \
|
|
|
|
(1 << 24) | \
|
|
|
|
(1 << 25) /* Handle errata in MQ mode */
|
|
|
|
#define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */
|
2006-08-03 09:20:11 +00:00
|
|
|
|
2006-10-31 15:00:14 +00:00
|
|
|
/* PCI Config defines */
|
2007-05-04 00:00:12 +00:00
|
|
|
#define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK)
|
|
|
|
#define EM_BAR_TYPE_MASK 0x00000001
|
|
|
|
#define EM_BAR_TYPE_MMEM 0x00000000
|
2017-01-10 03:23:22 +00:00
|
|
|
#define EM_BAR_TYPE_IO 0x00000001
|
2007-05-04 00:00:12 +00:00
|
|
|
#define EM_BAR_TYPE_FLASH 0x0014
|
|
|
|
#define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK)
|
|
|
|
#define EM_BAR_MEM_TYPE_MASK 0x00000006
|
|
|
|
#define EM_BAR_MEM_TYPE_32BIT 0x00000000
|
|
|
|
#define EM_BAR_MEM_TYPE_64BIT 0x00000004
|
2007-05-17 00:14:03 +00:00
|
|
|
#define EM_MSIX_BAR 3 /* On 82575 */
|
2006-10-31 15:00:14 +00:00
|
|
|
|
2011-12-10 07:08:52 +00:00
|
|
|
/* More backward compatibility */
|
|
|
|
#if __FreeBSD_version < 900000
|
2011-03-18 18:54:00 +00:00
|
|
|
#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
|
|
|
|
#endif
|
|
|
|
|
2001-12-02 07:37:17 +00:00
|
|
|
/* Defines for printing debug information */
|
|
|
|
#define DEBUG_INIT 0
|
|
|
|
#define DEBUG_IOCTL 0
|
|
|
|
#define DEBUG_HW 0
|
|
|
|
|
|
|
|
#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
|
|
|
|
#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
|
|
|
|
#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
|
|
|
|
#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
|
|
|
|
#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
|
|
|
|
#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
|
|
|
|
#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
|
|
|
|
#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
|
|
|
|
#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
|
2002-04-06 00:36:53 +00:00
|
|
|
|
Fix and clean up usage of DMA and TSO segments:
- At Intel it is believed that most of their products support "only"
40 DMA segments so lower {EM,IGB}_MAX_SCATTER accordingly. Actually,
40 is more than plenty to handle full size TSO packets so it doesn't
make sense to further distinguish between MAC variants that really
can do 64 DMA segments. Moreover, capping at 40 DMA segments limits
the stack usage of {em,igb}_xmit() that - given the rare use of more
than these - previously hardly was justifiable, while still being
sufficient to avoid the problems seen with em(4) and EM_MAX_SCATTER
set to 32.
- In igb(4), pass the actually supported TSO parameters up the stack.
Previously, the defaults set in if_attach_internal() were applied,
i. e. a maximum of 35 TSO segments, which made supporting more than
these in the driver pointless. However, this might explain why no
problems were seen with IGB_MAX_SCATTER at 64.
- In em(4), take the 5 m_pullup(9) invocations performed by em_xmit()
in the TSO case into account when reporting TSO parameters upwards.
In the worst case, each of these calls will add another mbuf and,
thus, the requirement for an additional DMA segment. So for best
performance, it doesn't make sense to advertize a maximum of TSO
segments that typically will require defragmentation in em_xmit().
Again, this leaves enough room to handle full size TSO packets.
- Drop TSO macros from if_lem.h given that corresponding MACS don't
support TSO in the first place.
Reviewed by: erj, sbruno, jeffrey.e.pieper_intel.com
Approved by: erj
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D5238
2016-02-23 01:19:26 +00:00
|
|
|
#define EM_MAX_SCATTER 40
|
2009-06-24 17:41:29 +00:00
|
|
|
#define EM_VFTA_SIZE 128
|
Assorted TSO fixes for em(4)/iflib(9) and dead code removal:
- Ever since the workaround for the silicon bug of TSO4 causing MAC hangs
was committed in r295133, CSUM_TSO always got disabled unconditionally
by em(4) on the first invocation of em_init_locked(). However, even with
that problem fixed, it turned out that for at least e. g. 82579 not all
necessary TSO workarounds are in place, still causing MAC hangs even at
Gigabit speed. Thus, for stable/11, TSO usage was deliberately disabled
in r323292 (r323293 for stable/10) for the EM-class by default, allowing
users to turn it on if it happens to work with their particular EM MAC
in a Gigabit-only environment.
In head, the TSO workaround for speeds other than Gigabit was lost with
the conversion to iflib(9) in r311849 (possibly along with another one
or two TSO workarounds). Yet at the same time, for EM-class MACs TSO4
got enabled by default again, causing device hangs. Therefore, change the
default for this hardware class back to have TSO4 off, allowing users
to turn it on manually if it happens to work in their environment as
we do in stable/{10,11}. An alternative would be to add a whitelist of
EM-class devices where TSO4 actually is reliable with the workarounds in
place, but given that the advantage of TSO at Gigabit speed is rather
limited - especially with the overhead of these workarounds -, that's
really not worth it. [1]
This change includes the addition of an isc_capabilities to struct
if_softc_ctx so iflib(9) can also handle interface capabilities that
shouldn't be enabled by default which is used to handle the default-off
capabilities of e1000 as suggested by shurd@ and moving their handling
from em_setup_interface() to em_if_attach_pre() accordingly.
- Although 82543 support TSO4 in theory, the former lem(4) didn't have
support for TSO4, presumably because TSO4 is even more broken in the
LEM-class of MACs than the later EM ones. Still, TSO4 for LEM-class
devices was enabled as part of the conversion to iflib(9) in r311849,
causing device hangs. So revert back to the pre-r311849 behavior of
not supporting TSO4 for LEM-class at all, which includes not creating
a TSO DMA tag in iflib(9) for devices not having IFCAP_TSO4 set. [2]
- In fact, the FreeBSD TCP stack can handle a TSO size of IP_MAXPACKET
(65535) rather than FREEBSD_TSO_SIZE_MAX (65518). However, the TSO
DMA must have a maxsize of the maximum TSO size plus the size of a
VLAN header for software VLAN tagging. The iflib(9) converted em(4),
thus, first correctly sets scctx->isc_tx_tso_size_max to EM_TSO_SIZE
in em_if_attach_pre(), but later on overrides it with IP_MAXPACKET
in em_setup_interface() (apparently, left-over from pre-iflib(9)
times). So remove the later and correct iflib(9) to correctly cap
the maximum TSO size reported to the stack at IP_MAXPACKET. While at
it, let iflib(9) use if_sethwtsomax*().
This change includes the addition of isc_tso_max{seg,}size DMA engine
constraints for the TSO DMA tag to struct if_shared_ctx and letting
iflib_txsd_alloc() automatically adjust the maxsize of that tag in case
IFCAP_VLAN_MTU is supported as requested by shurd@.
- Move the if_setifheaderlen(9) call for adjusting the maximum Ethernet
header length from {ixgbe,ixl,ixlv,ixv,em}_setup_interface() to iflib(9)
so adjustment is automatically done in case IFCAP_VLAN_MTU is supported.
As a consequence, this adjustment now is also done in case of bnxt(4)
which missed it previously.
- Move the reduction of the maximum TSO segment count reported to the
stack by the number of m_pullup(9) calls (which in the worst case,
can add another mbuf and, thus, the requirement for another DMA
segment each) in the transmit path for performance reasons from
em_setup_interface() to iflib_txsd_alloc() as these pull-ups are now
done in iflib_parse_header() rather than in the no longer existing
em_xmit(). Moreover, this optimization applies to all drivers using
iflib(9) and not just em(4); all in-tree iflib(9) consumers still
have enough room to handle full size TSO packets. Also, reduce the
adjustment to the maximum number of m_pullup(9)'s now performed in
iflib_parse_header().
- Prior to the conversion of em(4)/igb(4)/lem(4) and ixl(4) to iflib(9)
in r311849 and r335338 respectively, these drivers didn't enable
IFCAP_VLAN_HWFILTER by default due to VLAN events not being passed
through by lagg(4). With iflib(9), IFCAP_VLAN_HWFILTER was turned on
by default but also lagg(4) was fixed in that regard in r203548. So
just remove the now redundant and defunct IFCAP_VLAN_HWFILTER handling
in {em,ixl,ixlv}_setup_interface().
- Nuke other redundant IFCAP_* setting in {em,ixl,ixlv}_setup_interface()
which is (more completely) already done in {em,ixl,ixlv}_if_attach_pre()
now.
- Remove some redundant/dead setting of scctx->isc_tx_csum_flags in
em_if_attach_pre().
- Remove some IFCAP_* duplicated either directly or indirectly (e. g.
via IFCAP_HWCSUM) in {EM,IGB,IXL}_CAPS.
- Don't bother to fiddle with IFCAP_HWSTATS in ixgbe(4)/ixgbev(4) as
iflib(9) adds that capability unconditionally.
- Remove some unused macros from em(4).
- Bump __FreeBSD_version as some of the above changes require the modules
of drivers using iflib(9) to be recompiled.
Okayed by: sbruno@ at 201806 DevSummit Transport Working Group [1]
Reviewed by: sbruno (earlier version), erj
PR: 219428 (part of; comment #10) [1], 220997 (part of; comment #3) [2]
Differential Revision: https://reviews.freebsd.org/D15720
2018-07-15 19:04:23 +00:00
|
|
|
#define EM_TSO_SIZE 65535
|
2007-05-04 00:00:12 +00:00
|
|
|
#define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */
|
This delta has a few important items:
PR 122839 is fixed in both em and in igb
Second, the issue on building modules since the static kernel
build changes is now resolved. I was not able to get the fancier
directory hierarchy working, but this works, both em and igb
build as modules now.
Third, there is now support in em for two new NICs, Hartwell
(or 82574) is a low cost PCIE dual port adapter that has MSIX,
for this release it uses 3 vectors only, RX, TX, and LINK. In
the next release I will add a second TX and RX queue. Also, there
is support here for ICH10, the followon to ICH9. Both of these are
early releases, general availability will follow soon.
Fourth: On Hartwell and ICH10 we now have IEEE 1588 PTP support,
I have implemented this in a provisional way so that early adopters
may try and comment on the functionality. The IOCTL structure may
change. This feature is off by default, you need to edit the Makefile
and add the EM_TIMESYNC define to get the code.
Enjoy all!!
2008-04-25 21:19:41 +00:00
|
|
|
#define EM_MSIX_MASK 0x01F00000 /* For 82574 use */
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
#define EM_MSIX_LINK 0x01000000 /* For 82574 use */
|
2007-05-04 00:00:12 +00:00
|
|
|
#define ETH_ZLEN 60
|
|
|
|
#define ETH_ADDR_LEN 6
|
2018-10-09 20:16:19 +00:00
|
|
|
#define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */
|
|
|
|
#define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \
|
|
|
|
CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \
|
|
|
|
CSUM_IP6_SCTP) /* Offload bits in mbuf flag */
|
|
|
|
|
2006-10-28 00:47:55 +00:00
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
#define IGB_PKTTYPE_MASK 0x0000FFF0
|
|
|
|
#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
|
|
|
|
|
This delta has a few important items:
PR 122839 is fixed in both em and in igb
Second, the issue on building modules since the static kernel
build changes is now resolved. I was not able to get the fancier
directory hierarchy working, but this works, both em and igb
build as modules now.
Third, there is now support in em for two new NICs, Hartwell
(or 82574) is a low cost PCIE dual port adapter that has MSIX,
for this release it uses 3 vectors only, RX, TX, and LINK. In
the next release I will add a second TX and RX queue. Also, there
is support here for ICH10, the followon to ICH9. Both of these are
early releases, general availability will follow soon.
Fourth: On Hartwell and ICH10 we now have IEEE 1588 PTP support,
I have implemented this in a provisional way so that early adopters
may try and comment on the functionality. The IOCTL structure may
change. This feature is off by default, you need to edit the Makefile
and add the EM_TIMESYNC define to get the code.
Enjoy all!!
2008-04-25 21:19:41 +00:00
|
|
|
/*
|
|
|
|
* 82574 has a nonstandard address for EIAC
|
2019-01-30 13:21:26 +00:00
|
|
|
* and since its only used in MSI-X, and in
|
|
|
|
* the em driver only 82574 uses MSI-X we can
|
This delta has a few important items:
PR 122839 is fixed in both em and in igb
Second, the issue on building modules since the static kernel
build changes is now resolved. I was not able to get the fancier
directory hierarchy working, but this works, both em and igb
build as modules now.
Third, there is now support in em for two new NICs, Hartwell
(or 82574) is a low cost PCIE dual port adapter that has MSIX,
for this release it uses 3 vectors only, RX, TX, and LINK. In
the next release I will add a second TX and RX queue. Also, there
is support here for ICH10, the followon to ICH9. Both of these are
early releases, general availability will follow soon.
Fourth: On Hartwell and ICH10 we now have IEEE 1588 PTP support,
I have implemented this in a provisional way so that early adopters
may try and comment on the functionality. The IOCTL structure may
change. This feature is off by default, you need to edit the Makefile
and add the EM_TIMESYNC define to get the code.
Enjoy all!!
2008-04-25 21:19:41 +00:00
|
|
|
* solve it just using this define.
|
|
|
|
*/
|
|
|
|
#define EM_EIAC 0x000DC
|
Change EM_MULTIQUEUE to a real kernconf entry and enable support for
up to 2 rx/tx queues for the 82574.
Program the 82574 to enable 5 msix vectors, assign 1 to each rx queue,
1 to each tx queue and 1 to the link handler.
Inspired by DragonFlyBSD, enable some RSS logic for handling tx queue
handling/processing.
Move multiqueue handler functions so that they line up better in a diff
review to if_igb.c
Always enqueue tx work to be done in em_mq_start, if unable to acquire
the TX lock, then this will be processed in the background later by the
taskqueue. Remove mbuf argument from em_start_mq_locked() as the work
is always enqueued. (stolen from igb)
Setup TARC, TXDCTL and RXDCTL registers for better performance and stability
in multiqueue and singlequeue implementations. Handle Intel errata 3 and
generic multiqueue behavior with the initialization of TARC(0) and TARC(1)
Bind interrupt threads to cpus in order. (stolen from igb)
Add 2 new DDB functions, one to display the queue(s) and their settings and
one to reset the adapter. Primarily used for debugging.
In the multiqueue configuration, bump RXD and TXD ring size to max for the
adapter (4096). Setup an RDTR of 64 and an RADV of 128 in multiqueue configuration
to cut down on the number of interrupts. RADV was arbitrarily set to 2x RDTR
and can be adjusted as needed.
Cleanup the display in top a bit to make it clearer where the taskqueue threads
are running and what they should be doing.
Ensure that both queues are processed by em_local_timer() by writing them both
to the IMS register to generate soft interrupts.
Ensure that an soft interrupt is generated when em_msix_link() is run so that
any races between assertion of the link/status interrupt and a rx/tx interrupt
are handled.
Document existing tuneables: hw.em.eee_setting, hw.em.msix, hw.em.smart_pwr_down, hw.em.sbp
Document use of hw.em.num_queues and the new kernel option EM_MULTIQUEUE
Thanks to Intel for their continued support of FreeBSD.
Reviewed by: erj jfv hiren gnn wblock
Obtained from: Intel Corporation
MFC after: 2 weeks
Relnotes: Yes
Sponsored by: Limelight Networks
Differential Revision: https://reviews.freebsd.org/D1994
2015-06-03 18:01:09 +00:00
|
|
|
/*
|
|
|
|
* 82574 only reports 3 MSI-X vectors by default;
|
|
|
|
* defines assisting with making it report 5 are
|
|
|
|
* located here.
|
|
|
|
*/
|
|
|
|
#define EM_NVM_PCIE_CTRL 0x1B
|
|
|
|
#define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT)
|
|
|
|
#define EM_NVM_MSIX_N_SHIFT 7
|
This delta has a few important items:
PR 122839 is fixed in both em and in igb
Second, the issue on building modules since the static kernel
build changes is now resolved. I was not able to get the fancier
directory hierarchy working, but this works, both em and igb
build as modules now.
Third, there is now support in em for two new NICs, Hartwell
(or 82574) is a low cost PCIE dual port adapter that has MSIX,
for this release it uses 3 vectors only, RX, TX, and LINK. In
the next release I will add a second TX and RX queue. Also, there
is support here for ICH10, the followon to ICH9. Both of these are
early releases, general availability will follow soon.
Fourth: On Hartwell and ICH10 we now have IEEE 1588 PTP support,
I have implemented this in a provisional way so that early adopters
may try and comment on the functionality. The IOCTL structure may
change. This feature is off by default, you need to edit the Makefile
and add the EM_TIMESYNC define to get the code.
Enjoy all!!
2008-04-25 21:19:41 +00:00
|
|
|
|
2009-06-24 17:41:29 +00:00
|
|
|
struct adapter;
|
|
|
|
|
|
|
|
struct em_int_delay_info {
|
|
|
|
struct adapter *adapter; /* Back-pointer to the adapter struct */
|
|
|
|
int offset; /* Register offset to read/write */
|
|
|
|
int value; /* Current value in usecs */
|
|
|
|
};
|
|
|
|
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
/*
|
|
|
|
* The transmit ring, one per tx queue
|
|
|
|
*/
|
|
|
|
struct tx_ring {
|
|
|
|
struct adapter *adapter;
|
|
|
|
struct e1000_tx_desc *tx_base;
|
2017-01-10 03:23:22 +00:00
|
|
|
uint64_t tx_paddr;
|
2017-03-13 22:53:06 +00:00
|
|
|
qidx_t *tx_rsq;
|
|
|
|
bool tx_tso; /* last tx was tso */
|
|
|
|
uint8_t me;
|
|
|
|
qidx_t tx_rs_cidx;
|
|
|
|
qidx_t tx_rs_pidx;
|
|
|
|
qidx_t tx_cidx_processed;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
/* Interrupt resources */
|
|
|
|
void *tag;
|
|
|
|
struct resource *res;
|
2010-03-30 17:05:24 +00:00
|
|
|
unsigned long tx_irq;
|
2017-01-10 03:23:22 +00:00
|
|
|
|
|
|
|
/* Saved csum offloading context information */
|
|
|
|
int csum_flags;
|
|
|
|
int csum_lhlen;
|
|
|
|
int csum_iphlen;
|
|
|
|
|
|
|
|
int csum_thlen;
|
|
|
|
int csum_mss;
|
|
|
|
int csum_pktlen;
|
|
|
|
|
|
|
|
uint32_t csum_txd_upper;
|
|
|
|
uint32_t csum_txd_lower; /* last field */
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The Receive ring, one per rx queue
|
|
|
|
*/
|
|
|
|
struct rx_ring {
|
|
|
|
struct adapter *adapter;
|
2017-01-10 03:23:22 +00:00
|
|
|
struct em_rx_queue *que;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
u32 me;
|
|
|
|
u32 payload;
|
2016-01-07 16:42:48 +00:00
|
|
|
union e1000_rx_desc_extended *rx_base;
|
2017-01-10 03:23:22 +00:00
|
|
|
uint64_t rx_paddr;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
|
|
|
|
/* Interrupt resources */
|
|
|
|
void *tag;
|
|
|
|
struct resource *res;
|
2010-09-07 20:13:08 +00:00
|
|
|
bool discard;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
|
|
|
|
/* Soft stats */
|
2010-03-30 17:05:24 +00:00
|
|
|
unsigned long rx_irq;
|
2010-09-07 20:13:08 +00:00
|
|
|
unsigned long rx_discarded;
|
2010-03-30 17:05:24 +00:00
|
|
|
unsigned long rx_packets;
|
|
|
|
unsigned long rx_bytes;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
};
|
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
struct em_tx_queue {
|
|
|
|
struct adapter *adapter;
|
|
|
|
u32 msix;
|
|
|
|
u32 eims; /* This queue's EIMS bit */
|
|
|
|
u32 me;
|
|
|
|
struct tx_ring txr;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct em_rx_queue {
|
|
|
|
struct adapter *adapter;
|
|
|
|
u32 me;
|
|
|
|
u32 msix;
|
|
|
|
u32 eims;
|
|
|
|
struct rx_ring rxr;
|
|
|
|
u64 irqs;
|
2017-09-16 02:41:38 +00:00
|
|
|
struct if_irq que_irq;
|
2017-01-10 03:23:22 +00:00
|
|
|
};
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
|
2010-01-27 17:35:58 +00:00
|
|
|
/* Our adapter structure */
|
2010-01-26 22:32:22 +00:00
|
|
|
struct adapter {
|
2017-01-10 03:23:22 +00:00
|
|
|
struct ifnet *ifp;
|
2007-05-04 00:00:12 +00:00
|
|
|
struct e1000_hw hw;
|
2002-06-03 22:30:51 +00:00
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
if_softc_ctx_t shared;
|
|
|
|
if_ctx_t ctx;
|
|
|
|
#define tx_num_queues shared->isc_ntxqsets
|
|
|
|
#define rx_num_queues shared->isc_nrxqsets
|
|
|
|
#define intr_type shared->isc_intr
|
2010-01-27 17:35:58 +00:00
|
|
|
/* FreeBSD operating-system-specific structures. */
|
2007-05-04 00:00:12 +00:00
|
|
|
struct e1000_osdep osdep;
|
2017-01-18 14:23:43 +00:00
|
|
|
device_t dev;
|
2010-03-31 20:43:24 +00:00
|
|
|
struct cdev *led_dev;
|
2008-02-29 21:50:11 +00:00
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
struct em_tx_queue *tx_queues;
|
|
|
|
struct em_rx_queue *rx_queues;
|
|
|
|
struct if_irq irq;
|
|
|
|
|
2010-01-27 17:35:58 +00:00
|
|
|
struct resource *memory;
|
|
|
|
struct resource *flash;
|
2017-01-10 03:23:22 +00:00
|
|
|
struct resource *ioport;
|
2010-01-27 17:35:58 +00:00
|
|
|
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
struct resource *res;
|
|
|
|
void *tag;
|
|
|
|
u32 linkvec;
|
|
|
|
u32 ivars;
|
2008-02-29 21:50:11 +00:00
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
struct ifmedia *media;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
int msix;
|
2006-07-20 04:18:45 +00:00
|
|
|
int if_flags;
|
2004-11-12 11:03:07 +00:00
|
|
|
int em_insert_vlan_header;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
u32 ims;
|
|
|
|
bool in_detach;
|
2010-01-27 17:35:58 +00:00
|
|
|
|
2017-07-19 22:41:22 +00:00
|
|
|
u32 flags;
|
2010-01-27 17:35:58 +00:00
|
|
|
/* Task for FAST handling */
|
2017-01-10 03:23:22 +00:00
|
|
|
struct grouptask link_task;
|
|
|
|
|
|
|
|
u16 num_vlans;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
u32 txd_cmd;
|
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
u32 tx_process_limit;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
u32 rx_process_limit;
|
2010-10-26 00:07:58 +00:00
|
|
|
u32 rx_mbuf_sz;
|
2008-11-26 23:57:23 +00:00
|
|
|
|
2007-05-04 00:00:12 +00:00
|
|
|
/* Management and WOL features */
|
2010-01-27 17:35:58 +00:00
|
|
|
u32 wol;
|
|
|
|
bool has_manage;
|
|
|
|
bool has_amt;
|
2006-10-28 08:11:07 +00:00
|
|
|
|
2010-08-28 00:34:22 +00:00
|
|
|
/* Multicast array memory */
|
|
|
|
u8 *mta;
|
2010-09-07 20:13:08 +00:00
|
|
|
|
2010-10-26 00:07:58 +00:00
|
|
|
/*
|
|
|
|
** Shadow VFTA table, this is needed because
|
|
|
|
** the real vlan filter table gets cleared during
|
|
|
|
** a soft reset and the driver needs to be able
|
|
|
|
** to repopulate it.
|
|
|
|
*/
|
|
|
|
u32 shadow_vfta[EM_VFTA_SIZE];
|
|
|
|
|
|
|
|
/* Info about the interface */
|
2011-12-10 07:08:52 +00:00
|
|
|
u16 link_active;
|
|
|
|
u16 fc;
|
2010-10-26 00:07:58 +00:00
|
|
|
u16 link_speed;
|
|
|
|
u16 link_duplex;
|
|
|
|
u32 smartspeed;
|
2017-01-10 03:23:22 +00:00
|
|
|
u32 dmac;
|
|
|
|
int link_mask;
|
2010-10-26 00:07:58 +00:00
|
|
|
|
2017-01-10 03:23:22 +00:00
|
|
|
u64 que_mask;
|
|
|
|
|
2010-01-27 17:35:58 +00:00
|
|
|
struct em_int_delay_info tx_int_delay;
|
|
|
|
struct em_int_delay_info tx_abs_int_delay;
|
|
|
|
struct em_int_delay_info rx_int_delay;
|
|
|
|
struct em_int_delay_info rx_abs_int_delay;
|
2013-05-09 17:07:30 +00:00
|
|
|
struct em_int_delay_info tx_itr;
|
2002-06-03 22:30:51 +00:00
|
|
|
|
|
|
|
/* Misc stats maintained by the driver */
|
2007-05-04 00:00:12 +00:00
|
|
|
unsigned long dropped_pkts;
|
2016-01-13 21:47:27 +00:00
|
|
|
unsigned long link_irq;
|
2005-11-09 15:23:54 +00:00
|
|
|
unsigned long rx_overruns;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
unsigned long watchdog_events;
|
2004-09-01 23:22:41 +00:00
|
|
|
|
2007-05-04 00:00:12 +00:00
|
|
|
struct e1000_hw_stats stats;
|
2017-07-19 22:41:22 +00:00
|
|
|
u16 vf_ifp;
|
2001-12-02 07:37:17 +00:00
|
|
|
};
|
|
|
|
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
/********************************************************************************
|
2006-10-28 08:11:07 +00:00
|
|
|
* vendor_info_array
|
|
|
|
*
|
|
|
|
* This array contains the list of Subvendor/Subdevice IDs on which the driver
|
|
|
|
* should load.
|
|
|
|
*
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
********************************************************************************/
|
2006-10-28 08:11:07 +00:00
|
|
|
typedef struct _em_vendor_info_t {
|
|
|
|
unsigned int vendor_id;
|
|
|
|
unsigned int device_id;
|
|
|
|
unsigned int subvendor_id;
|
|
|
|
unsigned int subdevice_id;
|
|
|
|
unsigned int index;
|
|
|
|
} em_vendor_info_t;
|
|
|
|
|
2017-03-13 22:53:06 +00:00
|
|
|
void em_dump_rs(struct adapter *);
|
2011-04-01 18:48:31 +00:00
|
|
|
|
2016-01-07 16:42:48 +00:00
|
|
|
#define EM_RSSRK_SIZE 4
|
|
|
|
#define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \
|
|
|
|
key[(i) * EM_RSSRK_SIZE + 1] << 8 | \
|
|
|
|
key[(i) * EM_RSSRK_SIZE + 2] << 16 | \
|
|
|
|
key[(i) * EM_RSSRK_SIZE + 3] << 24)
|
2006-02-15 08:39:50 +00:00
|
|
|
#endif /* _EM_H_DEFINED_ */
|