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freebsd-nq/sys/i386/include/smp.h

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Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/*
* ----------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
* ----------------------------------------------------------------------------
*
$Id$ -> $FreeBSD$
1999-08-28 01:08:13 +00:00
* $FreeBSD$
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
*
*/
#ifndef _MACHINE_SMP_H_
#define _MACHINE_SMP_H_
Change #ifdef KERNEL to #ifdef _KERNEL in the public headers. "KERNEL" is an application space macro and the applications are supposed to be free to use it as they please (but cannot). This is consistant with the other BSD's who made this change quite some time ago. More commits to come.
1999-12-29 04:46:21 +00:00
#ifdef _KERNEL
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
Make LINT compile.
2000-09-16 18:55:05 +00:00
#if defined(SMP) && defined(I386_CPU) && !defined(COMPILING_LINT)
Major update to the way synchronization is done in the kernel. Highlights include: * Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The alpha port is still in transition and currently uses both.) * Per-CPU idle processes. * Interrupts are run in their own separate kernel threads and can be preempted (i386 only). Partially contributed by: BSDi (BSD/OS) Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
2000-09-07 01:33:02 +00:00
#error SMP not supported with I386_CPU
#endif
Force user to config SMP kernel with "options APIC_IO". Reviewed by: Peter Wemm <peter@spinner.DIALix.COM>
1997-05-06 21:29:57 +00:00
#if defined(SMP) && !defined(APIC_IO)
# error APIC_IO required for SMP, add "options APIC_IO" to your config file.
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
#endif /* SMP && !APIC_IO */
Force user to config SMP kernel with "options APIC_IO". Reviewed by: Peter Wemm <peter@spinner.DIALix.COM>
1997-05-06 21:29:57 +00:00
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
#if defined(SMP) || defined(APIC_IO)
Modified the PEND_INTS algorithm to fix the ISA INT loss problem. Noticed by: dave adkins <adkin003@gold.tc.umn.edu> and others.
1997-07-28 03:59:54 +00:00
#ifndef LOCORE
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
/*
* For sending values to POST displays.
Additional debugging functions and macros. "spurious INTerrupt" support.
1997-07-06 23:40:15 +00:00
* XXX FIXME: where does this really belong, isa.h/isa.c perhaps?
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
*/
Additional debugging functions and macros. "spurious INTerrupt" support.
1997-07-06 23:40:15 +00:00
extern int current_postcode; /** XXX currently in mp_machdep.c */
#define POSTCODE(X) current_postcode = (X), \
outb(0x80, current_postcode)
#define POSTCODE_LO(X) current_postcode &= 0xf0, \
current_postcode |= ((X) & 0x0f), \
outb(0x80, current_postcode)
#define POSTCODE_HI(X) current_postcode &= 0x0f, \
current_postcode |= (((X) << 4) & 0xf0), \
outb(0x80, current_postcode)
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
apic.h now has structure definitions for both the local APIC and io APIC. apic.h has defines like: #define lapic__id lapic->id Once private pages and "known virtual addr" mapping of the APICs is ready all 'lapic__XXX' will be changed to 'lapic.XXX', and the defines will be removed. Changes to smp.h for lapic_t lapic && ioapic_t ioapic pointers, currently equal to apic_base && io_apic_base, will stand alone with the private page mapping.
1997-05-29 05:57:43 +00:00
#include <machine/apic.h>
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* global data in mpboot.s */
extern int bootMP_size;
/* functions in mpboot.s */
void bootMP __P((void));
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
/* global data in apic_vector.s */
extern volatile u_int stopped_cpus;
extern volatile u_int started_cpus;
Declare some variables modified by interrupt handlers as volatile.
1998-04-01 20:38:28 +00:00
extern volatile u_int checkstate_probed_cpus;
extern volatile u_int checkstate_need_ast;
Add forwarding of roundrobin to other cpus. This gives a more regular update of cpu usage as shown by top when one process is cpu bound (no system calls) while the system is otherwise idle (except for top). Don't attempt to switch to the BSP in boot(). If the system was idle when an interrupt caused a panic, this won't work. Instead, switch to the BSP in cpu_reset. Remove some spurious forward_statclock/forward_hardclock warnings.
1998-05-17 22:12:14 +00:00
extern volatile u_int resched_cpus;
extern void (*cpustop_restartfunc) __P((void));
The improvements to clock statistics by Tor Egge Wrappered and enabled by the define BETTER_CLOCK (on by default in smpyests.h) Reviewed by: smp@csn.net Submitted by: Tor Egge <Tor.Egge@idi.ntnu.no>
1997-12-08 23:00:24 +00:00
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* global data in mp_machdep.c */
A clean fix for the spl "deadlock before smp_active" problem. Added a new variable, 'bsp_apic_ready', which is set as soon as the bootstrap CPU has initialized its local APIC. Conditionalize the GENSPLR functions to call ss_lock ONLY after bsp_apic_ready is TRUE; This should prevent any problems with races between the time the 1st AP becomes ready and the time smp_active is set.
1997-08-24 20:33:32 +00:00
extern int bsp_apic_ready;
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
extern int mp_ncpus;
extern int mp_naps;
extern int mp_nbusses;
extern int mp_napics;
extern int mp_picmode;
extern int boot_cpu_id;
extern vm_offset_t cpu_apic_address;
extern vm_offset_t io_apic_address[];
extern u_int32_t cpu_apic_versions[];
Remove the NCPU, NAPIC, NBUS, NINTR config options. Make NAPIC, NBUS, NINTR dynamic and set NCPU to a maximum of 16 under SMP. Reviewed by: peter
2000-09-22 23:40:10 +00:00
extern u_int32_t *io_apic_versions;
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
extern int cpu_num_to_apic_id[];
extern int io_num_to_apic_id[];
extern int apic_id_to_logical[];
Cleanup some leftover lint from the old interrupt system. Also, while here, run up to 32 interrupt sources on APIC systems. Normalize INTREN/INTRDIS so they are the same on both UP and SMP systems rather than sometimes a macro, and sometimes a function. Reviewed by: jhb, jakeb
2000-12-04 21:15:14 +00:00
#define APIC_INTMAPSIZE 32
Maintain a mapping from irq number to (ioapic number, int pin) tuple, and use this when masking/unmasking interrupts. Maintain a mapping from (iopaic number, int pin) tuple to irq number, and use this when configuring devices and programming the ioapics. Previous code assumed that irq number was equal to int pin number, and that the ioapic number was 0. Don't let an AP enter _cpu_switch before all local apics are initialized.
1998-09-06 22:41:42 +00:00
struct apic_intmapinfo {
int ioapic;
int int_pin;
volatile void *apic_address;
int redirindex;
};
extern struct apic_intmapinfo int_to_apicintpin[];
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
extern u_int all_cpus;
Add forwarding of roundrobin to other cpus. This gives a more regular update of cpu usage as shown by top when one process is cpu bound (no system calls) while the system is otherwise idle (except for top). Don't attempt to switch to the BSP in boot(). If the system was idle when an interrupt caused a panic, this won't work. Instead, switch to the BSP in cpu_reset. Remove some spurious forward_statclock/forward_hardclock warnings.
1998-05-17 22:12:14 +00:00
extern struct pcb stoppcbs[];
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* functions in mp_machdep.c */
u_int mp_bootaddress __P((u_int));
Add declaration of mp_probe(). This is now called directly from machdep.c.
1997-05-28 18:44:11 +00:00
int mp_probe __P((void));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
void mp_start __P((void));
void mp_announce __P((void));
Modified to declare merged/renamed functions: - get_isa_apic_mask() -> isa_apic_mask() - get_isa_apic_irq() && get_eisa_apic_irq() -> isa_apic_pin() - get_pci_apic_irq() -> pci_apic_pin()
1997-06-25 20:59:15 +00:00
u_int isa_apic_mask __P((u_int));
Maintain a mapping from irq number to (ioapic number, int pin) tuple, and use this when masking/unmasking interrupts. Maintain a mapping from (iopaic number, int pin) tuple to irq number, and use this when configuring devices and programming the ioapics. Previous code assumed that irq number was equal to int pin number, and that the ioapic number was 0. Don't let an AP enter _cpu_switch before all local apics are initialized.
1998-09-06 22:41:42 +00:00
int isa_apic_irq __P((int));
int pci_apic_irq __P((int, int, int));
int apic_irq __P((int, int));
int next_apic_irq __P((int));
Code to handle SMP/APIC_IO mapping of ISA INTs to APIC pins above IRQ15. - doesn't break my system. - NOT yet verified on the affected motherboard. Submitted by: "John S. Dyson" <toor@dyson.iquest.net>
1997-05-05 22:56:37 +00:00
int undirect_isa_irq __P((int));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
int undirect_pci_irq __P((int));
int apic_bus_type __P((int));
int apic_src_bus_id __P((int, int));
int apic_src_bus_irq __P((int, int));
int apic_int_type __P((int, int));
int apic_trigger __P((int, int));
int apic_polarity __P((int, int));
ISA device drivers use the ISA source interrupt number in locations where the low level interrupt handler number should be used. Change setup_apic_irq_mapping() to allocate low level interrupt handler X (Xintr${X}) for any ISA interrupt X mentioned in the MP table. Remove an assumption in the driver for the system clock (clock.c) that interrupts mentioned in the MP table as delivered to IOAPIC #0 intpin Y is handled by low level interrupt handler Y (Xintr${Y}) but don't assume that low level interrupt handler 0 (Xintr0) is used. Don't allocate two low level interrupt handlers for the system clock. Reviewed by: NOKUBI Hirotaka <hnokubi@yyy.or.jp>
2000-01-04 22:24:59 +00:00
void assign_apic_irq __P((int apic, int intpin, int irq));
void revoke_apic_irq __P((int irq));
General cleanup of APIC code. stop_cpus/restart_cpus STILL not working!
1997-07-08 23:32:58 +00:00
void bsp_apic_configure __P((void));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
void init_secondary __P((void));
void smp_invltlb __P((void));
Preliminaries for stop_cpus()/restart_cpus(). Both are turned off by default. Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
int stop_cpus __P((u_int));
int restart_cpus __P((u_int));
forward_statclock and forward_hardclock are located in mp_machdep.c.
1998-03-03 19:44:34 +00:00
#ifdef BETTER_CLOCK
void forward_statclock __P((int pscnt));
void forward_hardclock __P((int pscnt));
#endif /* BETTER_CLOCK */
Forward the signal if the process runs on a different CPU. This reduces the signal handling latency for cpu-bound processes that performs very few system calls. The IPI for forcing an additional software trap is no longer dependent upon BETTER_CLOCK being defined.
1998-03-03 20:55:26 +00:00
void forward_signal __P((struct proc *));
Add forwarding of roundrobin to other cpus. This gives a more regular update of cpu usage as shown by top when one process is cpu bound (no system calls) while the system is otherwise idle (except for top). Don't attempt to switch to the BSP in boot(). If the system was idle when an interrupt caused a panic, this won't work. Instead, switch to the BSP in cpu_reset. Remove some spurious forward_statclock/forward_hardclock warnings.
1998-05-17 22:12:14 +00:00
void forward_roundrobin __P((void));
When entering the apic version of slow interrupt handler, level interrupts are masked, and EOI is sent iff the corresponding ISR bit is set in the local apic. If the CPU cannot obtain the interrupt service lock (currently the global kernel lock) the interrupt is forwarded to the CPU holding that lock. Clock interrupts now have higher priority than other slow interrupts.
1998-03-03 22:56:30 +00:00
#ifdef APIC_INTR_REORDER
void set_lapic_isrloc __P((int, int));
#endif /* APIC_INTR_REORDER */
Implement an all-CPU shootdown-style rendezvous facility. This allows the caller to specify a function to be guarded between an entry and exit barrier, as well as pre- and post-barrier functions. The primary use for this function is synchronised update of per-cpu private data. The implementation is almost (but not quite) MI; with a better mechanism for masking per-CPU interrupts it could probably be hoisted. Reviewed by: peter (partially)
1999-07-20 06:52:35 +00:00
void smp_rendezvous_action __P((void));
void smp_rendezvous __P((void (*)(void *),
void (*)(void *),
void (*)(void *),
void *arg));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* global data in mpapic.c */
Preliminary support for per-cpu data pages. This eliminates a lot of #ifdef SMP type code. Things like _curproc reside in a data page that is unique on each cpu, eliminating the expensive macros like: #define curproc (SMPcurproc[cpunumber()]) There are some unresolved bootstrap and address space sharing issues at present, but Steve is waiting on this for other work. There is still some strictly temporary code present that isn't exactly pretty. This is part of a larger change that has run into some bumps, this part is standalone so it should be safe. The temporary code goes away when the full idle cpu support is finished. Reviewed by: fsmp, dyson
1997-06-22 16:04:22 +00:00
extern volatile lapic_t lapic;
Remove the NCPU, NAPIC, NBUS, NINTR config options. Make NAPIC, NBUS, NINTR dynamic and set NCPU to a maximum of 16 under SMP. Reviewed by: peter
2000-09-22 23:40:10 +00:00
extern volatile ioapic_t **ioapic;
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* functions in mpapic.c */
Pass string arg to apic_dump.
1997-07-20 18:02:19 +00:00
void apic_dump __P((char*));
General cleanup of APIC code. stop_cpus/restart_cpus STILL not working!
1997-07-08 23:32:58 +00:00
void apic_initialize __P((void));
Last commit didn't take, operator error???
1997-07-22 20:12:32 +00:00
void imen_dump __P((void));
cleaned up FAST_IPI code. - one-liners all become inline. - multi-liners become functions. - FAST_IPI defines go away. re-worked APICIPI_BANDAID code. - now refered to as DETECT_DEADLOCK. - on by default.
1997-05-01 19:33:12 +00:00
int apic_ipi __P((int, int, int));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
int selected_apic_ipi __P((u_int, int, int));
int io_apic_setup __P((int));
Further fixes for multiple-IO-APIC systems from Tor Egge: Further experimentation showed that some Dell 2450 machines with the prevention kludge installed still got T_RESERVED traps. CPU interrupt vector 0x7A was observed to be triggered. This might have been the bitwise OR of two different vectors sent from each of the IOAPICs at the same time. IOAPIC #0: 0x68 --> irq 8: RTC timer interrupt IOAPIC #1: 0x32 --> irq 18: scsi host adapter or network interface ---- 0x7a --> T_RESERVED Both IOAPICs had ID 0. Appendix B.3 in the MP spec indicates that the operating system is responsible for assigning unique IDs to the IOAPICs. The enclosed patch programs the IOAPIC IDs according to the IOAPIC entries in the MP table. Submitted by: tegge
2000-05-31 21:37:28 +00:00
void io_apic_set_id __P((int, int));
Be more verbose when changing APIC ID on an IO APIC. Don't allow cpu entries in the MP table to contain APIC IDs out of range. Don't write outside array boundaries if an IO APIC entry in the MP table contains an APIC ID out of range. Assign APIC IDs for all IO APICs according to section 3.6.6 in the Intel MP spec: - If the current APIC ID on an IO APIC doesn't conflict with other IO APICs or CPUs, that APIC ID should be used. The copy of the MP table must be updated if the corresponding APIC ID in the MP table is different. - If the current APIC ID was in conflict with other units, the corresponding APIC ID specified in the MP table is checked for conflict. - If a conflict is still found then fall back to using a new unique ID. The copy of the MP table must be updated. - IDs out of range is considered to be in conflict. During these operations, the IO_TO_ID array cannot be used, since any conflict would have caused information loss. The array is then corrected, since all APIC ID conflicts should have been resolved. PR: 20312, 18919
2000-08-06 00:04:03 +00:00
int io_apic_get_id __P((int));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
int ext_int_setup __P((int, int));
void set_apic_timer __P((int));
int read_apic_timer __P((void));
void u_sleep __P((int));
Move io_apic_{read,write} from apic_ipl.s (where they do not belong) into mpapic.c. This gives us the benefit of C type checking. These functions are not called in any critical paths and are not used by the interrupt routines.
2000-12-06 01:04:02 +00:00
u_int io_apic_read __P((int, int));
void io_apic_write __P((int, int, u_int));
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* global data in init_smp.c */
remove all the SMP_INVLTLB defines, making the code default for APIC_IO. Reviewed by: informal discussion with Peter Wemm <peter@spinner.DIALix.COM>
1997-04-28 00:25:00 +00:00
extern int invltlb_ok;
The promised "better fix" for "Trap 9 When Boot SMP" problem. We now tsleep() in kthread_init() between start_init() and prepare_usermode() while waiting for ALL the idle_loop() processes to come online. Debugged & tested by: "Thomas D. Dean" <tomdean@ix.netcom.com> Reviewed by: David Greenman <dg@root.com>
1997-08-15 02:34:32 +00:00
extern int smp_active;
Fix from Tor so that if we enter the debugger in the tristate going to SMP (other CPUs stopped but SMP mode not really started). Obtained from:Tor.Egge@fast.no
1999-09-25 18:36:31 +00:00
extern int smp_started;
The promised "better fix" for "Trap 9 When Boot SMP" problem. We now tsleep() in kthread_init() between start_init() and prepare_usermode() while waiting for ALL the idle_loop() processes to come online. Debugged & tested by: "Thomas D. Dean" <tomdean@ix.netcom.com> Reviewed by: David Greenman <dg@root.com>
1997-08-15 02:34:32 +00:00
extern volatile int smp_idle_loops;
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
Modified the PEND_INTS algorithm to fix the ISA INT loss problem. Noticed by: dave adkins <adkin003@gold.tc.umn.edu> and others.
1997-07-28 03:59:54 +00:00
#endif /* !LOCORE */
Major update to the way synchronization is done in the kernel. Highlights include: * Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The alpha port is still in transition and currently uses both.) * Per-CPU idle processes. * Interrupts are run in their own separate kernel threads and can be preempted (i386 only). Partially contributed by: BSDi (BSD/OS) Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
2000-09-07 01:33:02 +00:00
#endif /* SMP && !APIC_IO */
The SMP cleanup commit broke UP compiles. Make UP compiles work again.
2000-03-28 18:06:49 +00:00
Change #ifdef KERNEL to #ifdef _KERNEL in the public headers. "KERNEL" is an application space macro and the applications are supposed to be free to use it as they please (but cannot). This is consistant with the other BSD's who made this change quite some time ago. More commits to come.
1999-12-29 04:46:21 +00:00
#endif /* _KERNEL */
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
#endif /* _MACHINE_SMP_H_ */
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