Convert to ANSI C function declarations.
MFC after: 1 week
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@ -159,8 +159,7 @@ static struct epic_type epic_devs[] = {
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};
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static int
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epic_probe(dev)
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device_t dev;
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epic_probe(device_t dev)
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{
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struct epic_type *t;
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@ -175,8 +174,7 @@ epic_probe(dev)
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}
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static struct epic_type *
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epic_devtype(dev)
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device_t dev;
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epic_devtype(device_t dev)
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{
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struct epic_type *t;
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@ -218,8 +216,7 @@ epic_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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* Reset to known state.
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*/
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static int
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epic_attach(dev)
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device_t dev;
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epic_attach(device_t dev)
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{
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struct ifnet *ifp;
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epic_softc_t *sc;
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@ -482,8 +479,7 @@ epic_release(epic_softc_t *sc)
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* Detach driver and free resources.
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*/
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static int
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epic_detach(dev)
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device_t dev;
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epic_detach(device_t dev)
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{
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struct ifnet *ifp;
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epic_softc_t *sc;
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@ -515,8 +511,7 @@ epic_detach(dev)
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* get confused by errant DMAs when rebooting.
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*/
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static void
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epic_shutdown(dev)
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device_t dev;
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epic_shutdown(device_t dev)
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{
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epic_softc_t *sc;
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@ -529,10 +524,7 @@ epic_shutdown(dev)
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* This is if_ioctl handler.
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*/
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static int
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epic_ifioctl(ifp, command, data)
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struct ifnet *ifp;
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u_long command;
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caddr_t data;
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epic_ifioctl(struct ifnet *ifp, u_long command, caddr_t data)
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{
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epic_softc_t *sc = ifp->if_softc;
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struct mii_data *mii;
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@ -645,8 +637,7 @@ epic_dma_map_rxbuf(void *arg, bus_dma_segment_t *segs, int nseg,
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* or queue become empty.
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*/
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static void
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epic_ifstart(ifp)
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struct ifnet * ifp;
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epic_ifstart(struct ifnet * ifp)
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{
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epic_softc_t *sc = ifp->if_softc;
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struct epic_tx_buffer *buf;
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@ -725,8 +716,7 @@ epic_ifstart(ifp)
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* Synopsis: Finish all received frames.
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*/
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static void
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epic_rx_done(sc)
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epic_softc_t *sc;
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epic_rx_done(epic_softc_t *sc)
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{
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struct ifnet *ifp = sc->ifp;
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u_int16_t len;
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@ -809,8 +799,7 @@ epic_rx_done(sc)
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* are pending or descriptor is not transmitted yet.
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*/
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static void
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epic_tx_done(sc)
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epic_softc_t *sc;
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epic_tx_done(epic_softc_t *sc)
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{
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struct epic_tx_buffer *buf;
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struct epic_tx_desc *desc;
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@ -860,8 +849,7 @@ epic_tx_done(sc)
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* Interrupt function
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*/
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static void
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epic_intr(arg)
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void *arg;
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epic_intr(void *arg)
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{
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epic_softc_t *sc;
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int status, i;
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@ -932,8 +920,7 @@ epic_intr(arg)
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* and restart the transmitter.
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*/
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static void
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epic_tx_underrun(sc)
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epic_softc_t *sc;
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epic_tx_underrun(epic_softc_t *sc)
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{
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if (sc->tx_threshold > TRANSMIT_THRESHOLD_MAX) {
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sc->txcon &= ~TXCON_EARLY_TRANSMIT_ENABLE;
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@ -964,8 +951,7 @@ epic_tx_underrun(sc)
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* if success continue to work.
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*/
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static void
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epic_ifwatchdog(ifp)
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struct ifnet *ifp;
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epic_ifwatchdog(struct ifnet *ifp)
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{
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epic_softc_t *sc;
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int x;
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@ -1020,8 +1006,7 @@ epic_stats_update(epic_softc_t * sc)
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* Set media options.
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*/
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static int
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epic_ifmedia_upd(ifp)
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struct ifnet *ifp;
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epic_ifmedia_upd(struct ifnet *ifp)
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{
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epic_softc_t *sc;
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struct mii_data *mii;
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@ -1147,9 +1132,7 @@ epic_ifmedia_upd(ifp)
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* Report current media status.
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*/
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static void
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epic_ifmedia_sts(ifp, ifmr)
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struct ifnet *ifp;
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struct ifmediareq *ifmr;
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epic_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
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{
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epic_softc_t *sc;
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struct mii_data *mii;
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@ -1179,8 +1162,7 @@ epic_ifmedia_sts(ifp, ifmr)
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* Callback routine, called on media change.
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*/
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static void
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epic_miibus_statchg(dev)
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device_t dev;
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epic_miibus_statchg(device_t dev)
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{
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epic_softc_t *sc;
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struct mii_data *mii;
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@ -1223,8 +1205,7 @@ epic_miibus_statchg(dev)
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}
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static void
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epic_miibus_mediainit(dev)
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device_t dev;
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epic_miibus_mediainit(device_t dev)
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{
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epic_softc_t *sc;
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struct mii_data *mii;
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@ -1256,8 +1237,7 @@ epic_miibus_mediainit(dev)
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* Reset chip and update media.
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*/
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static void
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epic_init(xsc)
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void *xsc;
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epic_init(void *xsc)
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{
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epic_softc_t *sc = xsc;
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struct ifnet *ifp = sc->ifp;
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@ -1345,8 +1325,7 @@ epic_init(xsc)
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* access RXCON.
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*/
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static void
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epic_set_rx_mode(sc)
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epic_softc_t *sc;
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epic_set_rx_mode(epic_softc_t *sc)
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{
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u_int32_t flags;
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u_int32_t rxcon;
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@ -1368,8 +1347,7 @@ epic_set_rx_mode(sc)
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* access TXCON.
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*/
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static void
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epic_set_tx_mode(sc)
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epic_softc_t *sc;
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epic_set_tx_mode(epic_softc_t *sc)
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{
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if (sc->txcon & TXCON_EARLY_TRANSMIT_ENABLE)
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@ -1386,8 +1364,7 @@ epic_set_tx_mode(sc)
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* Note: EPIC must be in idle state.
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*/
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static void
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epic_set_mc_table(sc)
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epic_softc_t *sc;
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epic_set_mc_table(epic_softc_t *sc)
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{
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struct ifnet *ifp;
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struct ifmultiaddr *ifma;
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@ -1433,8 +1410,7 @@ epic_set_mc_table(sc)
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* Synopsis: Start receive process and transmit one, if they need.
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*/
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static void
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epic_start_activity(sc)
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epic_softc_t *sc;
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epic_start_activity(epic_softc_t *sc)
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{
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/* Start rx process. */
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@ -1447,8 +1423,7 @@ epic_start_activity(sc)
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* packet needs to be queued to stop Tx DMA.
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*/
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static void
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epic_stop_activity(sc)
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epic_softc_t *sc;
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epic_stop_activity(epic_softc_t *sc)
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{
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int status, i;
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@ -1493,8 +1468,7 @@ epic_stop_activity(sc)
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* XXX the packet will then be actually sent over network...
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*/
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static int
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epic_queue_last_packet(sc)
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epic_softc_t *sc;
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epic_queue_last_packet(epic_softc_t *sc)
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{
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struct epic_tx_desc *desc;
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struct epic_frag_list *flist;
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@ -1563,8 +1537,7 @@ epic_queue_last_packet(sc)
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* Synopsis: Shut down board and deallocates rings.
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*/
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static void
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epic_stop(sc)
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epic_softc_t *sc;
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epic_stop(epic_softc_t *sc)
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{
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int s;
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@ -1598,8 +1571,7 @@ epic_stop(sc)
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* Synopsis: This function should free all memory allocated for rings.
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*/
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static void
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epic_free_rings(sc)
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epic_softc_t *sc;
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epic_free_rings(epic_softc_t *sc)
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{
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int i;
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@ -1645,8 +1617,7 @@ epic_free_rings(sc)
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* are bounded and aligned properly.
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*/
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static int
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epic_init_rings(sc)
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epic_softc_t *sc;
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epic_init_rings(epic_softc_t *sc)
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{
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int error, i;
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@ -1744,9 +1715,7 @@ epic_init_rings(sc)
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* EEPROM operation functions
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*/
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static void
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epic_write_eepromreg(sc, val)
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epic_softc_t *sc;
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u_int8_t val;
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epic_write_eepromreg(epic_softc_t *sc, u_int8_t val)
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{
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u_int16_t i;
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@ -1759,17 +1728,14 @@ epic_write_eepromreg(sc, val)
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}
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static u_int8_t
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epic_read_eepromreg(sc)
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epic_softc_t *sc;
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epic_read_eepromreg(epic_softc_t *sc)
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{
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return (CSR_READ_1(sc, EECTL));
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}
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static u_int8_t
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epic_eeprom_clock(sc, val)
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epic_softc_t *sc;
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u_int8_t val;
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epic_eeprom_clock(epic_softc_t *sc, u_int8_t val)
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{
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epic_write_eepromreg(sc, val);
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@ -1780,9 +1746,7 @@ epic_eeprom_clock(sc, val)
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}
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static void
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epic_output_eepromw(sc, val)
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epic_softc_t *sc;
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u_int16_t val;
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epic_output_eepromw(epic_softc_t *sc, u_int16_t val)
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{
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int i;
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@ -1795,8 +1759,7 @@ epic_output_eepromw(sc, val)
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}
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static u_int16_t
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epic_input_eepromw(sc)
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epic_softc_t *sc;
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epic_input_eepromw(epic_softc_t *sc)
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{
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u_int16_t retval = 0;
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int i;
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@ -1810,9 +1773,7 @@ epic_input_eepromw(sc)
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}
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static int
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epic_read_eeprom(sc, loc)
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epic_softc_t *sc;
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u_int16_t loc;
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epic_read_eeprom(epic_softc_t *sc, u_int16_t loc)
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{
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u_int16_t dataval;
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u_int16_t read_cmd;
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@ -1837,9 +1798,7 @@ epic_read_eeprom(sc, loc)
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* Here goes MII read/write routines.
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*/
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static int
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epic_read_phy_reg(sc, phy, reg)
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epic_softc_t *sc;
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int phy, reg;
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epic_read_phy_reg(epic_softc_t *sc, int phy, int reg)
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{
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int i;
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@ -1855,9 +1814,7 @@ epic_read_phy_reg(sc, phy, reg)
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}
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static void
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epic_write_phy_reg(sc, phy, reg, val)
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epic_softc_t *sc;
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int phy, reg, val;
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epic_write_phy_reg(epic_softc_t *sc, int phy, int reg, int val)
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{
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int i;
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@ -1872,9 +1829,7 @@ epic_write_phy_reg(sc, phy, reg, val)
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}
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static int
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epic_miibus_readreg(dev, phy, reg)
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device_t dev;
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int phy, reg;
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epic_miibus_readreg(device_t dev, int phy, int reg)
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{
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epic_softc_t *sc;
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@ -1884,9 +1839,7 @@ epic_miibus_readreg(dev, phy, reg)
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}
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static int
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epic_miibus_writereg(dev, phy, reg, data)
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device_t dev;
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int phy, reg, data;
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epic_miibus_writereg(device_t dev, int phy, int reg, int data)
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{
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epic_softc_t *sc;
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