chip revision often found in the blades and resulting in interfaces
not sensing carrier signal. Looking at all problem reports it
appears that it only affects some very specific silicon revision
(ASIC (0x57081021); Rev (B2)) and version of the PHY that
supports 1000baseSX-FDX media only. Therefore, narrow the scope of
workaround to combination of that revision and media type. Given
that the first report on this issue is dated back to 2007, there is
not much hope that this issue will ever be properly resolved.
Among affected systems are IBM HS21, Intel SBXD132 and HP BL460c.
PR: 118238, 122551, 140970
MFC after: 1 month
88E1149 PHY. This will fix intermittent watchdog timeouts as well
as very slow network performance on 88E8072 Yukon Extreme.
PR: kern/144148
MFC after: 1 week
copper and fiber interfaces over GMII so an explicit check is
necessary to know whether it was configured for fiber interface.
This change make BCM5715S work.
Tested by: olli
MFC after: 1 week
Unlike most other PHYs there is no easy way to know which media
type the PHY supports on Marvell PHYs. MIIF_HAVEFIBER flags is now
passed via bus-specific instance variable of a device. While I'm
here add 88E1112 specific work around to set SIGDET polarity low.
Many thanks "Eugene Perevyazko <john <> dnepro dot net>" who kindly
gave remote access to system with DGE-560SX.
value instead of blindly resetting it to 0. However, it seems page
select bits of some 88E1116 PHY is initialized to invalid one such
that restoring page select bits after programming broke MII
register access. The correct solution would be reset page select
bits to 0 in PHY attach stage but it would require more testing.
Since we're in BETA stage such a change would be dangerous so just
back it out.
This change should fix nfe(4) breakage on NVIDIA MCP55.
Reported by: Ryan Rogers < webmaster <> doghouserepair dot com >
Sam Fourman Jr. < sfourman <> gmail dot com >
Tested by: Ryan Rogers < webmaster <> doghouserepair dot com >
Sam Fourman Jr. < sfourman <> gmail dot com >
Approved by: re (kib)
of the DP83861 and DP83891.
- Reset the PHY during attach so it's in a known state.
- Add a comment describing why we hardwire 10baseT support in
the BMSR.
- Always explicitly set IFM_HDX for half-duplex. [1]
Obtained from: OpenBSD [1]
MFC after: 2 weeks
FE+ controller. Due to the severe silicon bugs for Yukon FE+,
88E3016 seems to require more workarounds. However I'm not sure
whether the workaround is PHY specific or only applicable to Yukon
FE+. The datasheet for the PHY is publicly available but it lacks
several details for the workaround used in this change. The
workaround information was obtained from Linux. Many thanks to
Yukon FE+ users who helped me add 88E3016 support.
Tested by: bz, Tanguy Bouzeloc ( the.zauron <> gmail dot com )
Bruce Cran ( bruce <> cran dot org dot uk )
Michael Reifenberger ( mike <> reifenberger dot com )
Stephen Montgomery-Smith ( stephen <> missouri dot edu )
advertisement register. Some PHYs such as 88E3016 requires NEXT
Page capability to establish valid link. Also set protocol selector
field which is read only but it makes the intention clearer.
is valid only for auto-negotiation case so check the bit if we know
auto-negotiation is active. While I'm here explicitly checks
current speed with speed mask and set IFM_NONE if resolved speed
is unknown.
checks extended status register to see whether the PHY is fast
ethernet or not. This removes a lot of checks for specific PHY
models and it makes easy to add more PHYs to e1000phy(4).
While I'm here remove setting mii_anegticks as it is set with
mii_phy_add_media().
get default next page configuration. While I'm here explicitly set
IP1000PHY_ANAR_CSMA bit. This bit is read-only and always set
by hardware so setting it has no effect but it would clear the
intention. With this change controllers that couldn't establish
1000baseT link should work.
PR: kern/130846
bank instead of copper/fiber bank which in turn resulted in
wrong registers were accessed during PHY operation. It is
believed that page 0 should be used for copper PHY so reinitialize
E1000_EADR to select default copper PHY.
This fixes link establishment issue of nfe(4) on Sun Fire X4140.
OpenBSD also has similimar patch but they just reset the E1000_EADR
register to page 0. However some Marvell PHYs((88E3082, 88E1000)
don't have the extended address register and the meaning of the
register is quite different for each PHY model. So selecting copper
PHY is limited to 88E1149 PHY which seems to be the only one that
exhibits link establishment problem. If parent device know the type
of PHY(either copper or fiber) that information should be notified
to PHY driver but there is no good way to pass this information yet.
Reported by: thompsa
Reviewed by: thompsa
only mode and restore original value of extended address register
instead of overwriting it with page 1. There are still instance
information passing issue(e.g configured media type: fiber or
copper) from driver to PHY layer but this change make the selected
PHY work with 88E1112 PHY.
Reported by: Krzysztof Jedruczyk < beaker <at> hot dot pl >
Tested by: Krzysztof Jedruczyk < beaker <at> hot dot pl >
When there's an error, we don't want to free the children, since it
will be stack garbage. While we did fail to dereference it by setting
devs to 0, we didn't fail to call free. We never failed to fail, it
was the easiest thing to do.
Also report current link state while auto-negotiation is in
progress.
With this change link loss should be reported within a second
and drivers that rely on link state should work.
Reported by: Pete French < petefrench at ticketswitch dot com >
Tested by: Pete French < petefrench at ticketswitch dot com >
MFC after: 1 week
sn(4) driver and also looking at newer drivers. The reason for the rewrite is
to support MII and to try and resolve some performance issues found when trying
to use the sn(4) driver on the Gumstix network boards.
For reference, the SMSC LAN91C111 is a non-PCI ethernet part whose lineage
dates back to Ye Olde Days of ISA. It seems to get some use in the embedded
space these days on parts lacking on-board MACs or on-board PCI controllers,
such as the XScale PXA line of ARM CPUs.
This also includes a driver for the SMSC LAN83C183 10/100 PHY.
Man page to follow.
10/100 operation and place the mailbox registers at a different offset.
They also do not have an EEPROM, so the MAC address must be read from
NVRAM instead.
MFC after: 1 month
PR: kern/118975
Submitted by: benjsc, Thomas Nyström thn at saeab dot se
Submitted by: sephe (original patch for DragonflyBSD)
- Fix whitespace according to style(9).
- Sync the comment describing why we have to wait in nsphy_reset()
with nsphyter_reset(). It's true that the manual tells to not do a
reset within 500us of applying power but that's unlikely the cause
of problems seen here. Generally having to wait 500us after a reset
however is.
DP83847 PHYs. The main reason for using a specific driver for these
PHYs are reset quirks similar to the nsphy(4) driven DP83840A.
PR: 112654
Obtained from: NetBSD
MFC after: 2 weeks
Thanks to: mlaier for testing w/ DP83815
priorities of the technologies supported by 802.3 Selector Field
value.
1000BASE-T full duplex
1000BASE-T
100BASE-T2 full duplex
100BASE-TX full duplex
100BASE-T2
100BASE-T4
100BASE-TX
10BASE-T full duplex
10BAST-T
However PHY drivers didn't honor the order such that 100BASE-T4 had
higher priority than 100BASE-TX full duplex. Fix that long standing
bugs such that have PHY drivers choose the highest common denominator
ability.
Fix a bug in dcphy which inadvertently aceepts 100BASE-T4.
PR: 92599
set this flag and it was more or less just copied and pasted from
another FreeBSD driver while porting this driver from NetBSD, whose
gentbi(4) doesn't set MIIF_NOISOLATE either.
- Fix spelling in a comment.
OK'ed by: yongari
MFC after: 3 months
made by Michael Eisele and the patch was slightly modified by me.
With this change several NVIDIA ethernet controllers(e.g. MCP61)
works.
RTL8211B(L) is RealTek's new gigabit PHY. The PHY has several
features including crossover correction, polarity correction as
well as supporting triple speed(10/100/1000bps). Data transfer
between MAC and PHY is via RGMII for 1000baseT, MII for
10baseT/100baseTX.
Unfortunately, RealTek used the same model number for RTL8211B(L)
PHY so there is no way to discriminate between RTL8211B(L) and its
predecessors. ATM RTL8211B uses revision number 2 so checking the
revision number seems to be only way to identify it.
Obtained from: Michael Eisele [1]
Tested by: clemens fischer < ino-qc AT spotteswoode DOT de DOT eu DOT org >
mii_anegticks to MII_ANEGTICKS_GIGE and use it. Previously it used
to MII_ANEGTICKS which may not be enough to wait before retrying
autonegotiation process at 1000bps.
o Reset autonegotation timer if media option is not IFM_AUTO or we
got a valid link.
o Announce link loss right after it happends.
o Autonegiation is retried every mii_anegticks seconds.
o Report link state changes right after setting autonegotiation.
- Moved BCM5706S/5708S SerDes support to brgphy (since they are not technically
TBI interfaces)
- Added 2.5G support for BCM5708S
Comments:
Since this driver is shared with bge I tested several available controllers
supported by bge and all worked as expected, however the list was not
exhaustive. Need wider testing.
MFC after: 4 weeks
pointers. A structure is more readable and less error-prone. It
also avoids problems when a function pointer doesn't have the
same width as a void pointer.
sc->mii_anegticks according to whether the respective BGE chip
supports Fast Ethernet only or also Gigabit Ethernet.
- At least the BGE chips I've tested with wedge when isolating them
so document this as the reason for setting MIIF_NOISOLATE and
remove the unused (and partially even #ifdef'ed out) isolation
related code. Add code that panics if we encounter a non-zero MII
instance as generally there's no way a PHY requiring MIIF_NOISOLATE
can be handled gracefully in a multi-PHY configuration (it's ok for
the internal PHY of single-PHY-only-NIC to not support isolation
though).
- Additionally set MIIF_NOLOOP as loopback doesn't seem to work
either and remove the #ifdef'ed out code for adding respective
media. The MIIF_NOLOOP flag currently triggers nothing but
hopefully will be respected by mii_phy_setmedia() later on.
Reviewed by: jkim, yongari
MFC after: 1 month
is okay for most of the chipsets but BCM5701 PHY does not seem to like it.
Set media to IFM_NONE if link is not up instead of the previous value.
Reported by: Goran Lowkrantz (goran dot lowkrantz at ismobile dot com)
addition of SerDes support. According to the docs, the 5706C and 5708C
phys are supposed to use the same MII model that is separate from the
SerDes parts, but the 5706C actually uses the MII model of the SerDes
parts. To fix this, readd the old 5706C entry to miidevs and add a
special check in brgphy_probe() for phys that match the 5706C ID. If
the phy is supported by the gentbi(4) driver, then it's a SerDes phy, so
we fail the probe and let gentbi(4) grab it. Otherwise, it's a 5706C phy,
so we let brgphy(4) grab it.
In coordination with: dwhite
