Commit Graph

1985 Commits

Author SHA1 Message Date
Eric Anholt
f704d34677 Fix a typo in r1.8: The GTLB enable/flush bit is 1<<7, not 1<<8.
PR:		kern/56297
Submitted by:	Dan Angelescu <mrhsaacdoh@yahoo.com>
2003-09-17 02:58:17 +00:00
Martin Blapp
129eaf7996 Don't read the MAC address from a copy of the EEPROM in the softc
that has been recorded earlier and overwrite it again later by
reading it directly from the EEPROM again.

Read the MAC address from the PAR0/PAR1 registers instead, which
are autoloaded on reboot.

Tested on AN985, AN983B. According to the datasheets, it should
also work for the AL981 (I don't have such a chip on a card at home)

PR:             52988
Submitted by:   Andrew Gordon <arg-bsd@arg.me.uk>
MFC after:      2 weeks
2003-09-16 05:01:27 +00:00
Matthew N. Dodd
cdeb7b18af - Avoid calling pci_get_device() more than once in a single function.
- Provide a mechanism to prevent the use of MMIO.
- Prevent the use of MMIO for all 3c575 cardbus cards.
2003-09-14 16:33:48 +00:00
Bill Paul
c2c6548b3a Teach the re(4) driver about the CFG2 register, which tells us whether
we're on a 32-bit/64-bit bus or not. Use this to decide if we should
set the PCI dual-address cycle enable bit in the C+ command register.
(Enabling DAC on a 32-bit bus seems to do bad things.)

Also, initialize the C+ command register early in the re_init() routine.
The documentation says this register should be configured first.
2003-09-13 23:51:35 +00:00
Bill Paul
abc8ff44d3 - For the 8169 chips, read the station address by forcing an EEPROM
autoload and then copying the contends of the station address
  registers. For some reason, reading the EEPROM on the 8169S doesn't
  work right. This gets around the problem, and allows us to read
  the station address correctly on the 8169S.

- Insert a delay after initiating packet transmition in re_diag() to
  allow lots of time for the frame to echo back to the host, and wait
  for both the 'RX complete' and 'timeout expired' bits in the ISR
  register to be set.

- Deal more intelligently with the fact that the frame length
  field in the RX descriptor is a different width on the 8139C+
  than it is on the 8169/8169S/8110S

- For the 8169, you have to set bit 17 in the TX config register
  to enter digital loopback mode, but for the 8139C+, you have to
  set both bits 17 and 18. Take this into account so that re_diag()
  works properly for both types of chips.
2003-09-11 06:56:46 +00:00
Bill Paul
5c75626b05 Re-enable VLAN_MTU capability for this driver. (Got reverted when
I pulled out the C+/8169 bits.)
2003-09-11 04:05:01 +00:00
Bill Paul
9bac70b851 Add a PHY driver to support the built-in gigE PHY in the 8169S/8110S
ethernet chips. This driver is pretty simple, however it contains
special DSP initialization code which is needed in order to get
the chip to negotiate a gigE link. (This special initialization
may not be needed in subsequent chip revs.) Also:

- Fix typo in if_rlreg.h (RL_GMEDIASTAT_1000MPS -> RL_GMEDIASTAT_1000MBPS)

- Deal with shared interrupts in re_intr(): if interface isn't up,
  return.

- Fix another bug in re_gmii_writereg() (properly apply data field mask)

- Allow PHY driver to read the RL_GMEDIASTAT register via the
  re_gmii_readreg() register (this is register needed to determine
  real time link/media status).
2003-09-11 03:53:46 +00:00
Bill Paul
966a07e907 Teach rl(4) about new hwrev codes. 2003-09-10 15:12:55 +00:00
Bill Paul
69a6b7fb50 Update hardware revision table. 0x04000000 appears to be the revision
for the 8169S, according to my sample board. The RealTek Linux driver
mentions 0x00800000. I'm assigning this to the 8110S until I get
more info on it. (The (preliminary) RealTek docs only say that 8169S/8110S
chips will have some combination of those two bits set, but doesn't say
exactly what bit combination goes with which chip variant.)
2003-09-10 07:21:43 +00:00
Bill Paul
20512f29f2 Fix path of pci #includes that I botched.
Also pointed out by: Larry Rosenman
2003-09-08 04:28:20 +00:00
Bill Paul
a94100fa9b Take the support for the 8139C+/8169/8169S/8110S chips out of the
rl(4) driver and put it in a new re(4) driver. The re(4) driver shares
the if_rlreg.h file with rl(4) but is a separate module. (Ultimately
I may change this. For now, it's convenient.)

rl(4) has been modified so that it will never attach to an 8139C+
chip, leaving it to re(4) instead. Only re(4) has the PCI IDs to
match the 8169/8169S/8110S gigE chips. if_re.c contains the same
basic code that was originally bolted onto if_rl.c, with the
following updates:

- Added support for jumbo frames. Currently, there seems to be
  a limit of approximately 6200 bytes for jumbo frames on transmit.
  (This was determined via experimentation.) The 8169S/8110S chips
  apparently are limited to 7.5K frames on transmit. This may require
  some more work, though the framework to handle jumbo frames on RX
  is in place: the re_rxeof() routine will gather up frames than span
  multiple 2K clusters into a single mbuf list.

- Fixed bug in re_txeof(): if we reap some of the TX buffers,
  but there are still some pending, re-arm the timer before exiting
  re_txeof() so that another timeout interrupt will be generated, just
  in case re_start() doesn't do it for us.

- Handle the 'link state changed' interrupt

- Fix a detach bug. If re(4) is loaded as a module, and you do
  tcpdump -i re0, then you do 'kldunload if_re,' the system will
  panic after a few seconds. This happens because ether_ifdetach()
  ends up calling the BPF detach code, which notices the interface
  is in promiscuous mode and tries to switch promisc mode off while
  detaching the BPF listner. This ultimately results in a call
  to re_ioctl() (due to SIOCSIFFLAGS), which in turn calls re_init()
  to handle the IFF_PROMISC flag change. Unfortunately, calling re_init()
  here turns the chip back on and restarts the 1-second timeout loop
  that drives re_tick(). By the time the timeout fires, if_re.ko
  has been unloaded, which results in a call to invalid code and
  blows up the system.

  To fix this, I cleared the IFF_UP flag before calling ether_ifdetach(),
  which stops the ioctl routine from trying to reset the chip.

- Modified comments in re_rxeof() relating to the difference in
  RX descriptor status bit layout between the 8139C+ and the gigE
  chips. The layout is different because the frame length field
  was expanded from 12 bits to 13, and they got rid of one of the
  status bits to make room.

- Add diagnostic code (re_diag()) to test for the case where a user
  has installed a broken 32-bit 8169 PCI NIC in a 64-bit slot. Some
  NICs have the REQ64# and ACK64# lines connected even though the
  board is 32-bit only (in this case, they should be pulled high).
  This fools the chip into doing 64-bit DMA transfers even though
  there is no 64-bit data path. To detect this, re_diag() puts the
  chip into digital loopback mode and sets the receiver to promiscuous
  mode, then initiates a single 64-byte packet transmission. The
  frame is echoed back to the host, and if the frame contents are
  intact, we know DMA is working correctly, otherwise we complain
  loudly on the console and abort the device attach. (At the moment,
  I don't know of any way to work around the problem other than
  physically modifying the board, so until/unless I can think of a
  software workaround, this will have do to.)

- Created re(4) man page

- Modified rlphy.c to allow re(4) to attach as well as rl(4).

Note that this code works for the sample 8169/Marvell 88E1000 NIC
that I have, but probably won't work for the 8169S/8110S chips.
RealTek has sent me some sample NICs, but they haven't arrived yet.
I will probably need to add an rlgphy driver to handle the on-board
PHY in the 8169S/8110S (it needs special DSP initialization).
2003-09-08 02:11:25 +00:00
Doug Rabson
a5c1ae0c87 Make indentation uniform. 2003-09-06 14:04:30 +00:00
Doug Rabson
8e60aa28ab When recording resources for the amdpm driver, only describe the ports
we actually use. Originally, the code reserved 0x8000 to 0x80ff inclusive
which on my hardware conflicts with the acpi timer. This broke the amdpm
driver since it was actually given ports 0x800c to 0x810b (which should
not have happened, IMHO).

This also allows us to considerably simplify the handling of the nForce
smb driver, removing the need for a separate nfpm driver. With this, SMB
accesses appear to work on my Tyan Tiger MP board. Your mileage may vary.
In particular, the nForce changes have not been tested.
2003-09-06 13:56:56 +00:00
Sam Leffler
55b659ffc1 change timer to MPSAFE
Sponsored by:	FreeBSD Foundation
2003-09-05 22:33:44 +00:00
Thomas Moestl
eec804bbb8 Use stream bus space accesses to program the ID (station address)
registers; otherwise, the byte order of the address is changed on
big-endian machines.
2003-09-04 15:39:44 +00:00
Poul-Henning Kamp
8196d06a54 Examine and record the Silicon Revision Register on NS parts.
We can't update the device description in attach (why not ?), so
we device_print() what we find.

Conditionalize the short cable fix on this being older than rev 16A.

Call device_printf() when we apply short cable fix.

Include interrupt hold-off setting for rev 16+ under "#ifdef notyet"

The device_printf()'s will go under bootverbose once the various
issues have settled a bit.
2003-09-03 07:40:04 +00:00
John Baldwin
e27951b29c Use PCIR_BAR(x) instead of PCIR_MAPS.
Glanced over by:	imp, gibbs
Tested by:		i386 LINT
2003-09-02 17:30:40 +00:00
Doug Rabson
21c5ddf529 Add support for AMD766 and AMD768 chipsets.
PR: 41812
2003-09-01 14:58:34 +00:00
Martin Blapp
4a80e74bf3 All davicom cards seem to need DC_TX_ALIGN. 2003-08-27 08:13:34 +00:00
Jacques Vidrine
1855be730c Revision 1.126 broke the interface of the bktr driver's
METEORSSIGNAL ioctl.  Applications use this ioctl with the value
METEOR_SIG_MODE_MASK (0xFFFF0000, -65536) to reset signal delivery,
but revision 1.126 caused the driver to return EINVAL in this case.
Interestingly, the same METEORSSIGNAL ioctl in the meteor driver uses
0 to reset signal delivery.

This commit allows METEOR_SIG_MODE_MASK as a synonym for 0 in the
bktr driver, and restructures the code a bit so that it is otherwise
identical between the bktr and meteor drivers.
2003-08-26 16:57:24 +00:00
Martin Blapp
7dfdc26c46 Make TX on davicom 9102A working again. This chip needs
its mbufs aligned on TX.

PR:		53656, 42714
MFC after:	3 days
2003-08-24 23:47:44 +00:00
Matthew N. Dodd
6b312d762d PCI header files live in dev/pci. 2003-08-23 19:32:18 +00:00
Matthew N. Dodd
0c5eb28b6b Report media status for bitrate PHYs. 2003-08-23 18:09:25 +00:00
Matthew N. Dodd
34345c0870 AGP GART driver for NVIDIA nForce/nForce2 chipsets. 2003-08-23 18:00:31 +00:00
Warner Losh
b435c7ac5a dev/pci/meteor_reg.h doesn't exist. Revert this part of last commit. 2003-08-23 16:52:33 +00:00
Marcel Moolenaar
3c95e08bef Revert previous change for ncrreg.h. The header really lives in
sys/pci.
2003-08-23 02:25:04 +00:00
Warner Losh
19b7ffd1b8 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 07:20:27 +00:00
Sam Leffler
c06eb4e293 Change instances of callout_init that specify MPSAFE behaviour to
use CALLOUT_MPSAFE instead of "1" for the second parameter.  This
does not change the behaviour; it just makes the intent more clear.
2003-08-19 17:51:11 +00:00
Sam Leffler
0143cfd730 "short cable" fix for DP8315
Derived from:	netbsd and tech note at soekris web site
MFC after:	1 week
2003-08-19 16:57:00 +00:00
Bill Paul
51e110b154 Argh. Last commit only had the __FBSDID() fix. Really add the device ID
for the 8100 this time.
2003-08-15 22:47:55 +00:00
Bill Paul
7d673c8636 It appears in some configurations with an on-board RTL8100 chip (in this
case, a "Vortex86" mini PC), the PCI device ID value in the EEPROM (0x8100)
does not agree with the PCI device ID returned by pci_get_device() (0x8139).
This means that while rl_probe() matches the device, rl_attach() doesn't.
Work around this by adding an entry to the rl_devs table for the 8100 with
a device ID of 0x8100.

Also, get rid of extra instance of __FBSDID(). One is enough.
2003-08-15 22:46:47 +00:00
Bill Paul
f3300b2f0b Set the TX hardware checksum offload bits on all the descriptors of a
multi-fragment transmission. I'm not sure if this is a bug or a requirement
that I overlooked with going through the documentation, but the sample
8169 NIC that I have seems to require it at least some of the time or
else it botches TCP checksums on segments that span multiple descriptors.
2003-08-13 22:39:21 +00:00
Jacques Vidrine
007e25d95a Add or correct range checking of signal numbers in system calls and
ioctls.

In the particular case of ptrace(), this commit more-or-less reverts
revision 1.53 of sys_process.c, which appears to have been erroneous.

Reviewed by:	iedowse, jhb
2003-08-10 23:04:55 +00:00
Bill Paul
aadef91a54 Grrr. There is a gratuitous difference in the RX descriptor status
word between the 8139C+ and the 8169. The 8139C+ has a 'frame alignment
error bit' (bit 27) but the 8169 does not. Rather than simply mark this
bit as reserved, RealTek removed it completely and shifted the remaining
status bits one space to the left. This was causing rl_rxeofcplus()
to misparse the error and checksum bits.

To workaround this, rl_rxeofcplus() now shifts the rxstat word one
bit to the right before testing any of the status bits (but after
the frame length has been extracted).
2003-08-10 02:41:18 +00:00
Bill Paul
f6bb113e42 - Update some comments regarding hardware details of the 8169 and
note the existence of the 8169S and 8110S components. (The 8169
  is just a MAC, the 8169S and 8110S contain both a MAC and PHY.)

- Properly handle list and buffer addresses as 64-bit. The RX and
  TX DMA list addresses should be bus_addr_t's. Added RL_ADDR_HI()
  and RL_ADDR_LO() macros to obtain values for writing into chip
  registers.

- Set a slightly different TIMERINT value for 8169 NICs for improved
  performance.

- Change left out of previous commit log: added some additional
  hardware rev codes for other 10/100 chips and for the 8169S/8110S
  'rev C' gigE MACs.
2003-08-10 01:41:35 +00:00
Bill Paul
554e54b5de Add preliminary support for the RealTek 8169 gigE chip. Changes:
- Fix a bug in rl_dma_map_desc(): set the 'end of ring' bit in the
  right descriptor (DESC_CNT - 1, not DESC_CNT). The 8139C+ is limited
  to 64 descriptors and automatically wraps at 64 descriptors even
  if the EOR bit isn't set, but the 8169 NIC can have up to 1024
  descriptors per ring, so we must set the wrap point in the right
  place.

- RealTek moved the RL_TIMERINT register from offset 0x54 to 0x58 in
  the 8169 -- account for this.

- Added rl_gmii_readreg() and rl_gmii_writereg() routines.

- Fix rl_probe() to deal with the case where the base type is
  not RL_8139.

The next step is to add jumbo buffer support.

Tested with the Xterasys XN-152 NIC (hard to beat $29 for a gigE NIC).
2003-08-07 07:00:30 +00:00
Hidetoshi Shimokawa
c357858ad7 Enable IFCAP_VLAN_MTU and increase MTU for it.
Reviewed by: wpaul
2003-08-05 02:34:35 +00:00
Maxime Henrion
fa31bfaa13 Use the BUS_DMA_ZERO flag. 2003-07-27 14:38:54 +00:00
Maxime Henrion
aafb3ebbe3 Use the BUS_DMA_ZERO flag. 2003-07-27 14:00:02 +00:00
Maxime Henrion
42e85383ff Use the BUS_DMA_ZERO flag instead of bzero()'ing DMA memory. 2003-07-27 13:56:03 +00:00
Robert Drehmel
c39be346e3 Changed the type of the variable `qidx' from u_int8_t to int,
mainly to quiet a warning emitted by GCC 3.3 about comparing
a variable to a value which is larger than the former can hold.

The value was checked to make sure the `np->squeue' array is
not accessed behind its boundary.
This worked due to possibly accidental truncation when
(np->squeueput + 1) was larger than or equal to MAX_START (256)
when it was assigned to `qidx'.

`qidx' is used to hold the next position in the start queue
for an insertion.  The new type was chosen because some other
code in the function ncr_freeze_devq() also uses plain integers
to hold those indices.

Wrapped the line after the closing parenthesis of an `if'
condition.
2003-07-27 00:13:49 +00:00
Olivier Houchard
2722485b08 Erm, my previous commit was wrong and sis_tick() was only called each time
sis_ioctl() was called, so one had to use ifconfig each time the cable got
plugged in to be able to use the connection.
Do it a better way now, add a "in_tick" field in the softc structure,
call timeout() in sis_tick() and don't call it in sis_init() if in_tick is
non-zero.
Reported by:    Landmark Networks
Pointy hat to:  cognet
2003-07-22 01:35:09 +00:00
Warner Losh
4c16d09eda Add support for FA-511; Submitted by: Kenneth P. Stox; Pr 42858 2003-07-19 06:01:15 +00:00
Bill Paul
191926e10e Fix a busdma bogon:
Some of the calls to bus_dmamap_sync() were syncing the DMA descriptor
ring maps using the mbuf tag, when they should have been using the
descriptor ring tag instead.
2003-07-18 22:11:47 +00:00
Bill Paul
96fd5c300d Add support for the 8139C+ chipset. Unlike the other chips in the 8139
series, the 8139C+ has a descriptor-based DMA mechanism, and its
performance is actually pretty respectable. Note: the 8139D chip does
not support C+ mode. Only the 8139C+ and 8169 gigE chips support C+ mode.

Supported features:

- RX and TX checksum offload
- hardware VLAN tag insertion/extraction
- TX interrupt moderation using the 8139's on-board timer

Everything should be properly busdma'ed and endian-independent, so
things should work ok on non-x86 platforms. Unfortunately, my call
for testers on this code was met with deafening silence, and I don't
have access to any non-x86 FreeBSD boxes at the moment, so this is
speculation.

The device detection code has been cleaned up a little as well
(thanks to Michal Mertl) for the patches.

There are also updates to the rl(4) man page (which I accidentally
checked in before when I updated the dc(4) man page. Oops.)

Todo: finish support for the 8169 gigabit ethernet chip. This
mainly requires writing an rlgphy driver to handle the 8169's built-in
PHY. This will have to wait until I actually get my hands on an 8169
card for testing though. (I still can't find a source for one in the
U.S. Suggestions/pointers welcome.)
2003-07-10 20:38:48 +00:00
Bill Paul
e7b9ab3aaa Add support for a bunch of Microsoft networking products:
- MN-110 10/100 USB ethernet (ADMtek Pegasus II, if_aue)
- MN-120 10/100 cardbus (ADMtek Centaur-C, if_dc)
- MN-130 10/100 PCI (ADMtek Centaur-P, if_dc)

Also update dc(4) man page to mention support for MN-120 and MN-130.
2003-07-10 18:43:17 +00:00
Bill Paul
e4cffe95c7 Support for large frames for VLANs was added by tweaking the packet size
register, present only on 3c90xB and later NICs. This meant that you could
not use a 1500 byte MTU with VLANs on original 3c905/3c900 cards (boomerang
chipset). The boomerang chip does support large frames though, just not
in the same way: you can set the 'allow large frames' bit in the MAC
control register to receive frames up to 4K in size.

Changes:

- Set the 'allow large frames' bit for boomerang chips and increase
  the packet size register for cyclone and later chips. This allows
  us to use IFCAP_VLAN_MTU on all supported xl(4) NICs.
- Actually set the IFCAP_VLAN_MTU flag in the capabilities word
  in xl_attach().
- Change the method used to detect older boomerang chips. My 3c575C
  cardbus NIC was being incorrectly identified as 3c90x chip instead
  of 3c90xB because the capabilities word in its EEPROM reports
  a bizzare value. In addition to checking for the supportsNoTxLength
  bit, also check for the absence of the supportsLargePackets bit.
  Both of these cases denote a 3c90xB chip.
- Make RX and TX checksums configurable via the SIOCSIFCAP ioctl.
- Avoid an unecessary le32toh() in xl_rxeof(): we already have the
  received frame size in the lower 16 bits of rxstat, no need to
  read it again.

Tested with 3c905-TX, 3c900-TPO, 3c980C and 3c575C NICs.
2003-07-10 05:24:33 +00:00
Maxime Henrion
af4358c71e Make the dc(4) driver endian-clean, so to that it works on sparc64.
There are such cards in Netra X1 boxes, which should thus be fully
supported now.

Tested by:	jake
2003-07-09 15:03:10 +00:00
Maxime Henrion
56e5e7ae57 Convert the dc(4) driver to the busdma API. This is a necessary step
to have this driver working on sparc64.  It still needs to be made
endian-clean before it can work there.

Special thanks to dragonk@evilcode.net for sending me a dc(4) card so
that I was able to do this work.

Many cheers to all the people that tested this change, thanks to them,
this change shouldn't break anything :-).

Tested by:	marcel (i386 and ia64), ru (i386), wilko (alpha),
		mbr (i386), wpaul (i386) and
		Will Saxon <WillS@housing.ufl.edu> (i386)
2003-07-06 21:45:31 +00:00
Maxime Henrion
3d6ae7e047 Fix a bug that could cause dc(4) to m_freem() an already freed
mbuf or something that isn't an mbuf.

MFC after:	3 days
2003-07-06 14:39:45 +00:00