21840 Commits

Author SHA1 Message Date
Adrian Chadd
27ab76d69c Flip this over to be a configurable option for people who wish to play with it.
It's still not ready for prime-time - there's some TX niggles with these 11n
cards that I'm still trying to wrap my head around, and AMPDU-TX is just not
implemented so things will come to a crashing halt if you're not careful.
2011-03-22 13:35:56 +00:00
Adrian Chadd
44a3316e1f This isn't actually needed any longer, A-MPDU frames work fine if only tagged for 11n nodes. 2011-03-22 13:20:11 +00:00
John Baldwin
e786cbfdd2 Rename pci_find_extcap() to pci_find_cap(). PCI now uses the term
"extended capabilities" to refer to the new set of capability structures
starting at offset 0x100 in config space for PCI-express devices.  For now
both function names will still work.  I will merge this to older branches
to ease driver portability, but 9.0 will ship with a new pci_find_extcap()
function that locates extended capabilities instead.

Reviewed by:	imp
MFC after:	1 week
2011-03-22 12:05:49 +00:00
Adrian Chadd
f6f59583bf Bring over an XPA (external power amplifer) bias fix for the AR9160.
This fix modifies the const addac initval array, rather than modifying
a local copy. It means that running >1 AR9160 on a board may prove to
be unpredictable.

The AR5416 init path also does something similar, so supporting
>1 AR5416 of different revisions could cause problems.

The later fix will be to create a private copy of the Addac data
for the AR5416, AR9160 (and AR9100 when it's merged in) and then
modify that as needed.

Obtained From:	Linux ath9k
2011-03-22 10:29:36 +00:00
Adrian Chadd
507de8028f Fix OFDM ANI statistics gathering for the AR5416 and later chips.
I found this when trying to figure out why the RX PHY error count
didn't match the OFDM error count ANI was using. It turns out
there was two problems:

* What this commit addresses - using the wrong mask for OFDM errors,
  and
* The RX filter is set incorrectly after a channel scan (at least)
  even if interference mitigation is enabled by default.

ANI is still disabled by default for the AR5416 and later chips.
2011-03-22 07:19:49 +00:00
Adrian Chadd
fdb9c24c19 Set the "right" CCA register.
Obtained From:	ath9k
2011-03-22 05:47:48 +00:00
Adrian Chadd
6359b5731c Break out the RF mode setup into ar5416SetRfMode(), mirroring what ath9k does. 2011-03-22 00:52:44 +00:00
Adrian Chadd
b335ecffa2 Do a bit of spring cleaning in the board setup code, just to
bring it in line with the rest of the register initialisation.

I've verified that the 2/5ghz board values written to the
chip match what was previously written.
2011-03-22 00:43:58 +00:00
Adrian Chadd
dca968a2ce Bring over a few queue changes from ath9k:
* add pspoll/uapsd queue setup defaults;
* enable the exponential backoff window rather than the random
  backoff window when doing TX contention management.
2011-03-22 00:14:17 +00:00
Adrian Chadd
299bb4987b Even though it's very unlikely the misc mode register setting at -attach-
would be a problem, make sure it isn't overwritten by whatever is in
there at cold reset.

This brings the > ar5416 init path treatment of AR_MISC_MODE.
2011-03-22 00:12:26 +00:00
Adrian Chadd
fecc2a5eea Remove the merlin delay workaround here, it isn't appropriate for
the analog bank writes as Merlin never does them.
2011-03-22 00:11:04 +00:00
Hans Petter Selasky
b635069c09 - Do not output the trailing newline to the HID
report descriptor information, sysctl utility
  will show it for us.
- Modify sysctl node description to make it more
  understanable.

Found by:	Alexander Best <arundel@freebsd.org>
Submitted by:	Eygene Ryabinkin <rea@freebsd.org>
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-21 21:34:12 +00:00
Hans Petter Selasky
dbe63d3a27 - Bugfix: Fix a EHCI hardware race, where the hardware computed data toggle
value is updated after that we read it in the queue-head. This patch can
fix problems with BULK timeouts. The issue was found on a Nvidia chipset.

MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-21 21:16:25 +00:00
Adrian Chadd
1f0caefd53 Back that commit out - something's broken, and I need to figure out
what/why.
2011-03-21 17:44:52 +00:00
Adrian Chadd
020f937363 This CLKDRV workaround should only be for AR5416 v2.0/2.1;
the check was too strict and enabled it for all non AR5416-v2.2
chipsets - including later ones.
2011-03-21 17:12:03 +00:00
Adrian Chadd
c4ac32a897 Fix static ucastrate for ath_rate_sample.
* Pull out the static rix stuff into a different function
* I know this may slightly drop performance, but check if a static
  rix is needed before each packet TX.

* Whilst I'm at it, add a little extra debugging to the rate
  control stuff to make it easier to follow what's going on.
2011-03-21 12:51:13 +00:00
Jeff Roberson
e4cd31dd3c - Merge changes to the base system to support OFED. These include
a wider arg2 for sysctl, updates to vlan code, IFT_INFINIBAND,
   and other miscellaneous small features.
2011-03-21 09:40:01 +00:00
Adrian Chadd
d413a349e5 Disable a check I added a while ago to ensure the initial NF cal completed.
Give it a good go (32 attempts) and then print out a warning that's
going to occur whether HAL debugging is enabled or not. Then don't
abort the radio setup; just continue merrily along.

This should fix the issue that users were having where scanning would
occasionally fail on the active channel, causing traffic to cease
until the radio scanned again.
2011-03-20 15:46:05 +00:00
Adrian Chadd
baab333c80 Cave in and disable the ADC DC gain/offset calibrations if they're
not needed.

These calibrations are only applicable if the chip operating mode
engages both interleaved RX ADCs (ie, it's compensating for the
differences in DC gain and DC offset -between- the two ADCs.)
Otherwise the chip reads values of 0x0 for the secondary ADC
(as I guess it's not enabled here) and thus writes potentially
bogus info into the chip.

I've tested this on the AR9160 and AR9280; both behave themselves
in 11g mode with these calibrations disabled.
2011-03-20 09:08:45 +00:00
Adrian Chadd
d27f017997 * Remove a not-needed check in the AR5416+ case
* Restore the chip default of the DCU backoff threshold to 0x2,
  mirroring what ath9k does.
2011-03-20 08:47:59 +00:00
Adrian Chadd
4bc2f08fc0 Bring over a copy of the AR5212 TX queue reset and setup routines, in preparation
for fixing them based on the ath9k related TXQ fixes.

I've done this so people can go over the history of the diffs to the original
AR5212 routines (which AR5416 and later chips use) to see what's changed.
2011-03-20 08:42:56 +00:00
Adrian Chadd
3f9a52c30d Add a PSPOLL queue type, in preparation for (eventually) porting
over the TX queue setup code from ath9k for the AR5416 and later
chips.
2011-03-20 08:27:06 +00:00
Pyun YongHyeon
d8f226b665 Correct broadcast frame handling. Setting bit6 of MCR0 register
enables broadcast filtering. Make sure to clear the bit to receive
broadcast frames. While I'm here rename the bit definition to
reflect reality.

Reported by:	brad@OpenBSD
MFC after:	1 week
2011-03-19 22:36:59 +00:00
Adrian Chadd
336cfe471e Add in the channel survey data structures. These will be filled out
by the HAL at some point in the future.
2011-03-19 14:38:28 +00:00
Adrian Chadd
f395957311 Reserve a new diagnostic code for the channel survey code I'll add soon. 2011-03-19 14:37:13 +00:00
Adrian Chadd
534f8ec8b2 Make sure that the AR_MISC_MODE value from the initvals are properly respected.
This commit really is "fix the OFDM duration calculation to match reality when
running in 802.11g mode."

The AR5212 init vals set AR_MISC_MODE to 0x0 and all the bits that can be set are
set through code.

The AR5416 and later initvals set AR_MISC_MODE to various other values (with
the AR5212 AR_MISC_MODE options cleared), which include AR_PCU_CCK_SIFS_MODE .
This adds 6uS to SIFS on non-CCK frames when transmitting.

This fixes the issue where _DATA_ 802.11g OFDM frames were being TX'ed with
the ACK duration set to 38uS, not 44uS as on the AR5212 (and other devices.)

The AR5212 TX pathway obeys the software-programmed duration field in the packet,
but the 11n TX pathway overrides that with a hardware-calculated duration. This
was getting it wrong because of the above AR_MISC_MODE setting. I've verified
that 11g data OFDM frames are now being TXed with the correct ACK+SIFS duration
programmed in.
2011-03-19 03:15:28 +00:00
Adrian Chadd
a85eaa7714 Use the HAL method rather than directly calling ar5212ResetTxQueue().
Since ath9k does some slightly different bit fiddling when setting up
the TX queues, it may that the TX queue setup/reset functions will need
overriding later on.
2011-03-19 03:09:21 +00:00
Adrian Chadd
9082beb051 Add debugging messages to the AR5416 ANI code that's found in the AR5212 ANI code. 2011-03-19 00:46:10 +00:00
Jack F Vogel
d69437b146 A cut and paste here was wrong also. 2011-03-19 00:31:35 +00:00
Jack F Vogel
1c88efb221 Correct broken define 2011-03-19 00:19:18 +00:00
Jack F Vogel
1fd3c44f77 This delta updates the em driver to version 7.2.2 which has
been undergoing test for some weeks. This improves the RX
mbuf handling to avoid system hang due to depletion. Thanks
to all those who have been testing the code, and to Beezar
Liu for the design changes.

Next the igb driver is updated for similar RX changes, but
also to add new features support for our upcoming i350 family
of adapters.

MFC after a week
2011-03-18 18:54:00 +00:00
John Baldwin
54a03acb86 Partially revert previous change. Drop the quirk to disable MSI for HT
chipsets that do not have an HT slave at 0:0:0:0.  The Linux quirk is
actually specific to Nvidia chipsets and the check I had added was in
the wrong place.

Prodded by:	nathanw
2011-03-18 14:06:12 +00:00
John Baldwin
8081bab70b Fix a few issues with HyperTransport devices and MSI interrupts:
- Always enable the HyperTransport MSI mapping window for HyperTransport
  to PCI bridges (these show up as HyperTransport slave devices).
  The mapping windows in PCI-PCI bridges are enabled by existing code
  in the PCI-PCI bridge driver as MSI requests propagate up the device
  tree, but Host-PCI bridges don't really show up in that tree.
- If the PCI device at domain 0 bus 0 slot 0 function 0 is not a
  HyperTransport device, then blacklist MSI on any other HT devices in
  the system.  Linux has a similar quirk.

PR:		kern/155442
Tested by:	Zack Dannar  zdannar of gmail
MFC after:	1 week
2011-03-18 12:13:04 +00:00
Pyun YongHyeon
848a02fc41 Remove too expensive bus_dmamap_sync(9) call in dc_rx_resync().
With this change, driver may not notice updated descriptor status
change when bounce buffers are active. However, rxeof() in next run
will handle the synchronization.

Change dc_rxeof() a bit to return the number of processed frames in
RX descriptor ring. Previously it returned the number of frames
that were successfully passed to upper stack which in turn means it
ignored frames that were discarded due to errors. The number of
processed frames in RX descriptor ring is used to detect whether
driver is out of sync with controller's current descriptor pointer.
Returning number of processed frames reduces unnecessary (probably
wrong) re-synchronization.

Reviewed by:	marius
2011-03-16 17:09:51 +00:00
David Christensen
ee50cfe1f1 - Inadvertently committed files with +x attribute, fixed.
- Minor change to info output string.
2011-03-15 01:06:27 +00:00
David Christensen
dd46ab31de - Initial release of bxe(4) to support Broadcom NetXtreme II 10GbE.
(BCM57710, BCM57711, BCM57711E)

MFC after:	One month
2011-03-14 22:42:41 +00:00
Adrian Chadd
79e8a562ac Fix typo that snuck in. 2011-03-14 02:32:10 +00:00
Adrian Chadd
df20f67447 Bring over the AR9285 board update code from ath9k.
This does a few things in particular:

* Abstracts out the gain control settings into a separate function;
* Configure antenna diversity, LNA and antenna gain parameters;
* Configure ob/db entries - the later v4k EEPROM modal revisions have
  multiple OB/DB parameters which are used for some form of
  calibration. Although the radio does have defaults for each,
  the EEPROM can override them.

This resolves the AR2427 related issues I've been seeing and makes
it stable at all 11g rates for both TX and RX.
2011-03-14 00:42:48 +00:00
Adrian Chadd
77b9efed7b Fix the nfarray offsets for the ar2133/ar5133 radio - (AR5416, AR9160, etc.)
The offsets didn't match the assumption that nfarray[] is ordered by the
chainmask bits and programmed via the register order in ar5416_cca_regs[].
This repairs that damage and ensures that chain 1 is programmed correctly.
(And extension channels will now be programmed correctly also.)

This fixes some of the stuck beacons I've been seeing on my AR9160/AR5416
setups - because Chain 1 would be programmed -80 or -85 dBm, which is
higher than the actual noise floor and thus convincing the radio that
indeed it can't ever transmit.
2011-03-13 13:00:45 +00:00
Adrian Chadd
fce6d67665 The number of streams is not based on the interface stream count, but the
number of streams needed for that MCS rate.
2011-03-13 08:23:59 +00:00
Adrian Chadd
6ff1b2bda8 Move out some of the shared eeprom board value calculation routines into ah.c
rather than duplicating them for the v14 (ar5416+) and v4k (ar9285) codebases.

Further chipsets (eg the AR9287) have yet another EEPROM format which will use
these routines to calculate things.
2011-03-13 05:54:05 +00:00
Adrian Chadd
b90b8dd2b2 * Add in some board settings debugging to log what's being written
to the TX closed-loop power control registers.
* Modify a couple of functions to take the register chain number,
  rather than the regChainOffset value. This allows for the
  register chain to be logged.
2011-03-13 05:30:14 +00:00
Marius Strobl
e320a9ff1e Allocate the DMA memory shared between the host and the controller as
coherent.

Approved by:	gibbs
MFC after:	2 weeks
2011-03-12 20:36:52 +00:00
Marius Strobl
496a7fcaae Allocate the sound buffer DMA memory coherent. While NetBSD typically
also does this for sound drivers it's probably not necessary for all
combinations of controllers and drivers. However, given that our sound
drivers completely lack bus_dmamap_sync(9) calls this at least serves
as a workaround when enabling use of the IOMMU streaming buffers on
sparc64 and generally for arm and mips.

MFC after:	2 weeks
2011-03-11 22:42:04 +00:00
Marius Strobl
a1d090d428 - Allocate the DMA memory shared between the host and the controller as
coherent.
- Constify the ti_devs table.
- Don't bother to set if_mtu to ETHERMTU, ether_ifattach() does that.

MFC after:	2 weeks
2011-03-11 22:32:17 +00:00
Marius Strobl
006aaeeadf Allocate the DMA memory shared between the host and the controller as
coherent.

MFC after:	2 weeks
2011-03-11 22:25:34 +00:00
Marius Strobl
a1dd7a55b0 Allocate the DMA memory shared between the host and the controller as
coherent.

MFC after:	2 weeks
2011-03-11 22:23:46 +00:00
Marius Strobl
f8cb22fa6c Allocate the DMA memory shared between the host and the controller as
coherent.

MFC after:	2 weeks
2011-03-11 22:21:12 +00:00
Marius Strobl
0752b99d69 Allocate the DMA memory shared between the host and the controller as
coherent.

MFC after:	2 weeks
2011-03-11 22:19:49 +00:00
Adrian Chadd
586b0ae5aa Port over the AR9285 PA calibration and initial calibration code from
Linux ath9k.

The ath9k ar9002_hw_init_cal() isn't entirely clear about what
is supposed to be called for what chipsets, so I'm ignoring the
rest of it and just porting the AR9285 init cal path as-is and
leaving the rest alone. Subsequent commits may also tidy up the
Merlin (AR9285) and other chipset support.

Obtained from:	Linux ath9k
2011-03-11 11:58:54 +00:00