Note that this is a workaround, not a proper solution. If you know
lex well, and want to help - please let me know, I'll explain how it
should work.
PR: 192968
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
I gave up to update list of Marvell chips that require this quirk.
The final nail was growing number of PCIe/M.2 SSDs where Marvell chips
have PCI IDs of different vendors.
MFC after: 1 week
H/W donated by: I/O Switch
I've looked at the GCC sources and I now understand what's going wrong.
THe C11 keywords are simply nonexistent when using C++ mode. They are
marked as C-only in the parser. This is absolutely impractical for
multiple reasons:
- The C11 keywords do not conflict with C++ naming rules. They all start
with _[A-Z]. There is no reason to make them C-only.
- It makes it practically impossible for people to use these keywords in
C header files and expect them to work from within C++ sources.
As I said in my previous commit message: GCC is by far the weirdest
compiler that I've ever used.
Incredibly weird: GCC 4.7/4.9 do support the _Noreturn and _Thread_local
keywords, but not during bootstrapping. GCC is by far the weirdest
compiler that I've ever used.
Reported by: andreast@
The legacy USB circuit tends to give trouble on MacBook.
While the original report covered MacBook, extend the fix
preemptively for the newer MacBookPro too.
PR: 191693
Reviewed by: emaste
MFC after: 5 days
driver when it hits a mbuf/iov buffer, it mallocs and copies the data
for processing.. This improves perf by ~8-10% on my machine...
I have thoughts of fixing AES-NI so that it can better handle segmented
buffers, which should help improve IPSEC performance, but that is for
the future...
PCI IDs into quirks, which mostly fit (though you'd get no argument
from me that AHCI_Q_SATA1_UNIT0 is oddly specific). Set these quirks
in the PCI attachment. Make some shared functions public so that PCI
and possibly other bus attachments can use them.
The split isn't perfect yet, but it is functional. The split will be
perfected as other bus attachments for AHCI are written.
Sponsored by: Netflix
Reviewed by: kan, mav
Differential Revision: https://reviews.freebsd.org/D699
imgp->interpreted to a bitmask instead of, functionally, a bool. Each
imgactivator now requires its own flag in interpreted to indicate whether
or not it has already examined argv[0].
Change imgp->interpreted to an unsigned char to add one extra bit for
future use.
With this change, one can execute a shell script from a 64bit host native
make and still get the binmisc image activator to fire for the script
interpreter. Prior to this, execution would fail.
Phabric: https://reviews.freebsd.org/D696
Reviewed by: jhb@
MFC after: 4 weeks
full vendor tree. This worked great until it was time to update, but
now it is time to update. Hit the rest button by removing this branch
and re-adding it by a full copy of whatever is in the vendor tree.
merged into FreeBSD. Cherry picking from a full vendor tree was too
hard and lead to undestirable svn results.
Note: We only tim the dts* files, we don't trim the dt-bindings tree,
since having all of them causes no problems and the benefit to
trimming there is far out weighed by the cost of doing the trim each
time.
packets targeting a listening socket. Permit to reduce TCP input
processing starvation in context of high SYN load (e.g. short-lived TCP
connections or SYN flood).
Submitted by: Julien Charbon <jcharbon@verisign.com>
Reviewed by: adrian, hiren, jhb, Mike Bentkofsky
Current busdma code for unmapped bios will not properly align the segment
size, causing corruption on blkfront devices. Revert the commit until
busdma code is fixed.
Reported by: mav
MFC after: 1 day
try to collapse adjacent pieces using m_catpkt(). In best case
scenario it copies data and frees mbufs, making mbuf exhaustion
attack harder.
Suggested by: Jonathan Looney <jonlooney gmail.com>
Security: Hardens against remote mbuf exhaustion attack.
Sponsored by: Netflix
Sponsored by: Nginx, Inc.
value too large for the buffer allocated. Work around this by retrying
a few times with larger buffer sizes.
Submitted by: Scott Ferris <scott.ferris@isilon.com>
Reviewed by: mlaier, ngie
Sponsored by: EMC Isilon Storage Division
few "general purpose registers" whose values control chip behavior in ways
that have nothing to do with IO pin mux control. Define a simple API that
other soc-specific code can use to read and write the registers, and provide
the imx51 implementation of them.
and into the TSC probe routine.
- Initialize cpu_exthigh once in finishidentcpu() which is called
before printcpuinfo() (and matches the behavior on amd64).
<machine/md_var.h>.
- Move some CPU-related variables out of i386/i386/identcpu.c to
initcpu.c to match amd64.
- Move the declaration of has_f00f_hack out of identcpu.c to machdep.c.
- Remove a misleading comment from i386/i386/initcpu.c (locore zeros
the BSS before it calls identify_cpu()) and remove explicit zero
assignments to reduce the diff with amd64.
