Commit Graph

847 Commits

Author SHA1 Message Date
Ganbold Tsagaankhuu
c4a350ffea Add SY8106A Buck Regulator and Allwinner CIR devices to GENERIC arm64 kernel. 2019-04-20 03:21:47 +00:00
Jung-uk Kim
278f0de60d Merge ACPICA 20190329. 2019-03-29 20:21:28 +00:00
Andrew Turner
40fcc4760e Sort printing of the ID registers on arm64 to be identical to the
documentation. This will simplify checking new fields when they are added.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2019-03-25 18:02:04 +00:00
Marcin Wojtas
e54926b254 Enable etherswitchcfg and e6000sw driver in arm64 build
After latest binding update, this patch enables usage of
the switch on Armada 3720 EspressoBin, so compile it
by default with arm64 GENERIC.

A patch was extracted from https://reviews.freebsd.org/D19036

Submitted by: Bert JW Regeer <xistence@0x58.com>
Reviewed by: manu
2019-03-23 02:53:47 +00:00
Colin Percival
4782b90e4a Add nvme support to the arm64 GENERIC kernel.
Submitted by:	Greg V
Differential Revision:	https://reviews.freebsd.org/D19657
2019-03-22 06:36:40 +00:00
Marcin Wojtas
8b0f6c4215 Add bus_release_resource() method to nexus on arm64
The nexus module was missing method for releasing bus resources. As a
result, it couldn't be released and the bus_release_resource() call would
return ENXIO.

Next call to bus_alloc_resource() for the same resource was returning
error, because it wasn't released previously and it was still busy.

The implementation of the nexus_release_resource() is the same as for
arm architecture.

Submitted by:  Michal Krawczyk <mk@semihalf.com>
Reported-by:   Greg V <greg@unrelenting.technology>
Tested-by:     cperciva, Greg V <greg@unrelenting.technology>
Obtained from: Semihalf
MFC after:     2 weeks
Sponsored by:  Amazon, Inc.
Differential revision: https://reviews.freebsd.org/D19641
2019-03-21 10:51:36 +00:00
Konstantin Belousov
fd8d844f76 amd64 KPTI: add control from procctl(2).
Add the infrastructure to allow MD procctl(2) commands, and use it to
introduce amd64 PTI control and reporting.  PTI mode cannot be
modified for existing pmap, the knob controls PTI of the new vmspace
created on exec.

Requested by:	jhb
Reviewed by:	jhb, markj (previous version)
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D19514
2019-03-16 11:44:33 +00:00
Konstantin Belousov
6f1fe3305a amd64: Add md process flags and first P_MD_PTI flag.
PTI mode for the process pmap on exec is activated iff P_MD_PTI is set.

On exec, the existing vmspace can be reused only if pti mode of the
pmap matches the P_MD_PTI flag of the process.  Add MD
cpu_exec_vmspace_reuse() callback for exec_new_vmspace() which can
vetoed reuse of the existing vmspace.

MFC note: md_flags change struct proc KBI.

Reviewed by:	jhb, markj
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D19514
2019-03-16 11:31:01 +00:00
Edward Tomasz Napierala
1699546def Remove sv_pagesize, originally introduced with r100384.
In all of the architectures we have today, we always use PAGE_SIZE.
While in theory one could define different things, none of the
current architectures do, even the ones that have transitioned from
32-bit to 64-bit like i386 and arm. Some ancient mips binaries on
other systems used 8k instead of 4k, but we don't support running
those and likely never will due to their age and obscurity.

Reviewed by:	imp (who also contributed the commit message)
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D19280
2019-03-01 16:16:38 +00:00
Emmanuel Vadot
a5120cf00c arm64: rockchip: rk3399_pll: Fix the recalc function
The plls frequency are now correctly calculated in fractional mode
and integer mode.
While here add some debug printfs (disabled by default)
Tested with powerd on the little cluster on a RockPro64.

MFC after:	1 week
2019-03-01 13:05:37 +00:00
Andrew Turner
01a8235ea6 Add the hw.ncpu tunable to arm64.
This allows us to limit the number of CPUs to use, e.g. to debug problems
seen when enabling multiple clusters.

Reviewed by:	manu
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D19404
2019-02-28 14:40:43 +00:00
Emmanuel Vadot
7032095101 xhci_mv: Move the driver to generic_xhci
Marvell XHCI is in fact generic-xhci, so move the driver and
add the compatible string.
While here, get and enable the phy if the dtb provide one.
The xhci bindings state that phys should be in a 'phys' property but
Marvell DTS uses 'usb-phy', only add support for 'usb-phy' for now.

Sponsored-by:      Rubicon Communications, LCC ("Netgate")
2019-02-27 21:04:40 +00:00
Emmanuel Vadot
722b978677 arm64: rockchip: rk3399_clk: Add sd clock definitions
MFC after:	1 week
2019-02-27 17:29:38 +00:00
Emmanuel Vadot
3a17f3007e arm64: rockchip: clk_pll: Multiple improvement
Remove the mode_val from the clock definition as it's a bit unreadable.
Use mode_shift to represent which bit control the mode in the register.
Simplify some case where we can avoid a register read before changing it.
Set the PLL back to normal mode after the PLL have stabilized.

Discussed with:	 mmel
MFC after:	1 week
2019-02-27 14:20:28 +00:00
Emmanuel Vadot
4e5222d1cc arm64: rockchip: rk3399_pll: Fix copy paste
RK3399 PLLs don't have mode_reg, use the correct register.

MFC after:	1 week
2019-02-26 17:20:03 +00:00
Emmanuel Vadot
2db22920c5 arm64: rockchip: rk3399_pll: Switch to slow mode when changing the freq
Like r344578 but for RK3399.
This solve some hangs when switching between frequency.

MFC after:	1 week
2019-02-26 17:08:51 +00:00
Emmanuel Vadot
38bf16ebe9 arm64: rockchip: rk_pinctrl: Fix two banks in RK3328
The last two banks don't have 3 bits for the pin function but only 2.
This fixes eMMC on the Rock64.

MFC after:	1 week
2019-02-26 15:29:16 +00:00
Emmanuel Vadot
c78444cd82 arm64: rockchip: rk805: Map the regulator
No map function was provided before so every regulator lookup resolved
the regulator with id 1, as it uses the default mapper, which is wrong.
Correctly map the regulators.
While here remove some debug printfs and make them disable by default.

MFC after:	1 week
2019-02-26 13:18:14 +00:00
Emmanuel Vadot
c99a9196f2 arm64: rockchip: rk805: Add LDO regulators
Add the 3 LDO regulator found in the RK805 Power Management IC.

MFC after:	1 week
2019-02-26 13:17:09 +00:00
Emmanuel Vadot
caecd45840 arm64: rockchip: rk3328_pll: Multiple improvement
RockChip clocks register have a write mask in the upper 16 bits, if a 1
is present the corresponding bit in the lower 16 ones is set.
Use this instead of always setting the mask to 0xFFFF0000.
This avoids a read of the register.
While here, when switching PLL frequency, first switch it to slow mode.
When set to slow mode the PLL clock will be the external oscillator.
Changing the PLL parameters while its output is used can cause hang (sometimes).

MFC after:	1 week
2019-02-26 13:16:05 +00:00
Emmanuel Vadot
dae337c2c2 arm64: rockchip: clk: ARM CLK improvement
RockChip clocks register have a write mask in the upper 16 bits, if a 1
is present the corresponding bit in the lower 16 ones is set.
Use this instead of always setting the mask to 0xFFFF0000.
This avoids a read of the register.
While here set the parent after changing its freqeuncy, this reduce the time
between changing the parent and changing the divider for the arm clock.

MFC after:	1 week
2019-02-26 13:15:31 +00:00
Emmanuel Vadot
554c9209e3 arm64: rockchip: clk: rk_clk_composite: Properly use the mask bits
RockChip clocks register have a write mask in the upper 16 bits, if a 1
is present the corresponding bit in the lower 16 ones is set.
Use this instead of always setting the mask to 0xFFFF0000.
This avoids a read of the register.
While here add some debug printf useful for debuging clock problems

MFC after:	1 week
2019-02-26 13:14:49 +00:00
Emmanuel Vadot
f4f53f2b4d arm64: rockchip: clk: Set the write mask when setting the clock mux
RockChip clocks have a write mask in the upper 16bits of the mux register
which wasn't set in the set_mux function.
Also the wrong parent was tested instead of the real current one, when
switch parent, test with the current one before.

Pointy Hat:    manu
MFC after:	1 week
2019-02-25 17:40:00 +00:00
Konstantin Belousov
e7a9df16e6 Add kernel support for Intel userspace protection keys feature on
Skylake Xeons.

See SDM rev. 68 Vol 3 4.6.2 Protection Keys and the description of the
RDPKRU and WRPKRU instructions.

Reviewed by:	markj
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D18893
2019-02-20 09:51:13 +00:00
Konstantin Belousov
72091bb393 Enable enabling ASLR on non-x86 architectures.
Discussed with:	emaste
Sponsored by:	The FreeBSD Foundation
2019-02-14 14:44:53 +00:00
Emmanuel Vadot
f6f8a42129 arm64: Fix compile when removing SOC_ROCKCHIP_* options
Make every rockchip file depend on the multiple soc_rockchip options
While here make rk_i2c and rk_gpio depend on their device options.

Reported by:	sbruno
2019-02-10 08:14:06 +00:00
Conrad Meyer
7e804fd5c5 Revert r343713 temporarily
The COVERAGE option breaks xtoolchain-gcc GENERIC kernel early boot
extremely badly and hasn't been fixed for the ~week since it was committed.
Please enable for GENERIC only when it doesn't do that.

Related fallout reported by:	lwhsu, tuexen (pr 235611)
2019-02-10 07:54:46 +00:00
Andrew Turner
4f33c38083 Add missing data barriers after storeing a new valid pagetable entry.
When moving from an invalid to a valid entry we don't need to invalidate
the tlb, however we do need to ensure the store is ordered before later
memory accesses. This is because this later access may be to a virtual
address within the newly mapped region.

Add the needed barriers to places where we don't later invalidate the
tlb. When we do invalidate the tlb there will be a barrier to correctly
order this.

This fixes a panic on boot on ThunderX2 when INVARIANTS is turned off:
panic: vm_fault_hold: fault on nofault entry, addr: 0xffff000040c11000

Reported by:	jchandra
Tested by:	jchandra
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D19097
2019-02-07 20:58:45 +00:00
Andrew Turner
8308d2a251 Add a missing data barrier to the start of arm64_tlb_flushID.
We need to ensure the page table store has happened before the tlbi.

Reported by:	jchandra
Tested by:	jchandra
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D19097
2019-02-07 20:50:39 +00:00
Jayachandran C.
73d8c81f38 arm64 gicv3: add IORT and NUMA support
acpi_iort.c has added support to query GIC proximity and MSI XREF
ID for GIC ITS blocks. Use this when GIC ITS blocks are initialized
from ACPI.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D18003
2019-02-07 03:01:54 +00:00
Jayachandran C.
9088a4751c arm64 acpi: Add support for IORT table
Add new file arm64/acpica/acpi_iort.c to support the "IO Remapping
Table" (IORT). The table is specified in ARM document "ARM DEN 0049D"
titled "IO Remapping Table Platform Design Document".  The IORT table
has information on the associations between PCI root complexes, SMMU
blocks and GIC ITS blocks in the system.

The changes are to parse and save the information in the IORT table.
The API to use this information is added to sys/dev/acpica/acpivar.h.

The acpi_iort.c also has code to check the GIC ITS nodes seen in the
IORT table with corresponding entries in MADT table (for validity)
and with entries in SRAT table (for proximity information).

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D18002
2019-02-07 02:30:33 +00:00
Andrew Turner
634a8a8873 Enable COVERAGE and KCOV by default on arm64 and amd64.
This allows userspace to trace the kernel using the coverage sanitizer
found in clang. It will also allow other coverage tools to be built as
modules and attach into the same framework.

Sponsored by:	DARPA, AFRL
2019-02-03 12:46:27 +00:00
Konstantin Belousov
c75f49f7d8 Make iflib a loadable module.
iflib is already a module, but it is unconditionally compiled into the
kernel.  There are drivers which do not need iflib(4), and there are
situations where somebody might not want iflib in kernel because of
using the corresponding driver as module.

Reviewed by:	marius
Discussed with:	erj
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D19041
2019-01-31 19:05:56 +00:00
David E. O'Brien
09efc56d66 Follow arm[32] and sparc64 KAPI and provide the FreeBSD standard spelling
across all architectures for this header.

Reviewed by:	stevek
Obtained from:	Juniper Networks
2019-01-29 20:10:27 +00:00
Andrew Turner
524553f56d Extract the coverage sanitizer KPI to a new file.
This will allow multiple consumers of the coverage data to be compiled
into the kernel together. The only requirement is only one can be
registered at a given point in time, however it is expected they will
only register when the coverage data is needed.

A new kernel conflig option COVERAGE is added. This will allow kcov to
become a module that can be loaded as needed, or compiled into the
kernel.

While here clean up the #include style a little.

Reviewed by:	kib
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D18955
2019-01-29 11:04:17 +00:00
Oleksandr Tymoshenko
00a4815fc6 [rpi] Reorganize spigen(4) overlays for Raspberry Pi
- Remove CS=2 entry from spigen-rpi2 since it didn't work
- Add spigen-rpi3 overlay for Raspberry Pi 3
- Enable rpi overlay modules for GENERIC kernel on aarch64

PR:		233489
Submitted by:	bobf@mrp3.com
Reviewed by:	db
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D16088
2019-01-16 01:08:34 +00:00
Andrew Turner
cd0c606fda Ensure the I-Cache is correctly handled in arm64_icache_sync_range
The cache_handle_range macro to handle the arm64 instruction and data
cache operations would return when it was complete. This causes problems
for arm64_icache_sync_range and arm64_icache_sync_range_checked as they
assume they can execute the i-cache handling instruction after it has been
called.

Fix this by making this assumption correct.

While here add missing instruction barriers and adjust the style to
match the rest of the assembly.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D18838
2019-01-15 09:48:18 +00:00
Olivier Houchard
e8d5909c39 Don't forget to add the needed #includes.
Pointy hat to:	cognet
2019-01-13 23:41:56 +00:00
Olivier Houchard
9cd27257d5 Introduce cpu_icache_sync_range_checked(), that does the same thing as
cpu_icache_sync_range(), except that it sets pcb_onfault to catch any page
fault, as doing cache maintenance operations for non-mapped generates a
data abort, and use it in freebsd32_sysarch(), so that a userland program
attempting to sync the icache with unmapped addresses doesn't crash the
kernel.

Spotted out by:	andrew
2019-01-13 23:29:46 +00:00
Olivier Houchard
8c9c3144cc Impleent COMPAT_FREEBSD32 for arm64.
This is based on early work by andrew@.
2019-01-13 19:49:46 +00:00
Andrew Turner
b3c0d957a2 Add support for the Clang Coverage Sanitizer in the kernel (KCOV).
When building with KCOV enabled the compiler will insert function calls
to probes allowing us to trace the execution of the kernel from userspace.
These probes are on function entry (trace-pc) and on comparison operations
(trace-cmp).

Userspace can enable the use of these probes on a single kernel thread with
an ioctl interface. It can allocate space for the probe with KIOSETBUFSIZE,
then mmap the allocated buffer and enable tracing with KIOENABLE, with the
trace mode being passed in as the int argument. When complete KIODISABLE
is used to disable tracing.

The first item in the buffer is the number of trace event that have
happened. Userspace can write 0 to this to reset the tracing, and is
expected to do so on first use.

The format of the buffer depends on the trace mode. When in PC tracing just
the return address of the probe is stored. Under comparison tracing the
comparison type, the two arguments, and the return address are traced. The
former method uses on entry per trace event, while the later uses 4. As
such they are incompatible so only a single mode may be enabled.

KCOV is expected to help fuzzing the kernel, and while in development has
already found a number of issues. It is required for the syzkaller system
call fuzzer [1]. Other kernel fuzzers could also make use of it, either
with the current interface, or by extending it with new modes.

A man page is currently being worked on and is expected to be committed
soon, however having the code in the kernel now is useful for other
developers to use.

[1] https://github.com/google/syzkaller

Submitted by:	Mitchell Horne <mhorne063@gmail.com> (Earlier version)
Reviewed by:	kib
Testing by:	tuexen
Sponsored by:	DARPA, AFRL
Sponsored by:	The FreeBSD Foundation (Mitchell Horne)
Differential Revision:	https://reviews.freebsd.org/D14599
2019-01-12 11:21:28 +00:00
Andrew Turner
80e21aabea Fix the location of td->td_frame at the top of the kernel stack.
In cpu_thread_alloc we would allocate space for the trap frame at the top of
the kernel stack. This is just below the pcb, however due to a missing cast
the pointer arithmetic would use the pcb size, not the trapframe size. As
the pcb is larger than the trapframe this is safe, however later in cpu_fork
we include the case leading to the two disagreeing on the location.

Fix by using the same arithmetic in both locations.

Found by:	An early KASAN patch
Sponsored by:	DARPA, AFRL
2019-01-11 11:32:46 +00:00
Fedor Uporov
6651cf410c Fix errno values returned from DUMMY_XATTR linuxulator calls
Reported by: weiss@uni-mainz.de
Reviewed by: markj
MFC after: 1 day
Differential Revision: https://reviews.freebsd.org/D18812
2019-01-11 07:58:25 +00:00
Andrew Turner
9c871ab54a Fix a comment, pushed onto is two words.
While here make the comments sentences.

Sponsored by:	DARPA, AFRL
2019-01-10 16:31:07 +00:00
Andrew Turner
0f72efaac7 Pass VM_PROT_EXECUTE to vm_fault for instruction faults.
We need to tell vm_fault the reason for the fault was because we tried to
execute from the memory location. Without this it may return with success
as we only request read-only memory, then we return to the same location
and try to execute from the same memory address. This leads to an infinite
loop raising the same fault and returning to the same invalid location.

MFC after:	1 week
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D18511
2018-12-27 14:14:41 +00:00
Mateusz Guzik
628888f0e0 Remove iBCS2, part2: general kernel
Reviewed by:	kib (previous version)
Sponsored by:	The FreeBSD Foundation
2018-12-19 21:57:58 +00:00
Emmanuel Vadot
2d5e81fbd0 mv_thermal: Add thermal driver for AP806 and CP110 thermal sensor
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:33:05 +00:00
Emmanuel Vadot
44d027bb5d arm64: Add mv_cp110_icu and mv_cp110_gicp
icu is a interrupt concentrator in the CP110 block and gicp
is a gic extension to allow interrupts in the CP block to be turned
into GIC SPI interrupts

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:08:43 +00:00
Emmanuel Vadot
4f3a5b510b arm64: mv_gpio: Add Marvell 8K support
While here put the interrupts setup in it's own function

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:02:57 +00:00
Emmanuel Vadot
2d2a085222 arm64: mvebu_pinctrl: Add driver for Marvell Pinmux Controller
Add a driver compatible with Marvell mvebu-pinctrl and add ap806-pinctrl
support.

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:00:05 +00:00