Commit Graph

335 Commits

Author SHA1 Message Date
Oleksandr Tymoshenko
6534f93296 [mv_pci] Increase default PCI space size for mv_pci
mv_pci driver reads PCI memory window layout from DTB data and if the
data is incomplete falls back to default value. The value is too small
to fit two PCI spaces for mwlwifi devices on WRT3200ACM so the resource
allocation for them fails. Increase the default to 4Mb from 1Mb so
the devices can be properly attached.

MFC after:	1 week
2019-01-15 00:37:37 +00:00
Oleksandr Tymoshenko
afffcaa18f [mv_pci] Do not attempt to attach disabled PCI ports
Fail probe for PCI port if the respective FDT node is not enabled

Differential Revision:	https://reviews.freebsd.org/D18385
2018-12-15 02:35:48 +00:00
Emmanuel Vadot
2d5e81fbd0 mv_thermal: Add thermal driver for AP806 and CP110 thermal sensor
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:33:05 +00:00
Emmanuel Vadot
31cdaf420f arm64: mv_cp110_icu: Fix build 2018-12-12 22:24:30 +00:00
Emmanuel Vadot
e5ff483e7a mv_gpio: Since it's also an interrupt controller, attach sooner
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:10:11 +00:00
Emmanuel Vadot
44d027bb5d arm64: Add mv_cp110_icu and mv_cp110_gicp
icu is a interrupt concentrator in the CP110 block and gicp
is a gic extension to allow interrupts in the CP block to be turned
into GIC SPI interrupts

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:08:43 +00:00
Emmanuel Vadot
73450c4a7a arm64: marvell: Add cp110 clock controller support
The cp110 clock controller controls the clocks and gate of the CP110
hardware block.

Every clock/gate are implemented except the NAND clock.

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:04:21 +00:00
Emmanuel Vadot
4f3a5b510b arm64: mv_gpio: Add Marvell 8K support
While here put the interrupts setup in it's own function

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:02:57 +00:00
Emmanuel Vadot
e1453c9e4c arm64: marvell: Add driver for Marvell Ap806 System Controller
The first two clocks are for the clusters and their frequencies can be
found reading a register. Then a fixed 1200Mhz clock is present and two
fixed clocks, 'mss' which is 1200 / 6 and 'sdio' which is 1200 / 3.

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:01:06 +00:00
Emmanuel Vadot
2d2a085222 arm64: mvebu_pinctrl: Add driver for Marvell Pinmux Controller
Add a driver compatible with Marvell mvebu-pinctrl and add ap806-pinctrl
support.

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:00:05 +00:00
Oleksandr Tymoshenko
440e13cf1e Fix PCI driver unload for Marvell PCI controller
Add generic implementation for bus_deactivate_resource method. Without
it bus_release_resource fails with "Failed to release active resource"
message

MFC after:	1 week
2018-12-02 21:58:36 +00:00
Luiz Otavio O Souza
aaf1f854e1 Set the SPI clock speed and polarity on each transfer to catch up with
recent changes in spibus and allow the use of different SPI modes on
the same bus.

Reported by:	ian
Sponsored by:	Rubicon Communications, LLC (Netgate)
2018-11-15 17:05:02 +00:00
Luiz Otavio O Souza
2e82757c64 Add the driver for the SPI controller on ARMADA38X.
Tested on Clearfog (Pro) and SG-3100.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2018-11-14 14:26:32 +00:00
Andrew Turner
f13a4096b7 Remove PHYSADDR from kernel configurations that don't need it. The only
place we need to set it is when we also have FLASHADDR set.

Sponsored by:	DARPA, AFRL
2018-08-15 13:13:19 +00:00
Andrew Turner
cb5ce014d4 Use the cp15 functions to read cp15 registers rather than using assembly
functions. The former are static inline functions so will compile to a
single instruction.
2018-07-28 17:21:34 +00:00
Andrew Turner
e4c66ddabd Remove IPI_IRQ_START and IPI_IRQ_END from the arm kernel config files.
These are unneeded with INTRNG.
2018-07-28 06:46:10 +00:00
Andriy Gapon
2559473944 follow-up to r336635, update TAILQ to CK_SLIST for ie_handlers
arm, mips and sparc64 were affected.
2018-07-23 15:36:55 +00:00
Marcin Wojtas
30b5fb13f2 Fix SoC identification issue on Marvell platforms
Marvell SoC identification function was called by SYSINIT on all armv7
platforms, which brakes platforms other than Marvell built with
GENERIC config. Fix this by shifting SoC identifying to Marvell platform
initialization.

Submitted by: Patryk Duda <pdk@semihalf.com>
Reviewed by: manu
Tested by: manu
Obtained from: Semihalf
Sponsored by: Stormshield
2018-05-03 01:10:41 +00:00
Marcin Wojtas
2a94dbf567 Replace FDT tree parsing with gpio_map_gpios implementation in mv_gpio driver
This patch replaces in-driver FDT parsing, which was
needed for setting initial values on GPIO pins.
Now FDT is parsed by generic kernel code, pins are set
by invoking gpio_map_gpios method.

Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14757
2018-04-26 19:10:18 +00:00
Marcin Wojtas
ded9da6832 Update mv_gpio driver to new FreeBSD API
This patch implements and exports functions described
in gpio_if.m file. It also uses new gpiobus_attach_bus function
instead of adding gpioc and gpiobus as children. It removes
ulgy reading SoC ID and related if..else, so it depends only on
data read from FDT.

Submitted by: Patryk Duda <pdk@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14756
2018-04-26 19:00:48 +00:00
Marcin Wojtas
e9e2a7c1d3 Enable cesa driver to work with Linux DT binding
Linux device tree binding, whose usage is obligatory,
comprises faulty representation of Marvell cryptographic
engine (CESA) - two engines are artificially gathered into
single DT node, in order to avoid certain SW limitation.

This patch improves the cesa driver to support above binding,
depending on compatible string, which helps to ensure
backward compatibility.

Submitted by: Patryk Duda
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14760
2018-04-09 23:36:52 +00:00
Oleksandr Tymoshenko
217d17bcd3 Clean up OF_getprop_alloc API
OF_getprop_alloc takes element size argument and returns number of
elements in the property. There are valid use cases for such behavior
but mostly API consumers pass 1 as element size to get string
properties. What API users would expect from OF_getprop_alloc is to be
a combination of malloc + OF_getprop with the same semantic of return
value. This patch modifies API signature to match these expectations.

For the valid use cases with element size != 1 and to reduce
modification scope new OF_getprop_alloc_multi function has been
introduced that behaves the same way OF_getprop_alloc behaved prior to
this patch.

Reviewed by:	ian, manu
Differential Revision:	https://reviews.freebsd.org/D14850
2018-04-08 22:59:34 +00:00
Andrew Turner
626a198305 Move fdt_is_type to be a Marvell specific function. It's not used by any
other SoCs.

Sponsored by:	DARPA, AFRL
2018-04-08 12:20:06 +00:00
Andrew Turner
9e4fa9eb4a Remove fdt_pm_is_enabled as it's Marvell specific. Replace the only call to
it with a call to the helper function fdt_pm_is_enabled would call.

Sponsored by:	DARPA, AFRL
2018-04-04 13:37:59 +00:00
Marcin Wojtas
edf9ef7384 Enable Marvell gpio driver to work with many controllers
This patch moves all global data structures into mv_gpio_softc,
and puts device_t parameter to functions calls everywhere where needed.
As a result, we can create multiple driver instances.

Removed names in function declaration to keep style.

Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14755
2018-04-04 13:20:29 +00:00
Marcin Wojtas
ad2be10ff0 Improve interrupt and resource allocation in Marvell GPIO driver
This patch adds support for more than one interrupts
in GPIO controller. It reads necessary information (such as cell size)
from FDT, so there are no magic numbers.

Note that interrupts are still not working, but this patch makes
one good step in correct direction

Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14754
2018-04-04 13:12:49 +00:00
Marcin Wojtas
1c45bd112b Introduce port debouncing mechanism in mv_gpio driver
This patch introduces gpio debouncing mechanism
with fixed memory allocation in critical section.

When you press button, value at gpio pin connected to button
is changing many times which will cause in unexpected behaviour.
Debouncing mechanism will prevent this phenomenon

Submitted by: Patryk Duda <pdk@semihalf.com>
	      Wojciech Macek <wma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14753
2018-04-04 13:08:51 +00:00
Marcin Wojtas
46db728392 Match Marvell Armada38X PCIE ranges in dts with Linux
If driver cannot determine ranges based on fdt, it will calculate
them based on number and type of current port.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14752
2018-04-04 13:01:14 +00:00
Marcin Wojtas
13d464bf71 Change reg in Marvell Armada38X pcie FDT
Ranges in pcie-controller are unused, so could be changed to match Linux
device tree represntation. Same with interrupt-cells and interrupt-parent.
In PCI controller driver ocd_data are used for matching driver and
choose proper resources acquisition function.
fdt_win_process_child have new argument which provide information
about fdt node containing addresses of MMIO registers.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: manu [DT part]
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14751
2018-04-04 12:54:18 +00:00
Marcin Wojtas
c7dbc00c34 Match Marvell Armada38X PCI compatible with Linux
In Linux FDT pcie does not have compatible string.
Configuration of windows in mv_common was based on fdt compatible.
Now pcie windows are configured by their parent: pcie_controller.
Processing is moved to fdt_win_process_child. fdt_win_process now
only walk through the tree. SOC_NODE_PCI is position of pcie function in
soc_node_spec array.

PCIe probe cannot use ofw_bus_search_compatible, because it needs to
check also device type and parents compatible.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: manu [DT part]
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14749
2018-04-04 12:41:42 +00:00
Marcin Wojtas
3a582d093b Add support of PCI_RES_BUS to Marvell PCI driver
GENERIC ARM config use NEW_PCIB driver (https://wiki.freebsd.org/NEW_PCIB).
To satisfy it, allocation and deallocation of PCI_RES_BUS is necessary.
Conditional compilation is added for backward compatibility with ARMv5
configs.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: jhb
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14748
2018-04-04 12:36:55 +00:00
Marcin Wojtas
789bbd4d27 Make Marvell armv7 timer and wdt registers definitions common
Define timers registers for both SoCs and choose proper one during runtime
based on information from FDT.
In WDT driver there are different function for ArmadaXP and other ARMv5 SoCs.
In timer driver registers definitions are stored in resource_spec structure
and chosen during runtime.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14746
2018-04-04 12:30:52 +00:00
Marcin Wojtas
04bb9a6625 Make Marvell Armada reset registers usage generic
Define reset registers for both Armada38X and ArmadaXP and
choose proper one during runtime based on information from FDT.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14745
2018-04-04 10:14:43 +00:00
Marcin Wojtas
ccc1e6eb49 Use PLATFORM for initializing Marvell ArmadaXP and Armada38X
Spliting armv5 and armv7 machdep is necessary for adding Armada38X and
ArmadaXP to GENERIC config.
PLATFORM framework checks SOC type in FDT and will select proper
initialization function implementation during runtime.
Pointers to SoC specific implementation are stored in array of
platform_method_t and provided to framework by FDT_PLATFORM_DEF macro.
PLATFORM framework supports also reset function. To simplify implementation
cpu_reset is moved from mv_common to armv5 and armv7 machdep.

Armada38X and ArmadaXP share now common list of files, so resolve all
dependencies as well.

Submitted by: Rafal Kozik <rk@semihalf.com>
	      Marcin Wojtas <mw@semihalf.com>
Reviewed by: mw
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14744
2018-04-04 08:40:49 +00:00
Marcin Wojtas
c58ed0b07f Fix kernel modules names for Marvell armv7
Two modules with the same name cannot be loaded, so Marvell specific drivers
cannot have the same name as the generic drivers.
Files with the same name, even in different folders overlaps their .o files,
so in order to prepare for supporting Marvell platforms in GENERIC armv7
config, modify conflicting names.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14743
2018-04-03 23:49:35 +00:00
Marcin Wojtas
996170b401 Split out delay code in Marvell timer driver for PLATFORM
The PLATFORM code will perform the software loop in the early boot,
so extract the actual delay code to handle situation, when
the timers are already initialized.

Obtained from: Semihalf
Sponsored by: Stormshield
2018-04-03 23:29:34 +00:00
Marcin Wojtas
4b1bfa3fde Add missing flag check in Marvell PCIE driver
Flag was introduced in r331953, but eventually not used.

Obtained from: Semihalf
Sponsored by: Stormshield
2018-04-03 23:27:07 +00:00
Marcin Wojtas
72dbc3aca8 Make Marvell AmadaXP timer driver more generic
Store pointers to SoC specific functions in mv_timer_config structure
and determine proper config in runtime based on compatible string from FDT.
Compatible string for ArmadaXP timers is changed to match Linux FDT.
Armada 38x uses generic Cortex-A9 timer and separate watchdog drivers, so
it does not need to be supported by timer driver.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14741
2018-04-03 22:21:12 +00:00
Marcin Wojtas
d100eecfc4 Make Marvell Armada watchdog driver more generic
Store platform dependent functions and constants in mv_wdt_config
structure and select proper configuration on runtime based on
compatible string provided in FDT.
Marvell Armada38X and ArmadaXP non-repetitive registers are moved to
generic part of code.
To support armv5 as well, use proper compatible string:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/watchdog/orion_wdt.c?h=v4.13-rc3#n456

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14740
2018-04-03 22:15:53 +00:00
Marcin Wojtas
526de79be2 Make get_tclk and get_cpu_freq generic for Marvell armv7 SoCs
In GENERIC kernel choosing proper get_tclk and get_cpu_freq implementation must
be done in runtime. Kernel for both SoC need to have implementation of each
other functions, so common file list mv/files.arm7 is added.
Marvell armv5 SoC have their own non-generic implementation of those function.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14739
2018-04-03 22:10:50 +00:00
Marcin Wojtas
091cd2f18d Make mv_common.c generic for Marvell Armada38X and ArmadaXP
Preparation for adding Armada38X and ArmadaXP SoC to GENERIC config.
Supported platform are listed in soc_family enum.
struct decode_win_spec contains platform specific functions and constants.
Function mv_check_soc_family checks SoC type and chooses proper structure
in runtime, as well as platform-dependent functions.
Unnecessary dummy functions are removed.
Because of changing registers name to more generic new definition of
FDT_DEVMAP_MAX in mv_machdep is added.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14738
2018-04-03 21:54:36 +00:00
Marcin Wojtas
afcad11eb6 Make validation in Marvell mv_common.c generic
Validate only drivers used by given platform.
Pointers to validation function
are added to soc_node_spec structure.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14737
2018-04-03 21:46:28 +00:00
Marcin Wojtas
0a57279ba4 Split get_sar_value function for Marvell ArmadaXP and Armada38X
get_sar_value is implemented only for ArmadaXP and Armada38X. Splitting it for
two different functions and change registers names result in more generic code.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14736
2018-04-03 21:38:11 +00:00
Marcin Wojtas
fefc2cf777 Make Marvell mv_pci.c driver generic
PCI ports differ between Marvell SoCs, but have the same compatible in FDT.
Identification is made based on parent compatible during attach.
For ArmadaXP skipping enable procedure is necessary. To achieve it
sc_skip_enable_procedure flag is used.
For Armada38x find root procedure is necessary. For other SoCs root link is
always at slot 0. sc_enable_find_root_slot flag is used to select proper
behaviour.
Marvell armv5 platforms does not support msi.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14735
2018-04-03 21:25:15 +00:00
Marcin Wojtas
244af1d4db Enable ArmadaXP using INTRNG interrupt controller
Defining INTRNG remove some necessary registers and declarations of
pic_init_secondary, pic_ipi_send, pic_ipi_read and pic_ipi_clear.
Because Marvell ArmadaXP and Armada38X always use INTRNG, include all
INTRNG code and remove code that does not use it.
Separate pic registers declarations for Armada38X are unnecessary, it
works properly with ArmadaXP config.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14734
2018-04-03 21:17:19 +00:00
Andrew Turner
7bc28467ef Switch users of fdt_is_enabled to use ofw_bus_node_status_okay. These are
equivalent, so to prepare to remove the former move users to call the
latter.

Sponsored by:	DARPA, AFRL
2018-04-03 11:01:50 +00:00
Oleksandr Tymoshenko
108117cc22 [ofw] fix errneous checks for OF_finddevice(9) return value
OF_finddevices returns ((phandle_t)-1) in case of failure. Some code
in existing drivers checked return value to be equal to 0 or
less/equal to 0 which is also wrong because phandle_t is unsigned
type. Most of these checks were for negative cases that were never
triggered so trhere was no impact on functionality.

Reviewed by:	nwhitehorn
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D14645
2018-03-20 00:03:49 +00:00
Ruslan Bukin
5823f6fb29 o Move sdhci_fdt to the generic files list.
o Include Qualcomm EHCI and UART drivers to the build.

Sponsored by:	DARPA, AFRL
2018-01-25 17:16:29 +00:00
Colin Percival
d5d7606c0c Use the TSLOG framework to record entry/exit timestamps for DELAY and
_vprintf; these functions are called in many places and can contribute
meaningfully to the total time spent booting.
2017-12-31 09:24:41 +00:00
Ian Lepore
2d09b07279 Make kernel option KERNVIRTADDR optional, remove it from std.<platform>
files that can use the default value.

It used to be required that the low-order bits of KERNVIRTADDR matched
the low-order bits of the physical load address for all arm platforms.
That hasn't been a requirement for armv6 platforms since FreeBSD 10.
There is no longer any relationship between load addr and KERNVIRTADDR
except that both must be aligned to a 2 MiB boundary.

This change makes the default KERNVIRTADDR value 0xc0000000, and removes the
options from all the platforms that can use the default value.  The default
is now defined in vmparam.h, and that file is now included in a few new
places that reference KERNVIRTADDR, since it may not come in via the
forced-include of opt_global.h on the compile command line.
2017-12-30 00:20:49 +00:00