Commit Graph

51 Commits

Author SHA1 Message Date
Anton Berezin
32aa5f0e3e Recognize D-Link DGE-528(T) Gigabit as an re(4) device.
Submitted by:	Andrus Nomm <andrus@members.ee>
PR:		76780
MFC After:	1 week
2005-08-05 08:19:12 +00:00
Brooks Davis
fc74a9f93a Stop embedding struct ifnet at the top of driver softcs. Instead the
struct ifnet or the layer 2 common structure it was embedded in have
been replaced with a struct ifnet pointer to be filled by a call to the
new function, if_alloc(). The layer 2 common structure is also allocated
via if_alloc() based on the interface type. It is hung off the new
struct ifnet member, if_l2com.

This change removes the size of these structures from the kernel ABI and
will allow us to better manage them as interfaces come and go.

Other changes of note:
 - Struct arpcom is no longer referenced in normal interface code.
   Instead the Ethernet address is accessed via the IFP2ENADDR() macro.
   To enforce this ac_enaddr has been renamed to _ac_enaddr.
 - The second argument to ether_ifattach is now always the mac address
   from driver private storage rather than sometimes being ac_enaddr.

Reviewed by:	sobomax, sam
2005-06-10 16:49:24 +00:00
Warner Losh
5fb99dcabe Bring in support for SUGOI LAN GIGA NIC made by System TALKS, Inc from
a RealTek 8169SB.

PR: 74262
Submitted by: Yoshikazu GOTO-san

# Submitter notes that he's unsure of the revision string for 8169SB
2005-01-22 22:40:53 +00:00
Warner Losh
60727d8b86 /* -> /*- for license, minor formatting changes 2005-01-07 02:29:27 +00:00
John-Mark Gurney
22a11c9657 fix jumbo frames as much as they can be fixed for re. We now cap the MTU
to 7422 since it appears that the 8169S can't transmit anything larger..
The 8169S can receive full jumbo frames, but we don't have an mru to let
the upper layers know this...

add fixup so that this driver should work on alignment constrained platforms
(!i386 && !amd64)

MFC after:	5 days
2004-09-28 18:22:24 +00:00
John-Mark Gurney
81d4eca1ef fix misspelling of TX...
Submitted by:	Johan Karlsson
MFC after:	3 days
2004-09-19 18:16:28 +00:00
John-Mark Gurney
efefe913d2 comment requirement that rx/tx descriptor counts must be equal due to
shared code...
define rx descriptor count in terms of tx
align defines

MFC after:	3 days
2004-09-19 17:45:56 +00:00
MIHIRA Sanpei Yoshiro
ea263191fd Add support Corega CG-LAPCIGT Gigabit Ethernet(8169S)
PR:		[FreeBSD-users-jp 80667]
Submitted by:	FUJIMOTO Kou <fujimoto@j.dendai.ac.jp>
MFC after:	1 week
2004-08-28 10:59:02 +00:00
Bruce M Simpson
573eefe98f style(9) and whitespace cleanup.
Use C99 types. Use ANSI function definitions. Sort prototypes.
Split long lines correctly. Punctuate/wordsmith comments.
Use device_printf()/if_printf() where possible.

Reviewed by:	-net (silence)
2004-07-05 02:46:42 +00:00
Warner Losh
c3e7434f34 Remove burn bridges code that saved/restored the pci config registers
that are now handled in the pci bus layer.  They are no longer
necessary.
2004-06-28 20:07:03 +00:00
John Baldwin
9930009eb6 Wrap the code to save/restore PCI config registers on suspend/resume in
#ifndef BURN_BRIDGES.

Noticed by:	phk
2004-05-24 19:39:23 +00:00
Sam Leffler
5120abbfb4 Drop the driver lock around calls to if_input to avoid a LOR when
the packets are immediately returned for sending (e.g.  when bridging
or packet forwarding).  There are more efficient ways to do this
but for now use the least intrusive approach.

Reviewed by:	imp, rwatson
2003-11-14 19:00:32 +00:00
Bill Paul
6110675fd6 Remove jumbo buffer #defines that I ended up not needing. 2003-09-19 02:35:03 +00:00
Bill Paul
c2c6548b3a Teach the re(4) driver about the CFG2 register, which tells us whether
we're on a 32-bit/64-bit bus or not. Use this to decide if we should
set the PCI dual-address cycle enable bit in the C+ command register.
(Enabling DAC on a 32-bit bus seems to do bad things.)

Also, initialize the C+ command register early in the re_init() routine.
The documentation says this register should be configured first.
2003-09-13 23:51:35 +00:00
Bill Paul
abc8ff44d3 - For the 8169 chips, read the station address by forcing an EEPROM
autoload and then copying the contends of the station address
  registers. For some reason, reading the EEPROM on the 8169S doesn't
  work right. This gets around the problem, and allows us to read
  the station address correctly on the 8169S.

- Insert a delay after initiating packet transmition in re_diag() to
  allow lots of time for the frame to echo back to the host, and wait
  for both the 'RX complete' and 'timeout expired' bits in the ISR
  register to be set.

- Deal more intelligently with the fact that the frame length
  field in the RX descriptor is a different width on the 8139C+
  than it is on the 8169/8169S/8110S

- For the 8169, you have to set bit 17 in the TX config register
  to enter digital loopback mode, but for the 8139C+, you have to
  set both bits 17 and 18. Take this into account so that re_diag()
  works properly for both types of chips.
2003-09-11 06:56:46 +00:00
Bill Paul
9bac70b851 Add a PHY driver to support the built-in gigE PHY in the 8169S/8110S
ethernet chips. This driver is pretty simple, however it contains
special DSP initialization code which is needed in order to get
the chip to negotiate a gigE link. (This special initialization
may not be needed in subsequent chip revs.) Also:

- Fix typo in if_rlreg.h (RL_GMEDIASTAT_1000MPS -> RL_GMEDIASTAT_1000MBPS)

- Deal with shared interrupts in re_intr(): if interface isn't up,
  return.

- Fix another bug in re_gmii_writereg() (properly apply data field mask)

- Allow PHY driver to read the RL_GMEDIASTAT register via the
  re_gmii_readreg() register (this is register needed to determine
  real time link/media status).
2003-09-11 03:53:46 +00:00
Bill Paul
69a6b7fb50 Update hardware revision table. 0x04000000 appears to be the revision
for the 8169S, according to my sample board. The RealTek Linux driver
mentions 0x00800000. I'm assigning this to the 8110S until I get
more info on it. (The (preliminary) RealTek docs only say that 8169S/8110S
chips will have some combination of those two bits set, but doesn't say
exactly what bit combination goes with which chip variant.)
2003-09-10 07:21:43 +00:00
Bill Paul
a94100fa9b Take the support for the 8139C+/8169/8169S/8110S chips out of the
rl(4) driver and put it in a new re(4) driver. The re(4) driver shares
the if_rlreg.h file with rl(4) but is a separate module. (Ultimately
I may change this. For now, it's convenient.)

rl(4) has been modified so that it will never attach to an 8139C+
chip, leaving it to re(4) instead. Only re(4) has the PCI IDs to
match the 8169/8169S/8110S gigE chips. if_re.c contains the same
basic code that was originally bolted onto if_rl.c, with the
following updates:

- Added support for jumbo frames. Currently, there seems to be
  a limit of approximately 6200 bytes for jumbo frames on transmit.
  (This was determined via experimentation.) The 8169S/8110S chips
  apparently are limited to 7.5K frames on transmit. This may require
  some more work, though the framework to handle jumbo frames on RX
  is in place: the re_rxeof() routine will gather up frames than span
  multiple 2K clusters into a single mbuf list.

- Fixed bug in re_txeof(): if we reap some of the TX buffers,
  but there are still some pending, re-arm the timer before exiting
  re_txeof() so that another timeout interrupt will be generated, just
  in case re_start() doesn't do it for us.

- Handle the 'link state changed' interrupt

- Fix a detach bug. If re(4) is loaded as a module, and you do
  tcpdump -i re0, then you do 'kldunload if_re,' the system will
  panic after a few seconds. This happens because ether_ifdetach()
  ends up calling the BPF detach code, which notices the interface
  is in promiscuous mode and tries to switch promisc mode off while
  detaching the BPF listner. This ultimately results in a call
  to re_ioctl() (due to SIOCSIFFLAGS), which in turn calls re_init()
  to handle the IFF_PROMISC flag change. Unfortunately, calling re_init()
  here turns the chip back on and restarts the 1-second timeout loop
  that drives re_tick(). By the time the timeout fires, if_re.ko
  has been unloaded, which results in a call to invalid code and
  blows up the system.

  To fix this, I cleared the IFF_UP flag before calling ether_ifdetach(),
  which stops the ioctl routine from trying to reset the chip.

- Modified comments in re_rxeof() relating to the difference in
  RX descriptor status bit layout between the 8139C+ and the gigE
  chips. The layout is different because the frame length field
  was expanded from 12 bits to 13, and they got rid of one of the
  status bits to make room.

- Add diagnostic code (re_diag()) to test for the case where a user
  has installed a broken 32-bit 8169 PCI NIC in a 64-bit slot. Some
  NICs have the REQ64# and ACK64# lines connected even though the
  board is 32-bit only (in this case, they should be pulled high).
  This fools the chip into doing 64-bit DMA transfers even though
  there is no 64-bit data path. To detect this, re_diag() puts the
  chip into digital loopback mode and sets the receiver to promiscuous
  mode, then initiates a single 64-byte packet transmission. The
  frame is echoed back to the host, and if the frame contents are
  intact, we know DMA is working correctly, otherwise we complain
  loudly on the console and abort the device attach. (At the moment,
  I don't know of any way to work around the problem other than
  physically modifying the board, so until/unless I can think of a
  software workaround, this will have do to.)

- Created re(4) man page

- Modified rlphy.c to allow re(4) to attach as well as rl(4).

Note that this code works for the sample 8169/Marvell 88E1000 NIC
that I have, but probably won't work for the 8169S/8110S chips.
RealTek has sent me some sample NICs, but they haven't arrived yet.
I will probably need to add an rlgphy driver to handle the on-board
PHY in the 8169S/8110S (it needs special DSP initialization).
2003-09-08 02:11:25 +00:00
Thomas Moestl
eec804bbb8 Use stream bus space accesses to program the ID (station address)
registers; otherwise, the byte order of the address is changed on
big-endian machines.
2003-09-04 15:39:44 +00:00
Bill Paul
51e110b154 Argh. Last commit only had the __FBSDID() fix. Really add the device ID
for the 8100 this time.
2003-08-15 22:47:55 +00:00
Bill Paul
f3300b2f0b Set the TX hardware checksum offload bits on all the descriptors of a
multi-fragment transmission. I'm not sure if this is a bug or a requirement
that I overlooked with going through the documentation, but the sample
8169 NIC that I have seems to require it at least some of the time or
else it botches TCP checksums on segments that span multiple descriptors.
2003-08-13 22:39:21 +00:00
Bill Paul
f6bb113e42 - Update some comments regarding hardware details of the 8169 and
note the existence of the 8169S and 8110S components. (The 8169
  is just a MAC, the 8169S and 8110S contain both a MAC and PHY.)

- Properly handle list and buffer addresses as 64-bit. The RX and
  TX DMA list addresses should be bus_addr_t's. Added RL_ADDR_HI()
  and RL_ADDR_LO() macros to obtain values for writing into chip
  registers.

- Set a slightly different TIMERINT value for 8169 NICs for improved
  performance.

- Change left out of previous commit log: added some additional
  hardware rev codes for other 10/100 chips and for the 8169S/8110S
  'rev C' gigE MACs.
2003-08-10 01:41:35 +00:00
Bill Paul
554e54b5de Add preliminary support for the RealTek 8169 gigE chip. Changes:
- Fix a bug in rl_dma_map_desc(): set the 'end of ring' bit in the
  right descriptor (DESC_CNT - 1, not DESC_CNT). The 8139C+ is limited
  to 64 descriptors and automatically wraps at 64 descriptors even
  if the EOR bit isn't set, but the 8169 NIC can have up to 1024
  descriptors per ring, so we must set the wrap point in the right
  place.

- RealTek moved the RL_TIMERINT register from offset 0x54 to 0x58 in
  the 8169 -- account for this.

- Added rl_gmii_readreg() and rl_gmii_writereg() routines.

- Fix rl_probe() to deal with the case where the base type is
  not RL_8139.

The next step is to add jumbo buffer support.

Tested with the Xterasys XN-152 NIC (hard to beat $29 for a gigE NIC).
2003-08-07 07:00:30 +00:00
Bill Paul
96fd5c300d Add support for the 8139C+ chipset. Unlike the other chips in the 8139
series, the 8139C+ has a descriptor-based DMA mechanism, and its
performance is actually pretty respectable. Note: the 8139D chip does
not support C+ mode. Only the 8139C+ and 8169 gigE chips support C+ mode.

Supported features:

- RX and TX checksum offload
- hardware VLAN tag insertion/extraction
- TX interrupt moderation using the 8139's on-board timer

Everything should be properly busdma'ed and endian-independent, so
things should work ok on non-x86 platforms. Unfortunately, my call
for testers on this code was met with deafening silence, and I don't
have access to any non-x86 FreeBSD boxes at the moment, so this is
speculation.

The device detection code has been cleaned up a little as well
(thanks to Michal Mertl) for the patches.

There are also updates to the rl(4) man page (which I accidentally
checked in before when I updated the dc(4) man page. Oops.)

Todo: finish support for the 8169 gigabit ethernet chip. This
mainly requires writing an rlgphy driver to handle the 8169's built-in
PHY. This will have to wait until I actually get my hands on an 8169
card for testing though. (I still can't find a source for one in the
U.S. Suggestions/pointers welcome.)
2003-07-10 20:38:48 +00:00
MIHIRA Sanpei Yoshiro
1017eea32d Add support for Planex FNW-3800-TX(CardBus 100M/10M).
Submitted by:	Kunihiro Arai <araik@attglobal.net>
Obtained from:	[bsd-nomads:16625]
2003-03-18 14:57:09 +00:00
Dan Moschuk
25b803ef49 Add support for Peppercon ROL-F Card.
Submitted by: Sascha Holzeiter <sascha@root-login.org>
PR: 48559
2003-02-23 23:35:35 +00:00
MIHIRA Sanpei Yoshiro
fe41c67cfc Add support for Corega FEtherII CB-TXD (CardBus 100M/10M).
Fix typo (Coreaga->Corega)
2003-01-11 07:10:35 +00:00
Mitsuru IWASAKI
efd1491c3f Add support for Corega FEther CB-TXD (CardBus 100M/10M). 2002-09-06 16:38:06 +00:00
John Baldwin
d204693572 Add support for the D-Link DFE-690TXD Cardbus card which has a RealTek 8139
with its own PCI ID.
2002-05-06 13:43:00 +00:00
Luigi Rizzo
7632341a30 Add DEVICE_POLLING support to the "rl" driver.
The diffs are very similar to the ones for the "sis" driver.

MFC After: 5 days
2002-04-16 22:03:14 +00:00
Bill Paul
9a29439fb9 Nortel Networks sells a RealTek 8139-based NIC that's basically
the same thing as the SMC 1211, but with their own vendor ID.
Update the device list to support this NIC. (Discovered these
cards lying around the lab at work.)
2002-04-11 06:12:51 +00:00
Mitsuru IWASAKI
0c66d318dd Add suspend/resume code mostly merged from fxp driver. 2001-11-23 14:27:33 +00:00
Bill Paul
0219a42155 Convert the if_sis and if_rl drivers to use the bus_dma API instead of
calling vtophys() and contigmalloc()/contigfree() directly. Hopefully,
I have shaken out all of the problems with busdma on the alpha now.
(Everything seems to work as expected.)

Also, change the max RX DMA limit to 1024 bytes instead of "unlimited,"
as the latter seems not to work correctly on the alpha that I tested.
(At 100Mbps, all attempts to receive frames yield RX errors.)
2001-08-15 17:38:43 +00:00
Bill Paul
07f65363cd Big round of minor updates:
- Use pci_get_powerstate()/pci_set_powerstate() in all the other drivers
  that need them so we don't have to fiddle with the PCI power management
  registers directly.
- Use pci_enable_busmaster()/pci_enable_io() to turn on busmastering and
  PIO/memory mapped accesses.
- Add support to the RealTek driver for the D-Link DFE-530TX+ which has
  a RealTek 8139 with its own PCI ID. (Submitted by Jason Wright)
- Have the SiS 900/National DP83815 driver be sure to disable PME
  mode in sis_reset(). This apparently fixes a problem on some
  motherboards where the DP83815 chip fails to receive packets.
  (Submitted by Chuck McCrobie <mccrobie@cablespeed.com>)
2001-02-21 20:54:22 +00:00
Bosko Milekic
9ed346bab0 Change and clean the mutex lock interface.
mtx_enter(lock, type) becomes:

mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks)
mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized)

similarily, for releasing a lock, we now have:

mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN.
We change the caller interface for the two different types of locks
because the semantics are entirely different for each case, and this
makes it explicitly clear and, at the same time, it rids us of the
extra `type' argument.

The enter->lock and exit->unlock change has been made with the idea
that we're "locking data" and not "entering locked code" in mind.

Further, remove all additional "flags" previously passed to the
lock acquire/release routines with the exception of two:

MTX_QUIET and MTX_NOSWITCH

The functionality of these flags is preserved and they can be passed
to the lock/unlock routines by calling the corresponding wrappers:

mtx_{lock, unlock}_flags(lock, flag(s)) and
mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN
locks, respectively.

Re-inline some lock acq/rel code; in the sleep lock case, we only
inline the _obtain_lock()s in order to ensure that the inlined code
fits into a cache line. In the spin lock case, we inline recursion and
actually only perform a function call if we need to spin. This change
has been made with the idea that we generally tend to avoid spin locks
and that also the spin locks that we do have and are heavily used
(i.e. sched_lock) do recurse, and therefore in an effort to reduce
function call overhead for some architectures (such as alpha), we
inline recursion for this case.

Create a new malloc type for the witness code and retire from using
the M_DEV type. The new type is called M_WITNESS and is only declared
if WITNESS is enabled.

Begin cleaning up some machdep/mutex.h code - specifically updated the
"optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN
and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently
need those.

Finally, caught up to the interface changes in all sys code.

Contributors: jake, jhb, jasone (in no particular order)
2001-02-09 06:11:45 +00:00
Bill Paul
78d2de28df Fix support for cardbus cards:
- Add DRIVER_MODULE() declaration to make this driver a
	  child of cardbus
	- Handle different width EEPROMs

The CIS parser still barfs when scanning this card, but it seems to
probe/attach correctly anyway. I can't do a traffic test just yet
since I don't have a proper crossover cable handy.
2000-10-30 07:54:38 +00:00
Bill Paul
1d5e53109c Add PCI IDs for some additional cardbus cards. Yes, there really is
a RealTek 8139 cardbus device. Unfortunately it doesn't quite work yet
because the CIS parser barfs on it.

Submitted by msmith, with some small tweaks by me.
2000-10-28 09:00:20 +00:00
Bill Paul
d1ce910572 First round of converting network drivers from spls to mutexes. This
takes care of all the 10/100 and gigE PCI drivers that I've done.
Next will be the wireless drivers, then the USB ones. I may pick up
some stragglers along the way. I'm sort of playing this by ear: if
anyone spots any places where I've screwed up horribly, please let me
know.
2000-10-13 17:54:19 +00:00
Bill Paul
11ad85d1f5 Make some tweaks to the RealTek driver:
- Fix a bug in rl_rxeof() handler: in the case where the packet wraps
  from the end of the receive buffer back to the beginning, we need to
  insure that at least sizeof(ether_header) bytes make it into the first
  mbuf. If we don't, then doing eh = mtod(m, struct ether_header *)
  loses. To avoid this, we use m_pullup() to suck at least MHLEN -
  RL_ETHER_ALIGN bytes into the first mbuf, which should also help
  small packets fit into a single mbuf.

  Pointed out by: Philip A. Prindeville <philipp@zembu.com>

- Make the transmit threshold autotuning: start off with a small value
  and jack it up when TX underruns are detected.

- Also improve TX error recovery: kick the chip in the head with a
  reset/init sequence to make sure it recovers afer a transmit error.
1999-10-21 19:42:03 +00:00
Bill Paul
59519ca74f Convert the RealTek 8139 driver to newbus and miibus in one swell foop.
Also set it up to be compiled as a module.
1999-08-31 14:45:51 +00:00
Peter Wemm
c3aac50f28 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
Bill Paul
a7b114407f Fix power management register definitions. 1999-08-21 01:10:45 +00:00
Bill Paul
7ad5b08ab3 Remove the definitions for the SiS 900 chip. This is not a RealTek
clone after all. I have the datasheets for this part; hopefully I can
write a proper driver soon.
1999-07-22 20:56:49 +00:00
Bill Paul
c9c4bee48c Tweak FIFO and DMA thresholds to improve performance and reduce likelyhood
of RX FIFO overruns.

Submitted by: bde
1999-06-20 18:56:09 +00:00
Bill Paul
19e7516669 Fix up the RealTek 8139 driver to work on FreeBSD/alpha. This involves a
few changes:

- there was a bug in rl_list_tx_init(): it was calculating the registers
  to initialize incorrectly. Not a problem on the x86 where unaligned
  access are allowed, but a problem on the alpha.

- set rl_btag accordingly depending on the machine type

- rl_rxeof() needs to be sure to longword-align the packet data. This
  is a little tricky since we copy the data out of the receive buffer
  using m_devget(), however there's no way to tell m_devget() to fill
  in the mbufs starting at a particular offset. To get around this,
  we tell m_devget to copy bytes+2 bytes starting at offset offset-2. This
  results in the proper alignment, and we can trim off the two leading
  bytes afterwards with m_adj(). We also allocate some extra space before
  the start of the receive buffer so that we don't get into trouble in
  the case where offset == 0.

- redefine vtophys() in if_rlreg.h for the alpha.

Making this chipset work on the alpha is sort of the inverse of putting
a jet engine on a rowboat (putting a propeller on a 747?) but when
you can get these things for $5 a pop, it's hard to stop people from
buying them.
1999-06-19 20:17:38 +00:00
Bill Paul
c008dec8df Add support for SiS 900 chipset (PCI ID 0x1039/0x0900), which appears to
be yet another rebadged RealTek 8139.
1999-05-30 18:55:20 +00:00
Bill Paul
ea716519f5 Merge in some updates for the RealTek driver, mainly:
- Rewrite the transmit section to be a little less bogus.
- Set ifq_maxlen correctly. RL_TX_LIST_CNT - 1 is wrong, because for the
  RealTek, RL_TX_LIST_CNT is 4. Set it to IFQ_MAXLEN instead.
1999-04-12 21:37:00 +00:00
Bill Paul
141ae16656 Add support for still more cheapo 10/100 cards: Delta Electronics and
Addtron appear to have their own VIA Rhine II and RealTek 8139 boards
with custom PCI vendor and device IDs. This commit updates the PCI
vendor and device lists in the vr and rl drivers so that we can probe
the additional devices.

Found by: nosing around the PCI vendor and device code list at:
	http://www.halcyon.com/scripts/jboemler/pci/pcicode
1999-02-23 15:38:25 +00:00
Bill Paul
989c9647f2 if_rl.c: make a small tweak to properly handle the Accton MPX 5030/5038
as a RealTek 8139
if_rlreg.h: use bus_space_read_X() in CSR_READ_X() macros instead of
            directly calling inb()/outb() etc...
rl.4 + RELNOTES.TXT: mention that SMC EtherEZ PCI 1211-TX is supported
                     by the RealTek driver
1998-12-07 00:35:06 +00:00
Bill Paul
552a0ec7c3 The Accton 1207D adapter uses a chip called the MXP 5030 (or 5038)
which is either a RealTek 8139 in disguise or a RealTek workalike.
This commit fixes the PCI vendor/device ID for this device
and updates the description string to reflect the actual identity
of the device.

I also changed the transmit encapsulation routine to always to
buffer copies on transmit. We end up doing this 99% of the time
anyway. I also tweaked the code that pads packets out to the minimum
length (60) bytes. I was fixing up the m_pkthdr.len value but not
m_len. I don't think this makes that much difference in the grand
scheme of things, but it makes me feel better.
1998-11-18 21:03:58 +00:00