Commit Graph

149070 Commits

Author SHA1 Message Date
Warner Losh
ec55ba21ce use ta0-ta3 rather than t4-t7 for n32/n64 goodness. 2009-07-10 19:04:32 +00:00
Warner Losh
2b455bd196 quick hack for the problem gonzo is seeing. 2009-07-10 18:24:02 +00:00
Warner Losh
6fb8bbf5c1 Add in the emulation selection when linking... We're still not 100%
of the way there, but we're better with it.  hack.so build now, but
we die when we try to link it in.
2009-07-10 07:21:26 +00:00
Warner Losh
9690fcee63 Properly size things for n64 builds. 2009-07-10 07:20:07 +00:00
Warner Losh
f0bb71694b Flag this as a 64-bit build.
# Too many flagas needed to build 64-bit, plus different endian, etc.  The
# makefile is getting kinda gross with ifdefs.
2009-07-10 07:19:30 +00:00
Warner Losh
fc6d784068 Always build all 4 emulators into the mips toolchain.
# I think we have a gcc spec file issue with abi=64 since I have to do other
# hacks to get it mostly kinda right.
2009-07-10 07:18:30 +00:00
Oleksandr Tymoshenko
4bdb59f342 - Add AR71XX watchdog timer driver 2009-07-09 20:16:01 +00:00
Oleksandr Tymoshenko
61bfa4ba5d - Move CPU/AHB frequency calculations to functions to
prevent code duplication
2009-07-09 20:11:26 +00:00
Oleksandr Tymoshenko
6adaa2749f - Ooops, this debug code wasn't supposed to get into
final commit. My appologises.
2009-07-09 19:02:17 +00:00
Warner Losh
e4bd1497e0 Add support for compiling MALTA as mips64.
# MALTA64 builds, but doesn't link yet.
2009-07-09 15:05:50 +00:00
Warner Losh
f332352453 Don't force ISA_MIPS32. 2009-07-09 15:04:52 +00:00
Warner Losh
aacc46585b Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
2009-07-09 15:04:24 +00:00
Warner Losh
93b7e55647 Addresses should be unsigned long. Make the address constants
unsigned long.
2009-07-09 14:54:09 +00:00
Oleksandr Tymoshenko
258430ffd1 - Port busdma code from FreeBSD/arm. This is more mature version
that takes into account all limitation to DMA memory (boundaries,
    alignment) and implements bounce pages.
- Add BUS_DMASYNC_POSTREAD case to bus_dmamap_sync_buf
2009-07-08 22:28:36 +00:00
Oleksandr Tymoshenko
63080dcd94 - Fix PCI routing code 2009-07-08 17:20:53 +00:00
Warner Losh
5ac0137013 Fix atomic_store_64 prototype for 64-bit systems. 2009-07-08 06:01:37 +00:00
Warner Losh
902598a268 Turns out this code was right, revert last change. 2009-07-08 06:00:18 +00:00
Warner Losh
59e5dff794 The kernel isn't quite ready for this to be optional... 2009-07-08 05:57:58 +00:00
Oleksandr Tymoshenko
41d99511cb - Fix off-by-one bug in arge_fixup_rx. If mbuf is located
by the end of the page and even number of bytes long,
    that may cause TLBMiss exception for unallocated address.
- Fix mess with DMA sync opeartions
2009-07-08 02:21:08 +00:00
Oleksandr Tymoshenko
b661054728 - Move dpcpu initialization to mips_proc0_init. It's
more appropriate place for it. Besides dpcpu_init
    requires pmap module to be initialized and calling it
    int pmap.c hangs the system
2009-07-07 19:55:09 +00:00
Warner Losh
4d33e6554c 64-bit fixes: fix printf formats and prefer MIPS_PHYS_TO_KSEG0. 2009-07-06 18:18:27 +00:00
Warner Losh
a371f04d66 GC some now-unused items. Fix for 64-bit build. Note: this breaks
the 32-bit build (which we're not computing correctly anyway).
2009-07-06 18:17:48 +00:00
Warner Losh
4df29a25aa 64-bit fixes:
(1) fix printf formats.
(2) Prefer FreeBSD's MIPS_PHYS_TO_KSEG0 to hand-rolled one from Cavium.
(3) Mark a few 64-bit cleanliness issues (possible).
(4) Minor formatting fixes.
2009-07-06 18:15:57 +00:00
Warner Losh
9d7dcb83db Minor fixes to printf formats. 2009-07-06 18:12:49 +00:00
Warner Losh
a01f85e046 Only build qdivrem on 32-bit ISA...
# not sure this is the right selector...
2009-07-06 08:16:25 +00:00
Warner Losh
e0dab9bcb8 Be more pedantic here. If we're going to shift something
sizeof(long)*8 / 2 bits, then we better make sure we're shifting a
long that much, not an int.

# I'm surprised this is code would have a bug this basic.
2009-07-06 08:00:26 +00:00
Warner Losh
4b9aa0a973 Prefer uintptr_t to int cast here. 2009-07-06 07:49:24 +00:00
Warner Losh
26b14c6dde Better types for 64-bit compatibility. Use %p and cast to void * and
prefer uintptr_t to other int-type casts.
2009-07-06 07:48:31 +00:00
Warner Losh
f548109087 No need to force mips32 here. 2009-07-06 07:47:39 +00:00
Warner Losh
025e48c64c Pass in the uint64 value, rather than a pointer to it. that's what
the function expects...
2009-07-06 07:46:13 +00:00
Warner Losh
e3c2111d5c Use ta0 instead of t4 and ta1 instead of t5. These map to the same
registers on O32 builds, but t4 and t5 don't exist on N32 or N64.
2009-07-06 07:45:02 +00:00
Warner Losh
10c8cc2b9f Use better casts for passing the small integer as a pointer here.
Basically, replace int with uintptr_t.
2009-07-06 07:43:50 +00:00
Warner Losh
243ab23fcf (1) Improvements for SB1. only allow real memory to be accessed.
(2) make compile n64 by using more-proper casts.

Submitted by:	Neelkanth Natu (1)
2009-07-06 07:42:54 +00:00
Warner Losh
b04ad5dd49 The MCOUNT macro isn't going to work in 64-bit mode. Add a note to
this effect.
2009-07-06 02:27:03 +00:00
Warner Losh
2967976763 Provide a macro for PTR_ADDU as well. We may need to implement this
differently for N32...  Use PTR_ADDU in DO_AST macro.
2009-07-06 02:22:51 +00:00
Warner Losh
54d05c03e5 Change the addu here to daddu.
addu paranoina prodded by: jmallet@
2009-07-06 02:22:06 +00:00
Warner Losh
3eecc82e89 addu and subu are special. We need to use daddu and dsubu here to get
proper behavior.

Submitted by:	jmallet@
2009-07-05 21:16:26 +00:00
Warner Losh
ece5503dbe (1) Use PTR_LA rather than bare la for N64 goodness (it is dla there)
(2) SB1 needs COHERENT policy, not cached for the config register

Submitted by:	(2) Neelkanth Natu
2009-07-05 15:23:54 +00:00
Warner Losh
4f4793e605 use "PTR_LA" in preference to a bare la so it translates to dla on
64-bit ABIs.
2009-07-05 15:22:22 +00:00
Warner Losh
add6da074c Now that we define atomic_{load,store}_64 inline in atomic.h, we don't
need to define them here for the !N64 case.

We now define atomic_readandclear_64 in atomic.h, so no need to repeat
it here.
2009-07-05 15:21:35 +00:00
Warner Losh
bd34d48210 The SB1 has cohernet memory, so add it.
Also, Maxmem is better as a long.

Submitted by:	Neelkanth Natu
2009-07-05 15:20:16 +00:00
Warner Losh
46d854bbdb The SB1 needs a special value for the cache field of the pte.
Submitted by:	Neelkanth Natu
2009-07-05 15:19:28 +00:00
Warner Losh
72322b2318 compute the areas to save registers in for 64-bit access correctly. 2009-07-05 15:18:06 +00:00
Warner Losh
f8b89abb9d First cut at 64-bit types. not 100% sure these are all correct for
N32 ABI.
2009-07-05 15:17:11 +00:00
Warner Losh
8de20ddba8 Trim unreferenced goo. SDRAM likely should be next, but it is still
referenced.
2009-07-05 15:16:27 +00:00
Warner Losh
61a1eed0b4 First cut at atomics for 64-bit machines and SMP machines.
# Note: Cavium provided a port that has atomics similar to these, but
# that does a syncw; sync; atomic; sync; syncw where we just do the classic
# mips 'atomic' operation (eg ll; frob; sc).  It is unclear to me why
# the extra is needed.  Since my initial target is one core, I'll defer
# investigation until I bring up multiple cores.  syncw is an octeon specific
# instruction.
2009-07-05 15:13:24 +00:00
Warner Losh
753b803f71 use %p in preference to 0x%08x for printing register_t values. Cast
them to void * first.  This neatly solves the "how do I print a
register_t" problem because sizeof(void *) is always the same as
sizeof(register_t), afaik.
2009-07-05 15:10:07 +00:00
Warner Losh
2d3c40cf49 Add config file for SWARM board, a sybyte SB-1-based board by
Broadcom.  BCM-91250.

Submitted by:	Neelkanth Natu
2009-07-05 08:40:26 +00:00
Warner Losh
24646e120c Bring in cdefs.h from NetBSD to define ABI goo.
Obtained from:	NetBSD
2009-07-05 08:14:00 +00:00
Warner Losh
0d978536b2 Pull in machine/cdefs.h for the ABI definitions. Provide a PTR_LA,
ala sgi, and use it in preference to a bare 'la' so that it gets
translated to a 'dla' for the 64-bit pointer ABIs.
2009-07-05 08:13:19 +00:00