1595 Commits

Author SHA1 Message Date
Warner Losh
f589a026d5 Move to using a flag instead of checking the CPU type each
transaction for the MCI1 rev 2.x write workarounds.
2012-08-28 03:46:31 +00:00
Warner Losh
c35e1c5bbc Style: Move these routines to be before the forward declared functions
as is the normal practice.
2012-08-28 03:27:48 +00:00
Warner Losh
0f30f5d36b Bring in the multi-block patches for mci. These required extensive
restructuring of the driver.  I've tried to preserve the other silicon
workarounds that we've added over the years, but haven't had a chance
to extensively test on other hardware.  On my AT91RM9200 with 30MHz/1
wire/64 block transfers, I've been able to go from ~.66MB/s to
2.25MB/s in the simple tests I performed, almost a 3.5x improvement.
This cuts the boot time almost in half when everything else goes
right (timed from rtc message to login: prompt).

PR:		155214
Submitted by:	Ian Lapore
2012-08-28 01:28:52 +00:00
Tim Kientzle
0be65db279 Correctly fetch the MAC address.
Break down the bytes directly into the softc;
the intermediate buffer isn't needed here.
Break down the bytes in the correct order.
2012-08-27 04:43:30 +00:00
Warner Losh
bb6e4fd030 Add hint and sysctl support for 4 wire mode.
PR:		155241
Submitted by:	Ian Lapore
2012-08-27 04:30:53 +00:00
Warner Losh
f535f4234a Minor style(9) nit. 2012-08-27 04:08:43 +00:00
Warner Losh
b8e36ef7e0 Don't puprosely overclock the SD bus to 30MHz, make the user
explicltly enable that.  The driver chose to use 60MHz / 2 (30MHz)
most of the time rather than 60MHz / 4 (15MHz) based on the Linux
driver of the time.  This pushes the spec a little in order to not
suffer the penalty of running at 15MHz.  However, when other bus
masters are active in the system, and the user tries 4-wire mode, the
internal bus arbitration would fail with data loss as a result.

# Comments from PR were reworked to reflect my historical perspective

PR:		155214 (partial)
Submitted by:	Ian Lepore
2012-08-27 04:03:49 +00:00
Oleksandr Tymoshenko
b9fa17aeba Add ARM11 support for elf trampoline 2012-08-26 02:34:03 +00:00
Oleksandr Tymoshenko
8f2a36c073 Add support for ARM11 cpufunc
Obtained from:	NetBSD (partially)
2012-08-26 02:23:21 +00:00
Glen Barber
67944c4572 Grammar fix: s/NIC's/NICs/
MFC after:	3 days
2012-08-26 01:21:02 +00:00
Oleksandr Tymoshenko
7ff5220e81 Call set_pcpu for ARMv6 architecture too 2012-08-26 00:53:00 +00:00
Oleksandr Tymoshenko
62b4972abb Merge fix for hang on ARM11 from NetBSD 2012-08-26 00:46:57 +00:00
Oleksandr Tymoshenko
e1f04cd024 Piggyback MIPS changes and add ARM syscons support for devices with
framebuffer

While here - sort #if defined() order alphabetically
2012-08-25 23:59:31 +00:00
Oleksandr Tymoshenko
5b88bb19d6 Style cleanup 2012-08-25 21:13:00 +00:00
Oleksandr Tymoshenko
46ad39d5a6 ARM11 might have more then 32 interrupts, e.g. BCM2835: 72 interrupts 2012-08-25 20:13:19 +00:00
Oleksandr Tymoshenko
bda493d611 Add clrex, strex , ldrex, strex and variants
Submitted by:	Alexander Rybalko
2012-08-25 20:01:31 +00:00
Warner Losh
6e31adaf33 Fetch the chip select in the bridge driver, like all the other spi
bridges do.
2012-08-23 22:38:37 +00:00
Warner Losh
fe49e25285 Use proper resource type when freeing.
Submitted by:	Ian Lapore (indirectly in a larger patch)
2012-08-23 21:31:52 +00:00
Oleksandr Tymoshenko
8634a69af0 Do not change "cachable" attribute for DMA memory allocated with
BUS_DMA_COHERENT attribute

The minimum unit for changing "cachable" attribute is page, so call
to pmap_change_attr effectively disable cache for all pages that newly
allocated DMA memory region spans on. The problem is that general-purpose
memory could reside on these pages too and disabling cache might affect
performance. Moreover ldrex/strex operators raise Data Abort exception
when accessing memory on page with "cachable" attribute off.

BUS_DMA_COHERENT does nto require memory to be coherent. It just suggests
to do best effort for reducing synchronization overhead.
2012-08-22 22:48:50 +00:00
Tim Kientzle
cddf6d2a33 After r239366, fix the ti_edma3.c driver to use the
exact name as used in the FDT.
2012-08-22 05:14:59 +00:00
Hans Petter Selasky
94d6bc8895 Make some at91_pcm_xxx() functions NULL safe. 2012-08-21 19:55:24 +00:00
Hiroki Sato
8bfdf49b97 - Calculate the I2C baud rate to keep them <100 kHz under different TCLK
frequencies.  The maximum freqency is 100 kHz according to the datasheet.

- Add child device probing support based on the device tree.  It now tries to
  find i2c-address property in the tree and attach the device with given slave
  address to iicbus.
2012-08-21 17:49:20 +00:00
Hiroki Sato
e664505cb9 Add mvts(4) driver for internal thermal sensor found on 88F6282 and 88F6283.
The temperature value will be exported via sysctl like this:

dev.mvts.0.temperature: 52.1C
2012-08-18 12:37:07 +00:00
Hiroki Sato
8f2853bf65 Sort IDs. 2012-08-18 12:20:51 +00:00
Hiroki Sato
b65df1c2c6 Fix build when DEBUG is defined. 2012-08-18 12:08:04 +00:00
Hiroki Sato
959bd21bec - MV_DEV_88F6282 has 256KB 4-way L2 cache.
- Sort IDs in win_cpu_can_remap() and remove MV_DEV_MV78100 because it is
  included in MV_DEV_DISCOVERY.
- Add MV_DEV_MV78XXX to xor_max_eng().
2012-08-18 11:40:55 +00:00
Hiroki Sato
d542454787 Fix a bug that could fail to initialize GPIO pins specified in "gpios" because
"gpio-controller" property at the controller node was always ignored.
2012-08-18 11:33:21 +00:00
Andrew Turner
71ea858b0e Remove machine from the LN2410SBC config, it is set by std.s3c2410 2012-08-18 05:52:17 +00:00
Andrew Turner
19a0f7f9cb Set machine correctly on ARM. This allows universe to use the correct world
when building each kernel.

Reviewed by:	imp
2012-08-18 05:48:19 +00:00
Rui Paulo
8c09f7b626 The GPIO drivers were initialising their mutexes with type of
MTX_NETWORK_LOCK. This is wrong since these mutexes have nothing to do
with networking.
2012-08-17 04:44:57 +00:00
Warner Losh
06832193b8 Preliminary Embest ATEB9200 support. 2012-08-16 05:03:59 +00:00
Warner Losh
406be9ffb1 Hmmm, somehow this file was completely deleted, rather than just
having the bogus lines being removed.
2012-08-16 04:53:30 +00:00
Warner Losh
bc41a42d6b Remove unused hints. 2012-08-16 04:49:23 +00:00
Oleksandr Tymoshenko
cf0df2b399 Unbreak build for the rest of AT91 platforms 2012-08-15 18:33:58 +00:00
Jakub Wojciech Klama
9b9bddf7c8 Switch lpc initarm() to use struct arm_boot_params and therefore fix
EA3250 kernel build.

Approved by:	gonzo
2012-08-15 18:18:29 +00:00
Oleksandr Tymoshenko
b208396ea3 Unbreak ATMEL kernel build 2012-08-15 08:34:31 +00:00
Oleksandr Tymoshenko
d3b496875a Specify architecture for assembler 2012-08-15 07:00:34 +00:00
Oleksandr Tymoshenko
e53470fee3 Merging of projects/armv6, part 10
- Support for Texas Instruments SoCs:
	- AM335x
	- OMAP4

- Kernel configs, DTS for Beaglebone and Pandaboard

Submitted by:	Ben Gray, Damjan Marion
2012-08-15 06:31:32 +00:00
Oleksandr Tymoshenko
9dfe4a1fa4 Merging of projects/armv6, part 9
Very basic support for Nvidia Tegra2: timer, interrupts, UART.

Submitted by:	Damjan Marion <dmarion@freebsd.org>
2012-08-15 06:06:43 +00:00
Oleksandr Tymoshenko
7a8988194d Merging of projects/armv6, intermission
Add configs missed in previous commits:
    - ARMADA XP
	- Embedded Artists EA3250
2012-08-15 05:55:16 +00:00
Oleksandr Tymoshenko
8dee0fd04c Merging of projects/armv6, part 8
r235162:

  Initial LPC32x0 support. Includes DTS file for Embedded Artists EA3250
  board.

  Peripherals currently supported:
  - Serial ports
  - Interrupt controller
  - Timers
  - Ethernet
  - USB host
  - Framebuffer (in conjunction with SSD1289 LCD controller)
  - RTC
  - SPI
  - GPIO

Submitted by:	Jakub Wojciech Klama <jceel@freebsd.org>
2012-08-15 05:37:10 +00:00
Oleksandr Tymoshenko
16694521fe Merging of projects/armv6, part 7
Add Marvell ARMADA XP support

Obtained from:	Marvell, Semihalf
2012-08-15 05:15:49 +00:00
Oleksandr Tymoshenko
cf1a573f04 Merging projects/armv6, part 1
Cummulative patch of changes that are not vendor-specific:
	- ARMv6 and ARMv7 architecture support
	- ARM SMP support
	- VFP/Neon support
	- ARM Generic Interrupt Controller driver
	- Simplification of startup code for all platforms
2012-08-15 03:03:03 +00:00
Andrew Turner
d2a3296d1a Move the decoding of the swi instruction to the syscall function. With the
ARM EABI the syscall value will be moved to a register to ease adding thumb
support. When this happens decoding of the instruction will no longer be
required.
2012-08-11 05:58:56 +00:00
Warner Losh
56c265f2f9 Correct the PLLA setting functions and centralize. 2012-08-11 05:45:19 +00:00
Warner Losh
bcc1a5425a Update comments about setting PLLA and refernce the tables in the
datasheet that express the limits.
2012-08-11 05:12:46 +00:00
Warner Losh
19b89339dc Don't use C++ comments. 2012-08-11 05:03:30 +00:00
Warner Losh
cb8b429ed3 More comments about setting PLLA, or rather that we never do. 2012-08-10 04:48:06 +00:00
Warner Losh
e2af3b9a86 Add charge pump current register. 2012-08-10 04:47:20 +00:00
Konstantin Belousov
1c771f9222 After the PHYS_TO_VM_PAGE() function was de-inlined, the main reason
to pull vm_param.h was removed.  Other big dependency of vm_page.h on
vm_param.h are PA_LOCK* definitions, which are only needed for
in-kernel code, because modules use KBI-safe functions to lock the
pages.

Stop including vm_param.h into vm_page.h. Include vm_param.h
explicitely for the kernel code which needs it.

Suggested and reviewed by:	alc
MFC after:    2 weeks
2012-08-05 14:11:42 +00:00