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freebsd-skq/sys/conf/files.arm64

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Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
# $FreeBSD$
Port cloudabi32.ko to FreeBSD/arm64. This change adds an implementation of a sysent for running CloudABI armv6 and armv7 binaries on FreeBSD/arm64. It is a somewhat literal copy of the armv6 version, except that it's been patched up to use the proper registers. Just like for cloudabi32.ko on FreeBSD/amd64, we make use of a vDSO that automatically pads system call parameters to 64-bit value. These are stored in a buffer on the stack, meaning we need to use copyin() and copyout() unconditionally.
2017-11-30 17:58:48 +00:00
cloudabi32_vdso.o optional compat_cloudabi32 \
dependency "$S/contrib/cloudabi/cloudabi_vdso_armv6_on_64bit.S" \
compile-with "${CC} -x assembler-with-cpp -m32 -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_armv6_on_64bit.S -o ${.TARGET}" \
no-obj no-implicit-rule \
clean "cloudabi32_vdso.o"
#
cloudabi32_vdso_blob.o optional compat_cloudabi32 \
dependency "cloudabi32_vdso.o" \
compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi32_vdso.o ${.TARGET}" \
no-implicit-rule \
clean "cloudabi32_vdso_blob.o"
#
Provide the CloudABI vDSO to its executables. CloudABI executables already provide support for passing in vDSOs. This functionality is used by the emulator for OS X to inject system call handlers. On FreeBSD, we could use it to optimize calls to gettimeofday(), etc. Though I don't have any plans to optimize any system calls right now, let's go ahead and already pass in a vDSO. This will allow us to simplify the executables, as the traditional "syscall" shims can be removed entirely. It also means that we gain more flexibility with regards to adding and removing system calls. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D7438
2016-08-10 21:02:41 +00:00
cloudabi64_vdso.o optional compat_cloudabi64 \
Rewrite the vDSOs for CloudABI in assembly. The reason why the old vDSOs were written in C using inline assembly was purely because they were embedded in the C library directly as static inline functions. This was practical during development, because it meant you could invoke system calls without any library dependencies. The vDSO was simply a copy of these functions. Now that we require the use of the vDSO, there is no longer any need for embedding them in C code directly. Rewriting them in assembly has the advantage that they are closer to ideal (less useless branching, less assumptions about registers remaining unclobbered by the kernel, etc). They are also easier to build, as they no longer depend on the C type information for CloudABI. Obtained from: https://github.com/NuxiNL/cloudabi
2016-08-21 07:28:38 +00:00
dependency "$S/contrib/cloudabi/cloudabi_vdso_aarch64.S" \
Move the linker script from cloudabi64/ to cloudabi/. It turns out that it works perfectly fine for generating 32-bits vDSOs as well. While there, get rid of the extraneous .s file extension.
2016-08-21 15:14:06 +00:00
compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_aarch64.S -o ${.TARGET}" \
Provide the CloudABI vDSO to its executables. CloudABI executables already provide support for passing in vDSOs. This functionality is used by the emulator for OS X to inject system call handlers. On FreeBSD, we could use it to optimize calls to gettimeofday(), etc. Though I don't have any plans to optimize any system calls right now, let's go ahead and already pass in a vDSO. This will allow us to simplify the executables, as the traditional "syscall" shims can be removed entirely. It also means that we gain more flexibility with regards to adding and removing system calls. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D7438
2016-08-10 21:02:41 +00:00
no-obj no-implicit-rule \
clean "cloudabi64_vdso.o"
#
cloudabi64_vdso_blob.o optional compat_cloudabi64 \
dependency "cloudabi64_vdso.o" \
compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi64_vdso.o ${.TARGET}" \
no-implicit-rule \
clean "cloudabi64_vdso_blob.o"
#
arm64: Remove old clock driver for Allwinner 64bit SoC All the clocks are now handled by the clkng driver. Tested On: Pine64-LTS (A64) Tested On: OrangePi PC2 (H5)
2018-01-06 20:32:14 +00:00
# Allwinner common files
a10_timer: Update the driver so we can use it on other SoC a10_timer is currently use in UP allwinner SoC (A10 and A13). Those don't have the generic arm timer. The arm generic timecounter is broken in the A64 SoC, some attempts have been made to fix the glitch but users still reported some minor ones. Since the A64 (and all Allwinner SoC) still have this timer controller, rework the driver so we can use it in any SoC. Since it doesn't have the 64 bits counter on all SoC, use one of the generic 32 bits counter as the timecounter source. PR: 229644
2018-08-23 18:46:05 +00:00
arm/allwinner/a10_timer.c optional a10_timer fdt
arm64: Add support for NanoPI NEO2 Add overlay files and activate devicetree file for NanoPi NEO2 featuring Allwinner H5 ARM64 core. To enable sound, dma and codec drivers are enabled for build. Submitted by: Manuel Stühn (freebsdnewbie@freenet.de) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D20129
2019-05-02 12:56:13 +00:00
arm/allwinner/a10_codec.c optional sound a10_codec
arm/allwinner/a31_dmac.c optional a31_dmac
arm/allwinner/sunxi_dma_if.m optional a31_dmac
Add SY8106A Buck Regulator and Allwinner CIR devices to GENERIC arm64 kernel.
2019-04-20 03:21:47 +00:00
arm/allwinner/aw_cir.c optional evdev aw_cir fdt
arm64: allwinner: Add aw_dwc3 driver This is a simplebus like driver that just deal with clocks and resets and attach the dwc3 child node. MFC after: 1 month
2019-10-14 22:22:19 +00:00
arm/allwinner/aw_dwc3.c optional aw_dwc3 fdt
arm64: a10_gpio.c and a10_mmc.c were renamed aw_gpio.c and aw_mmc.c
2017-12-26 15:35:19 +00:00
arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt
Add MMCCAM support to AllWinner MMC driver Using MMCCAM on AllWinner boards is now possible, reaching highest possible data transfer speed. For now, MMCCAM doesn't scan cards on boot. This means that scanning has to be done manually and that it's not possible to mount root FS from MMC/SD card since there is no block device at the boot time. For manually scanning the cards, run: # camcontrol rescan X:0:0 Where X is the bus number (look at camcontrol devlist to determine bus number assigned to the MMC controller). Reviewed by: manu Approved by: imp (mentor) Differential Revision: https://reviews.freebsd.org/D15891
2018-06-21 11:49:21 +00:00
arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt | mmccam aw_mmc fdt
Mark the Allwinner drivers as FDT only. These are mobile and embedded parts so are unlikely to use ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2016-11-21 18:50:45 +00:00
arm/allwinner/aw_nmi.c optional aw_nmi fdt \
Add support for Allwinner A64. Reviewed by: andrew, manu Relnotes: yes
2016-08-25 13:59:19 +00:00
compile-with "${NORMAL_C} -I$S/gnu/dts/include"
arm64: allwinner: Add pwm driver Add a pwm driver for Allwinner PWM Add pwm and aw_pwm to the GENERIC kernel
2018-12-12 20:58:43 +00:00
arm/allwinner/aw_pwm.c optional aw_pwm fdt
Mark the Allwinner drivers as FDT only. These are mobile and embedded parts so are unlikely to use ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2016-11-21 18:50:45 +00:00
arm/allwinner/aw_rsb.c optional aw_rsb fdt
arm/allwinner/aw_rtc.c optional aw_rtc fdt
arm64: Make aw_sid and aw_thermal depend on nvmem Both drivers use this interface so add a dependancy on it. Since awg uses aw_sid for generating the MAC address, make it depend on both aw_sid and nmvem so when only removing nvmem from kernel config it will not include this driver. Reported by: sbruno Approved by: re (gjb)
2018-09-13 14:08:10 +00:00
arm/allwinner/aw_sid.c optional aw_sid nvmem fdt
allwinner: Add h3 spi driver This driver is compatible with H3/H5/A64. Test was done on the OrangePi-PC2 board (H5 based), which have a mx25l1606e spi flash on it, by writing u-boot image, reading it and booting from the spi. There is still room for improvement especially on reading using the controller automatic burst which will avoid us to write dummy data to the TX FIFO. DMA is also not supported as we currently don't support the DMA controller on those SoCs Only add a kernel module for it.
2018-05-17 10:19:52 +00:00
arm/allwinner/aw_spi.c optional aw_spi fdt
arm64: allwinner: Add aw_syscon driver to GENERIC Recent DTS use the syscon for the emac controller. We support this but since U-Boot is still using old DTS it was never needed for us to add this support, but this is a problem when using upstream recent DTS and will be when U-Boot will catch up. While here add a new compatible to the aw_syscon driver as Linux changed it ...
2018-08-19 18:55:33 +00:00
arm/allwinner/aw_syscon.c optional aw_syscon ext_resources syscon fdt
arm64: Make aw_sid and aw_thermal depend on nvmem Both drivers use this interface so add a dependancy on it. Since awg uses aw_sid for generating the MAC address, make it depend on both aw_sid and nmvem so when only removing nvmem from kernel config it will not include this driver. Reported by: sbruno Approved by: re (gjb)
2018-09-13 14:08:10 +00:00
arm/allwinner/aw_thermal.c optional aw_thermal nvmem fdt
Mark the Allwinner drivers as FDT only. These are mobile and embedded parts so are unlikely to use ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2016-11-21 18:50:45 +00:00
arm/allwinner/aw_usbphy.c optional ehci aw_usbphy fdt
arm64: allwinner: Add support for the usb3 phy The usb 3 controller in the H6 SoC have a dedicated phy. Add support for it. Mostly imported from NetBSD MFC after: 1 month
2019-10-14 21:58:46 +00:00
arm/allwinner/aw_usb3phy.c optional xhci aw_usbphy fdt
Mark the Allwinner drivers as FDT only. These are mobile and embedded parts so are unlikely to use ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2016-11-21 18:50:45 +00:00
arm/allwinner/aw_wdog.c optional aw_wdog fdt
arm/allwinner/axp81x.c optional axp81x fdt
arm64: Make aw_sid and aw_thermal depend on nvmem Both drivers use this interface so add a dependancy on it. Since awg uses aw_sid for generating the MAC address, make it depend on both aw_sid and nmvem so when only removing nvmem from kernel config it will not include this driver. Reported by: sbruno Approved by: re (gjb)
2018-09-13 14:08:10 +00:00
arm/allwinner/if_awg.c optional awg ext_resources syscon aw_sid nvmem fdt
arm64: Remove old clock driver for Allwinner 64bit SoC All the clocks are now handled by the clkng driver. Tested On: Pine64-LTS (A64) Tested On: OrangePi PC2 (H5)
2018-01-06 20:32:14 +00:00
# Allwinner clock driver
arm/allwinner/clkng/aw_ccung.c optional aw_ccu fdt
arm: allwinner: clk: Add new clock aw_clk_frac Add a clock driver for clock that can either be used in integer mode with one N factor and one M divider or in fractional mode where the output frequency is chosen between two predifined output.
2019-05-23 17:35:40 +00:00
arm/allwinner/clkng/aw_clk_frac.c optional aw_ccu fdt
allwinner: Add a new clock aw_clk_m We used the aw_clk_nm clock for clock with only one divider factor and used a fake multiplier factor. This cannot work properly as we end up writing the "fake" factor to the register (and so always set the LSB to 1). Create a new clock for those. The reason for not using the clk_div clock is because those clocks are a bit special. Since they are (almost) all related to video we also need to set the parent clock (the main PLL) to a frequency that they can support. As the main PLL have some minimal frequency that they can support we need to be able to set the main PLL to a multiple of the desired frequency. Let say you want to have a 71Mhz pixel clock (typical for a 1280x800 display) and the main PLL cannot go under 192Mhz, you need to set it to 3 times the desired frequency and set the divider to 3 on the hdmi clock. So this also introduce the CLK_SET_ROUND_MULTIPLE flag that allow for this kind of scenario.
2019-08-10 18:50:37 +00:00
arm/allwinner/clkng/aw_clk_m.c optional aw_ccu fdt
arm64: allwinner: a64: Add PLL_MIPI PLL_MIPI is the last important PLL that we missed. Add support for it. Since it's one of the possible parent for TCON0 also add this clock now that we can. While here add some info about what video related clocks should be enabled at boot and with what frequency.
2019-09-28 22:14:33 +00:00
arm/allwinner/clkng/aw_clk_mipi.c optional aw_ccu fdt
allwinner: Add A64 ccung support Upstream DTS for A64 SoC doesn't provide a /clocks node as Linux switched to ccu-ng This commit adds the necessary bits to boot on pine64 with latest DTS from upstream. USB is not working for now and some node aren't present in the DTS (like the PMU, Power Management Unit). Tested on: Pine64
2017-07-03 19:30:03 +00:00
arm/allwinner/clkng/aw_clk_nkmp.c optional aw_ccu fdt
arm64: Remove old clock driver for Allwinner 64bit SoC All the clocks are now handled by the clkng driver. Tested On: Pine64-LTS (A64) Tested On: OrangePi PC2 (H5)
2018-01-06 20:32:14 +00:00
arm/allwinner/clkng/aw_clk_nm.c optional aw_ccu fdt
arm64: allwinner: Add aw_clk_nmm clock This is a clock type present on Allwinner H6 where the formula is : f = fparent * n / m0 / m1 MFC after: 1 month
2019-10-14 21:49:07 +00:00
arm/allwinner/clkng/aw_clk_nmm.c optional aw_ccu fdt
arm64: allwinner: Add new clock aw_clk_np This is a clock type present in Allwinner H6 where the formula is : f = fparent * N / P MFC after: 1 month
2019-10-14 21:47:20 +00:00
arm/allwinner/clkng/aw_clk_np.c optional aw_ccu fdt
allwinner: Add A64 ccung support Upstream DTS for A64 SoC doesn't provide a /clocks node as Linux switched to ccu-ng This commit adds the necessary bits to boot on pine64 with latest DTS from upstream. USB is not working for now and some node aren't present in the DTS (like the PMU, Power Management Unit). Tested on: Pine64
2017-07-03 19:30:03 +00:00
arm/allwinner/clkng/aw_clk_prediv_mux.c optional aw_ccu fdt
arm64: Remove old clock driver for Allwinner 64bit SoC All the clocks are now handled by the clkng driver. Tested On: Pine64-LTS (A64) Tested On: OrangePi PC2 (H5)
2018-01-06 20:32:14 +00:00
arm/allwinner/clkng/ccu_a64.c optional soc_allwinner_a64 aw_ccu fdt
arm/allwinner/clkng/ccu_h3.c optional soc_allwinner_h5 aw_ccu fdt
arm64: allwinner: Add Allwinner H6 Support This adds support for H6 SoC. Add a CCU driver for H6 that support all PLLs and most of the clocks that we are intersted in for now (i2c, mmc, usb, etc ...) MFC after: 1 month
2019-10-14 21:53:53 +00:00
arm/allwinner/clkng/ccu_h6.c optional soc_allwinner_h6 aw_ccu fdt
arm/allwinner/clkng/ccu_h6_r.c optional soc_allwinner_h6 aw_ccu fdt
Allwinner: Add clock driver for ccu_sun8i_r SUN8I and SUN50I (H3, H5, A83T and A64) have a second clock controller unit. It controls the clocks for the second gpio controller, the IR controller etc ... Support for A83T is not supported. Tested On: OrangePi One, Pine64
2017-10-07 16:48:42 +00:00
arm/allwinner/clkng/ccu_sun8i_r.c optional aw_ccu fdt
arm64: allwinner: Add CCU DE2 The Display Engine 2 have it's own Clock and Control Unit, add support for it.
2019-03-07 19:30:37 +00:00
arm/allwinner/clkng/ccu_de2.c optional aw_ccu fdt
allwinner: Add A64 ccung support Upstream DTS for A64 SoC doesn't provide a /clocks node as Linux switched to ccu-ng This commit adds the necessary bits to boot on pine64 with latest DTS from upstream. USB is not working for now and some node aren't present in the DTS (like the PMU, Power Management Unit). Tested on: Pine64
2017-07-03 19:30:03 +00:00
arm64: Remove old clock driver for Allwinner 64bit SoC All the clocks are now handled by the clkng driver. Tested On: Pine64-LTS (A64) Tested On: OrangePi PC2 (H5)
2018-01-06 20:32:14 +00:00
# Allwinner padconf files
arm/allwinner/a64/a64_padconf.c optional soc_allwinner_a64 fdt
arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64 fdt
arm/allwinner/h3/h3_padconf.c optional soc_allwinner_h5 fdt
arm/allwinner/h3/h3_r_padconf.c optional soc_allwinner_h5 fdt
arm64: allwinner: Add H6 GPIO/Pinctrl driver This adds support for Allwinner H6 GPIO and pinctrl driver for both the main pinctrl unit and the 'r_' one. MFC after: 1 month
2019-10-14 21:55:45 +00:00
arm/allwinner/h6/h6_padconf.c optional soc_allwinner_h6 fdt
arm/allwinner/h6/h6_r_padconf.c optional soc_allwinner_h6 fdt
arm64: Remove old clock driver for Allwinner 64bit SoC All the clocks are now handled by the clkng driver. Tested On: Pine64-LTS (A64) Tested On: OrangePi PC2 (H5)
2018-01-06 20:32:14 +00:00
Introduce support for Annapurna Alpine CCU and NB devices This commit adds drivers for Alpine Cache Coherency Unit and North Bridge Service whose task is to configure the system fabric and enable cache coherency. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: wma Differential Revision: https://reviews.freebsd.org/D7565
2016-09-07 05:34:41 +00:00
arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt
arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt
Add driver for PCIe root complex on Annapurna Alpine platform. The driver subclasses pci-host-generic and additionally performs configuration of vendor-specific PCIe registers. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: wma Differential Revision: https://reviews.freebsd.org/D7571
2016-09-20 11:11:06 +00:00
arm/annapurna/alpine/alpine_pci.c optional al_pci fdt
Support for MSI-X on Annapurna Alpine This patch adds support for MSI-X interrupts on Annapurna Alpine platform. MSI-X on Alpine work similarly to GICv2m, i.e. some range of SPI interrupts is reserved in GIC and individual SPIs can be triggered by MSI-X messages. This SPI range is defined in FDT. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: nwhitehorn, wma Differential Revision: https://reviews.freebsd.org/D7579
2016-10-20 11:23:59 +00:00
arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt
Support for Alpine Serializer/Deserializer. The exported functions will be used by Alpine Ethernet driver. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: wma Differential Revision: https://reviews.freebsd.org/D7763
2016-10-20 11:26:51 +00:00
arm/annapurna/alpine/alpine_serdes.c optional al_serdes fdt \
no-depend \
compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm/arm/generic_timer.c standard
Split out the FDT parts of the GICv2 interrupt controller driver. This will allow us to add an ACPI attachment for arm64. Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7307
2016-08-01 16:29:04 +00:00
arm/arm/gic.c standard
iAdd ACPI attachments the the GIC and GICv3 interrupt controller drivers. For each we need to walk the MADT to find which we have, then add the driver as needed. As each may have a child they will each walk the same table to find these details. Reviewed by: mmel Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D8720
2018-01-11 17:23:24 +00:00
arm/arm/gic_acpi.c optional acpi
Split out the FDT parts of the GICv2 interrupt controller driver. This will allow us to add an ACPI attachment for arm64. Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7307
2016-08-01 16:29:04 +00:00
arm/arm/gic_fdt.c optional fdt
Add Performance Monitoring Counters support for AArch64. Family-common and CPU-specific counters implemented. Supported CPUs: ARM Cortex A53/57/72. Reviewed by: andrew, bz, emaste, gnn, jhb Sponsored by: ARM Limited Differential Revision: https://reviews.freebsd.org/D2555
2015-05-19 15:25:47 +00:00
arm/arm/pmu.c standard
Mark the Broadcom code as FDT only, there is no ACPI support for the Raspberry Pi 3. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2016-11-29 12:46:42 +00:00
arm/broadcom/bcm2835/bcm2835_audio.c optional sound vchiq fdt \
Make BRCM2837 port conform FreeBSD/ARM64 guidelines - Rename SOC_BCM2837 to SOC_BRCM_BCM2837, put it to opt_soc.h - do not use files.XXX files, just move required sources to conf/files.arm64 and make them depend on soc_brcm_bcm2837 Suggested by: andrew
2016-10-14 22:23:03 +00:00
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
sys/conf/files.arm64: remove some unnecessary soc_* dependencies These files already have 'device' lines that they require; adding a dependency on SOC_* options is an extra restriction that adds extra verbosity when future supported Broadcom-based SOC will also feature the same compatible device. Users wishing to not compile these devices in should remove the 'device' lines from their config.
2019-11-07 19:13:53 +00:00
arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc fdt
arm64: add SOC_BRCM_BCM2838, build it in GENERIC BCM2838/BCM2711 is the Raspberry Pi 4, which we will soon be able to boot on once some ports bits are worked out.
2019-11-10 01:43:51 +00:00
arm/broadcom/bcm2835/bcm2835_clkman.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_cpufreq.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_dma.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_fbd.c optional vt soc_brcm_bcm2837 fdt | vt soc_brcm_bcm2838 fdt
Add a driver to talk to the Raspberry Pi firmware Communicating with the Raspberry Pi firmware is currently handled by each driver calling into the mbox driver, however the device tree is structured such that they should be calling into a firmware driver. Add a driver for this node with an interface to communicate to the firmware via the mbox interface. There is a sysctl to get the firmware revision. This is a unix date so can be parsed with: root@generic:~ # date -j -f '%s' sysctl -n dev.bcm2835_firmware.0.revision Tue Nov 19 16:40:28 UTC 2019 Reviewed by: manu Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D25572
2020-07-09 16:28:13 +00:00
arm/broadcom/bcm2835/bcm2835_firmware.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
sys/conf/files.arm64: remove some unnecessary soc_* dependencies These files already have 'device' lines that they require; adding a dependency on SOC_* options is an extra restriction that adds extra verbosity when future supported Broadcom-based SOC will also feature the same compatible device. Users wishing to not compile these devices in should remove the 'device' lines from their config.
2019-11-07 19:13:53 +00:00
arm/broadcom/bcm2835/bcm2835_ft5406.c optional evdev bcm2835_ft5406 fdt
arm64: add SOC_BRCM_BCM2838, build it in GENERIC BCM2838/BCM2711 is the Raspberry Pi 4, which we will soon be able to boot on once some ports bits are worked out.
2019-11-10 01:43:51 +00:00
arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio soc_brcm_bcm2837 fdt | gpio soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_intr.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_mbox.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_rng.c optional !random_loadable soc_brcm_bcm2837 fdt | !random_loadable soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_sdhost.c optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt
sys/conf/files.arm64: remove some unnecessary soc_* dependencies These files already have 'device' lines that they require; adding a dependency on SOC_* options is an extra restriction that adds extra verbosity when future supported Broadcom-based SOC will also feature the same compatible device. Users wishing to not compile these devices in should remove the 'device' lines from their config.
2019-11-07 19:13:53 +00:00
arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi fdt
bcm2835: push address mapping conversion for DMA/mailbox to runtime We could maintain the static conversions for the !AArch64 Raspberry Pis, but I'm not sure it's worth it -- we'll traverse the platform list exactly once (of which there are only two for armv7), then every conversion there-after traverses the memory map listing of which there are at-most two entries for these boards: sdram and peripheral space. Detecting this at runtime is necessary for the AArch64 SOC, though, because of the distinct IO windows being otherwise not discernible just from support compiled into the kernel. We currently select the correct window based on /compatible in the FDT. We also use a similar mechanism to describe the DMA restrictions- the RPi 4 can have up to 4GB of RAM while the DMA controller and mailbox mechanism can technically, kind of, only access the lowest 1GB. See the comment in bcm2835_vcbus.h for a fun description/clarification of this. Differential Revision: https://reviews.freebsd.org/D22301
2019-11-20 03:57:46 +00:00
arm/broadcom/bcm2835/bcm2835_vcbus.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm64: add SOC_BRCM_BCM2838, build it in GENERIC BCM2838/BCM2711 is the Raspberry Pi 4, which we will soon be able to boot on once some ports bits are worked out.
2019-11-10 01:43:51 +00:00
arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837 | dwcotg fdt soc_brcm_bcm2838
Add a driver for bcm2838 PCI express controller This adds support for the Broadcom bcm2711 PCI express controller, found on the Raspberry Pi 4 (aka the bcm2838 SoC). The driver has only been developed against the soldered-on VIA XHCI controller and not tested with other end points. Submitted by: Robert Crowston <crowston_protonmail.com> Differential Revision: https://reviews.freebsd.org/D25068
2020-07-06 08:51:55 +00:00
arm/broadcom/bcm2835/bcm2838_pci.c optional soc_brcm_bcm2838 fdt pci
Handle Raspberry Pi 4 xhci firmware loading. The newer hardware revisions of the Raspberry Pi 4 removed the ability of the VIA VL805 xhci controller to load its own firmware. Instead the firmware must be installed at the appropriate time by the VideoCore coprocessor. Submitted by: Robert Crowston <crowston_protonmail.com> Differential Revision: https://reviews.freebsd.org/D25261
2020-08-03 10:19:50 +00:00
arm/broadcom/bcm2835/bcm2838_xhci.c optional soc_brcm_bcm2838 fdt pci xhci
Add a GPIO driver for the Raspberry Pi firmware GPIOs These exist on the Raspberry Pi 3 and 4 and control and external IO expander. Reviewed by: manu Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D25858
2020-08-03 17:18:12 +00:00
arm/broadcom/bcm2835/raspberrypi_gpio.c optional soc_brcm_bcm2837 gpio | soc_brcm_bcm2838 gpio
Introduce VF610 I2C controller support. NXP LS1046A contains I2C controller compatible with Vybrid VF610. Existing Vybrid MVF600 driver can be used to support it. For that purpose declare driver as ofw_iicbus and add methods associated with ofw_iicbus. For VF610 add dynamic clock prescaler calculation using clock information from clock driver and clock frequency requested in device tree. On the occasion add detach function and add additional error handling in i2c_attach function. Submitted by: Dawid Gorecki <dgr@semihalf.com> Reviewed by: manu Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D24361
2020-05-25 15:21:38 +00:00
arm/freescale/vybrid/vf_i2c.c optional vf_i2c iicbus SOC_NXP_LS
Add the GPIO driver for the North/South bridge in Marvell Armada 37x0. The A3700 has a different GPIO controller and thus, do not use the old (and shared) code for Marvell. The pinctrl driver, also part of the controller, is not supported yet (but the implementation should be straightforward). Sponsored by: Rubicon Communications, LLC (Netgate)
2019-06-10 21:27:21 +00:00
arm/mv/a37x0_gpio.c optional a37x0_gpio gpio fdt
Add the I2C driver for the Armada 37x0. This controller is a bit tricky as the STOP condition must be indicated in the last tranferred byte, some devices will not like the repeated start behavior of this controller. A proper fix to this issue is in the works. This driver works in polling mode, can be used early in the boot (required in some cases). Tested on espressobin/SG-1100 and the SG-3200. Obtained from: pfSense Sponsored by: Rubicon Communications, LLC (Netgate)
2019-12-05 00:56:03 +00:00
arm/mv/a37x0_iic.c optional a37x0_iic iicbus fdt
Add the SPI driver for the Marvell Armada 37x0 SoC. Interrupt based driver, implements SPI mode and clock configuration. Tested on espressobin and SG-3200. Sponsored by: Rubicon Communications, LLC (Netgate)
2019-12-06 12:55:39 +00:00
arm/mv/a37x0_spi.c optional a37x0_spi spibus fdt
Update Armada 8k drivers to cover newly imported DT and latest changes in simple multifunction driver. - follow interrupt changes in DT. Split old ICU driver to function oriented parts and add drivers for newly defined parts (system error interrupts). - Many drivers are children of simple multifunction driver. But after r349596 simple MF driver doesn't longer exports memory resources, and all children must use syscon interface to access their registers. Adapt affected drivers to this fact. MFC after: 3 weeks
2019-10-20 10:48:27 +00:00
arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt
arm64: mv_gpio: Add Marvell 8K support While here put the interrupts setup in it's own function Sponsored by: Rubicon Communications, LCC ("Netgate")
2018-12-12 22:02:57 +00:00
arm/mv/gpio.c optional mv_gpio fdt
Add specialized gpio driver for ARMADA 8k SoC. Older marvell gpio blocks are to different for reusing/enhancing existing frivers. MFC after: 2 weeks
2020-06-19 15:21:33 +00:00
arm/mv/mvebu_gpio.c optional mv_gpio fdt
arm64: mvebu_pinctrl: Add driver for Marvell Pinmux Controller Add a driver compatible with Marvell mvebu-pinctrl and add ap806-pinctrl support. Sponsored by: Rubicon Communications, LCC ("Netgate")
2018-12-12 22:00:05 +00:00
arm/mv/mvebu_pinctrl.c optional mvebu_pinctrl fdt
arm64: marvell: Add driver for Marvell Ap806 System Controller The first two clocks are for the clusters and their frequencies can be found reading a register. Then a fixed 1200Mhz clock is present and two fixed clocks, 'mss' which is 1200 / 6 and 'sdio' which is 1200 / 3. Sponsored by: Rubicon Communications, LLC ("Netgate")
2018-12-12 22:01:06 +00:00
arm/mv/mv_ap806_clock.c optional SOC_MARVELL_8K fdt
Update Armada 8k drivers to cover newly imported DT and latest changes in simple multifunction driver. - follow interrupt changes in DT. Split old ICU driver to function oriented parts and add drivers for newly defined parts (system error interrupts). - Many drivers are children of simple multifunction driver. But after r349596 simple MF driver doesn't longer exports memory resources, and all children must use syscon interface to access their registers. Adapt affected drivers to this fact. MFC after: 3 weeks
2019-10-20 10:48:27 +00:00
arm/mv/mv_ap806_gicp.c optional mv_ap806_gicp fdt
arm/mv/mv_ap806_sei.c optional mv_ap806_sei fdt
arm64: marvell: Add cp110 clock controller support The cp110 clock controller controls the clocks and gate of the CP110 hardware block. Every clock/gate are implemented except the NAND clock. Sponsored by: Rubicon Communications, LLC ("Netgate")
2018-12-12 22:04:21 +00:00
arm/mv/mv_cp110_clock.c optional SOC_MARVELL_8K fdt
Update Armada 8k drivers to cover newly imported DT and latest changes in simple multifunction driver. - follow interrupt changes in DT. Split old ICU driver to function oriented parts and add drivers for newly defined parts (system error interrupts). - Many drivers are children of simple multifunction driver. But after r349596 simple MF driver doesn't longer exports memory resources, and all children must use syscon interface to access their registers. Adapt affected drivers to this fact. MFC after: 3 weeks
2019-10-20 10:48:27 +00:00
arm/mv/mv_cp110_icu.c optional mv_cp110_icu fdt
arm/mv/mv_cp110_icu_bus.c optional mv_cp110_icu fdt
mv_thermal: Add thermal driver for AP806 and CP110 thermal sensor Sponsored by: Rubicon Communications, LLC ("Netgate")
2018-12-12 22:33:05 +00:00
arm/mv/mv_thermal.c optional SOC_MARVELL_8K mv_thermal fdt
Add Marvell RTC driver to arm64 GENERIC config Marvell Armada 80x0/70x0 SoC family uses same RTC IP as Armada 38x. This patch adds necessary files and enable driver in GENERIC config. Submitted by: Rafal Kozik <rk@semihalf.com> Obtained from: Semihalf Sponsored by: Semihalf Differential Revision: https://reviews.freebsd.org/D12200
2017-09-05 05:50:01 +00:00
arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt
Enable UART support for Xilinx Ultrascale+ SoCs Xilinx Ultrascale+ are based on Cortex-A53 and use existing UART driver (uart_dev_cdnc). Enable it in arm64 GENERIC config. Submitted by: Michal Stanek <mst@semihalf.com> Obtained from: Semihalf
2018-07-13 19:54:22 +00:00
arm/xilinx/uart_dev_cdnc.c optional uart soc_xilinx_zynq
arm64 acpi: Add support for IORT table Add new file arm64/acpica/acpi_iort.c to support the "IO Remapping Table" (IORT). The table is specified in ARM document "ARM DEN 0049D" titled "IO Remapping Table Platform Design Document". The IORT table has information on the associations between PCI root complexes, SMMU blocks and GIC ITS blocks in the system. The changes are to parse and save the information in the IORT table. The API to use this information is added to sys/dev/acpica/acpivar.h. The acpi_iort.c also has code to check the GIC ITS nodes seen in the IORT table with corresponding entries in MADT table (for validity) and with entries in SRAT table (for proximity information). Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D18002
2019-02-07 02:30:33 +00:00
arm64/acpica/acpi_iort.c optional acpi
Add basic support for ACPI. It splits out the nexus driver to two new drivers, one for fdt, one for acpi. It then uses this to decide if it will use fdt or acpi. The GICv2 (interrupt controller) and Generic Timer drivers have been updated to handle both cases. As this is early code we still need FDT to find the kernel console, and some parts are still missing, including PCI support. Differential Revision: https://reviews.freebsd.org/D2463 Reviewed by: jhb, jkim, emaste Obtained from: ABT Systems Ltd Relnotes: Yes Sponsored by: The FreeBSD Foundation
2015-06-11 15:45:33 +00:00
arm64/acpica/acpi_machdep.c optional acpi
arm64/acpica/OsdEnvironment.c optional acpi
arm64/acpica/acpi_wakeup.c optional acpi
Implement stubs for ACPI PCI routines ACPI driver requires special functions to be provided by machdep code. Add temporary stubs to satisfy the compiler when both "pci" and "acpi" are enabled in the kernel configuration file. Reviewed by: andrew Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3028
2015-07-12 17:28:31 +00:00
arm64/acpica/pci_cfgreg.c optional acpi pci
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/autoconf.c standard
arm64/arm64/bus_machdep.c standard
arm64/arm64/bus_space_asm.S standard
Port x86 busdma to ARM64 The x86 busdma subsystem allows using multiple implementations. By default the classic bounce buffer approach is used, however on systems with IOMMU it could be in runtime switched to more efficient hardware accelerated implementation. This commit adds ARM64 port of the x86 busdma framework and bounce buffer backend. It is ready to use on IO coherent systems. If the IO coherency cannot be guaranteed, the cache management operations have to be added to this code in places marked by /* XXX ARM64TODO (...) */ comments. Also IOMMU support might be added by registering another busdma implementation like it is already done on the x86. Reviewed by: andrew, emaste Obtained from: Semihalf Sponsored by: The FreeBSD Foundation
2015-05-08 18:47:19 +00:00
arm64/arm64/busdma_bounce.c standard
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/busdma_machdep.c standard
arm64: bzero optimization This optimization attempts to utylize as wide as possible register store instructions to zero large buffers. The implementation, if possible, will use 'dc zva' to zero buffer by cache lines. Speedup: 60x faster memory zeroing Submitted by: Dominik Ermel <der@semihalf.com> Obtained from: Semihalf Sponsored by: Cavium Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D5726
2016-04-04 07:06:20 +00:00
arm64/arm64/bzero.S standard
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/clock.c standard
arm64/arm64/copyinout.S standard
Add a framework to install CPU errata on arm64. Each erratum can encode a mask and value to compare with the Main ID Register. If these match then a function is called to handle the installation of the erratum workaround. No errata are currently handled, however this will change soon in a future commit. MFC after: 1 week Sponsored by: DARPA, AFRL
2018-01-09 14:33:05 +00:00
arm64/arm64/cpu_errata.c standard
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/cpufunc_asm.S standard
Introduce ddb(4) support for ARM64 Obtained from: Semihalf Reviewed by: emaste Sponsored by: The FreeBSD Foundation
2015-04-27 09:12:54 +00:00
arm64/arm64/db_disasm.c optional ddb
arm64/arm64/db_interface.c optional ddb
arm64/arm64/db_trace.c optional ddb
Update the debug monitor handling to work after userspace has started The debug monitor register state is now stored in a struct and updated when required. Currently there is only a kernel state, however a per-process state will be added in a future change. Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D22128
2019-10-30 10:51:24 +00:00
arm64/arm64/debug_monitor.c standard
Framework for ARM64 instruction disassembler Provide an easy to use framework for ARM64 DDB disassembler. This commit does not contain full list of instruction opcodes. Obtained from: Semihalf Sponsored by: Cavium Approved by: cognet (mentor) Reviewed by: zbb, andrew, cognet Differential revision: https://reviews.freebsd.org/D5114
2016-01-29 13:06:30 +00:00
arm64/arm64/disassem.c optional ddb
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/dump_machdep.c standard
Support the EFI Runtime Services on arm64. As with amd64 we use the 1:1 mapping. This uses the new common code shared with amd64. The RTC should only be accessed via EFI. There is no locking around it as the spec only has this as a requirement for the PC-AT CMOS device. Reviewed by: kib, imp Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D12595
2017-10-10 13:05:26 +00:00
arm64/arm64/efirt_machdep.c optional efirt
Add rudimentary support for building FreeBSD/arm64 with COMPAT_FREEBSD32. Right now I'm using two Raspberry Pi's (2 and 3) to test CloudABI support for armv6, armv7 and aarch64. It would be nice if I could restrict this to just a single instance when testing smaller changes. This is why I'd like to get COMPAT_CLOUDABI32 to work on arm64. As COMPAT_CLOUDABI32 depends on COMPAT_FREEBSD32, at least for the ELF loading, this change adds all of the bits necessary to at least build a kernel with COMPAT_FREEBSD32. All of the machine dependent system calls are still stubbed out, for the reason that implementations for these are only useful if actual support for running FreeBSD binaries is added. This is outside the scope of this work. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D13144
2017-11-24 13:50:53 +00:00
arm64/arm64/elf32_machdep.c optional compat_freebsd32
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/elf_machdep.c standard
arm64/arm64/exception.S standard
Add rudimentary support for building FreeBSD/arm64 with COMPAT_FREEBSD32. Right now I'm using two Raspberry Pi's (2 and 3) to test CloudABI support for armv6, armv7 and aarch64. It would be nice if I could restrict this to just a single instance when testing smaller changes. This is why I'd like to get COMPAT_CLOUDABI32 to work on arm64. As COMPAT_CLOUDABI32 depends on COMPAT_FREEBSD32, at least for the ELF loading, this change adds all of the bits necessary to at least build a kernel with COMPAT_FREEBSD32. All of the machine dependent system calls are still stubbed out, for the reason that implementations for these are only useful if actual support for running FreeBSD binaries is added. This is outside the scope of this work. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D13144
2017-11-24 13:50:53 +00:00
arm64/arm64/freebsd32_machdep.c optional compat_freebsd32
Temporary disable gicv3_its.c when FDT is missing from the kernel until INTRNG supports ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2017-02-06 15:24:52 +00:00
arm64/arm64/gicv3_its.c optional intrng fdt
Add intrng support to the GICv3 driver. It lacks ITS support so won't handle MSI or MSI-X interrupts, however this is enought to boot FreeBSD under the ARM Foundation Model with a GICv3 interrupt controller. Approved by: ABT Systems Ltd Relnotes: yes Sponsored by: The FreeBSD Foundation
2016-05-16 14:07:43 +00:00
arm64/arm64/gic_v3.c standard
iAdd ACPI attachments the the GIC and GICv3 interrupt controller drivers. For each we need to walk the MADT to find which we have, then add the driver as needed. As each may have a child they will each walk the same table to find these details. Reviewed by: mmel Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D8720
2018-01-11 17:23:24 +00:00
arm64/arm64/gic_v3_acpi.c optional acpi
Add intrng support to the GICv3 driver. It lacks ITS support so won't handle MSI or MSI-X interrupts, however this is enought to boot FreeBSD under the ARM Foundation Model with a GICv3 interrupt controller. Approved by: ABT Systems Ltd Relnotes: yes Sponsored by: The FreeBSD Foundation
2016-05-16 14:07:43 +00:00
arm64/arm64/gic_v3_fdt.c optional fdt
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/identcpu.c standard
arm64/arm64/in_cksum.c optional inet | inet6
arm64/arm64/locore.S standard no-obj
arm64/arm64/machdep.c standard
Add support for booting kernel directly from U-Boot using booti command. In some cases, like is locked bootstrap or device's inability to boot from removable media, we cannot use standard boot sequence and is necessary to boot kernel directly from U-Boot. Discussed with: jhibbits MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D13861
2019-12-07 16:14:23 +00:00
arm64/arm64/machdep_boot.c standard
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/mem.c standard
Import the Cortex String memcpy and memmove into the kernel. On ThunderX these show a 9-10% reduction in user and system time for a buildworld -j48. Obtained from: ABT Systems Ltd MFC after: 1 week Sponsored by: The FreeBSD Foundation
2016-10-25 14:04:35 +00:00
arm64/arm64/memcpy.S standard
arm64/arm64/memmove.S standard
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/minidump_machdep.c standard
Add support for SMP. This uses the FDT data to find the CPUs to start on, and psci to start them. I expect ACPI support to be added later. This has been tested on qemu with 2 cpus as that is the current value of MAXCPUS. This is expected to be increased in the future as FreeBSD has been tested on 48 cores on the Cavium ThunderX hardware. Partially based on a patch from Robin Randhawa from ARM. Approved by: ABT Systems Ltd Relnotes: yes Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3024
2015-07-09 13:23:29 +00:00
arm64/arm64/mp_machdep.c optional smp
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/nexus.c standard
Add an OF_decode_addr() implementation for arm64. Discussed with: andrew
2016-01-02 19:14:19 +00:00
arm64/arm64/ofw_machdep.c optional fdt
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/pmap.c standard
Load the stack in stack_save and stack_save_td. This uses the generalised unwind_frame function to read each stack frame until either the pc or stack are no longer withing the kernel's address space. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2015-07-31 15:32:32 +00:00
arm64/arm64/stack_machdep.c optional ddb | stack
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/support.S standard
arm64/arm64/swtch.S standard
arm64/arm64/sys_machdep.c standard
arm64/arm64/trap.c standard
arm64/arm64/uio_machdep.c standard
Add support for uma_small_alloc and uma_small_free, and make use of these. This is copied from the amd64 version with minor changes. These should be merged into a single file as from a quick look there are other copies of the same file in other parts of the tree. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2015-07-31 14:17:26 +00:00
arm64/arm64/uma_machdep.c standard
Add support for handling undefined instructions in userspace and the kernel. We can register callbacks to perform the required operation on the saved registers before returning. This is initially used to work around a bug in old versions of QEMU that trigger such an exception when reading from an ID register when it should load z zero value. I expect this could be used with other exception types, e.g. to emulate special register access from userland. Sponsored by: DARPA, AFRL
2017-09-14 17:29:51 +00:00
arm64/arm64/undefined.c standard
Load the stack in stack_save and stack_save_td. This uses the generalised unwind_frame function to read each stack frame until either the pc or stack are no longer withing the kernel's address space. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2015-07-31 15:32:32 +00:00
arm64/arm64/unwind.c optional ddb | kdtrace_hooks | stack
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
arm64/arm64/vfp.c standard
arm64/arm64/vm_machdep.c standard
Add MDIO PHY driver for NS2 ARM64 platform. Obtained from: Semihalf Authored by: Kornel Duleba <mindal@semihalf.com> Approved by: wma Differential Revision: https://reviews.freebsd.org/D21335
2020-04-06 05:48:58 +00:00
arm64/broadcom/brcmmdio/mdio_mux_iproc.c optional fdt
arm64/broadcom/brcmmdio/mdio_nexus_iproc.c optional fdt
arm64/broadcom/brcmmdio/mdio_ns2_pcie_phy.c optional fdt pci
Add genet driver for Raspberry Pi 4B Ethernet Add driver for Broadcom "GENET" version 5, as found in BCM-2711 on Raspberry Pi 4B. The driver is derived in part from the bcmgenet.c driver in NetBSD, along with bcmgenetreg.h. Reviewed by: manu Obtained from: in part from NetBSD Relnotes: yes, note addition Differential Revision: https://reviews.freebsd.org/D24436
2020-04-22 00:42:10 +00:00
arm64/broadcom/genet/if_genet.c optional SOC_BRCM_BCM2838 fdt genet
Support PEM that is not a PCI endpoint on ThunderX Some chip revisions don't have their external PCIe buses behind the internal bridge. Add support for FDT-configurable PEMs but keep ability for PCIe enumeration. Reviewed by: andrew, wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5285
2016-02-16 11:43:57 +00:00
arm64/cavium/thunder_pcie_fdt.c optional soc_cavm_thunderx pci fdt
arm64/cavium/thunder_pcie_pem.c optional soc_cavm_thunderx pci
arm64/cavium/thunder_pcie_pem_fdt.c optional soc_cavm_thunderx pci fdt
arm64/cavium/thunder_pcie_common.c optional soc_cavm_thunderx pci
Port cloudabi32.ko to FreeBSD/arm64. This change adds an implementation of a sysent for running CloudABI armv6 and armv7 binaries on FreeBSD/arm64. It is a somewhat literal copy of the armv6 version, except that it's been patched up to use the proper registers. Just like for cloudabi32.ko on FreeBSD/amd64, we make use of a vDSO that automatically pads system call parameters to 64-bit value. These are stored in a buffer on the stack, meaning we need to use copyin() and copyout() unconditionally.
2017-11-30 17:58:48 +00:00
arm64/cloudabi32/cloudabi32_sysvec.c optional compat_cloudabi32
Add support for CloudABI on ARM64. It turns out that it is pretty easy to make CloudABI work on ARM64. We essentially only need to copy over the sysvec from AMD64 and ensure that we use ARM64 specific registers. As there is an overlap between function argument and return registers, we do need to extend cloudabi64_schedtail() to only set its values if we're actually forking. Not when we're creating a new thread. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D3917
2015-10-22 11:09:25 +00:00
arm64/cloudabi64/cloudabi64_sysvec.c optional compat_cloudabi64
Add support for the Coresight technology from ARM Ltd. ARM Coresight is a solution for debug and trace of complex SoC designs. This includes a collection of drivers for ARM Coresight interconnect devices within a small Coresight framework. Supported devices are: o Embedded Trace Macrocell v4 (ETMv4) o Funnel o Dynamic Replicator o Trace Memory Controller (TMC) o CPU debug module Devices are connected to each other internally in SoC and the configuration of each device endpoints is described in FDT. Typical trace flow (as found on Qualcomm Snapdragon 410e): CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM CPU1 -> ETM1 -^ CPU2 -> ETM2 -^ CPU3 -> ETM3 -^ Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR) are hardware configurations of TMC. This is required for upcoming HWPMC tracing support. This is tested on single-core system only. Reviewed by: andrew (partially) Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D14618
2018-04-05 15:45:54 +00:00
arm64/coresight/coresight.c standard
Complete the ACPI support for ARM Coresight: o Parse the ACPI DSD (Device Specific Data) graph property and record device connections. o Split-out FDT support to a separate file. o Get the corresponding (FDT/ACPI) Coresight platform data in the device drivers. Sponsored by: DARPA, AFRL
2020-06-17 15:54:51 +00:00
arm64/coresight/coresight_acpi.c optional acpi
arm64/coresight/coresight_fdt.c optional fdt
Add support for the Coresight technology from ARM Ltd. ARM Coresight is a solution for debug and trace of complex SoC designs. This includes a collection of drivers for ARM Coresight interconnect devices within a small Coresight framework. Supported devices are: o Embedded Trace Macrocell v4 (ETMv4) o Funnel o Dynamic Replicator o Trace Memory Controller (TMC) o CPU debug module Devices are connected to each other internally in SoC and the configuration of each device endpoints is described in FDT. Typical trace flow (as found on Qualcomm Snapdragon 410e): CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM CPU1 -> ETM1 -^ CPU2 -> ETM2 -^ CPU3 -> ETM3 -^ Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR) are hardware configurations of TMC. This is required for upcoming HWPMC tracing support. This is tested on single-core system only. Reviewed by: andrew (partially) Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D14618
2018-04-05 15:45:54 +00:00
arm64/coresight/coresight_if.m standard
Rename coresight drivers: use underscores in filenames. Sponsored by: DARPA, AFRL
2020-06-09 15:56:41 +00:00
arm64/coresight/coresight_cmd.c standard
arm64/coresight/coresight_cpu_debug.c standard
arm64/coresight/coresight_etm4x.c standard
ARM Embedded Trace Macrocell v4.x driver: o Split-out FDT attachment to a separate file; o Add ACPI attachment. Sponsored by: DARPA, AFRL
2020-06-09 16:43:16 +00:00
arm64/coresight/coresight_etm4x_acpi.c optional acpi
arm64/coresight/coresight_etm4x_fdt.c optional fdt
Rename coresight drivers: use underscores in filenames. Sponsored by: DARPA, AFRL
2020-06-09 15:56:41 +00:00
arm64/coresight/coresight_funnel.c standard
ARM Coresight Funnel device: o Split-out FDT attachment to a separate file; o Add ACPI attachment; o Add support for the Static Funnel device. Sponsored by: DARPA, AFRL
2020-06-10 14:28:36 +00:00
arm64/coresight/coresight_funnel_acpi.c optional acpi
arm64/coresight/coresight_funnel_fdt.c optional fdt
Coresight replicator: o Add a header file; o Split-out FDT attachment to a separate file; o Add ACPI attachment. Sponsored by: DARPA, AFRL
2020-06-12 17:31:38 +00:00
arm64/coresight/coresight_replicator.c standard
arm64/coresight/coresight_replicator_acpi.c optional acpi
arm64/coresight/coresight_replicator_fdt.c optional fdt
Rename coresight drivers: use underscores in filenames. Sponsored by: DARPA, AFRL
2020-06-09 15:56:41 +00:00
arm64/coresight/coresight_tmc.c standard
ARM Coresight Trace Memory Controller (TMC): o Split-out FDT attachment to a separate file; o Add ACPI attachment. Sponsored by: DARPA, AFRL
2020-06-12 13:59:58 +00:00
arm64/coresight/coresight_tmc_acpi.c optional acpi
arm64/coresight/coresight_tmc_fdt.c optional fdt
Add support for Intel Stratix 10 platform. Intel Stratix 10 SoC includes a quad-core arm64 cluster and FPGA fabric. This adds support for reconfiguring FPGA. Accessing FPGA core of this SoC require the level of privilege EL3, while kernel runs in EL1 (lower) level of privilege. This provides an Intel service layer interface that uses SMCCC to pass queries to the secure-monitor (EL3). Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D21454
2019-09-13 16:50:57 +00:00
arm64/intel/firmware.c optional soc_intel_stratix10
arm64/intel/stratix10-soc-fpga-mgr.c optional soc_intel_stratix10
arm64/intel/stratix10-svc.c optional soc_intel_stratix10
Introduce IOMMU support for arm64 platform. This adds an arm64 iommu interface and a driver for Arm System Memory Management Unit version 3.2 (ARM SMMU v3.2) specified in ARM IHI 0070C document. Hardware overview is provided in the header of smmu.c file. The support is disabled by default. To enable add 'options IOMMU' to your kernel configuration file. The support was developed on Arm Neoverse N1 System Development Platform (ARM N1SDP), kindly provided by ARM Ltd. Currently, PCI-based devices and ACPI platforms are supported only. The support was tested on IOMMU-enabled Marvell SATA controller, Realtek Ethernet controller and a TI xHCI USB controller with a low to medium load only. Many thanks to Konstantin Belousov for help forming the generic IOMMU framework that is vital for this project; to Andrew Turner for adding IOMMU support to MSI interrupt code; to Mark Johnston for help with SMMU page management; to John Baldwin for explaining various IOMMU bits. Reviewed by: mmel Relnotes: yes Sponsored by: DARPA / AFRL Sponsored by: Innovate UK (Digital Security by Design programme) Differential Revision: https://reviews.freebsd.org/D24618
2020-11-16 21:55:52 +00:00
arm64/iommu/iommu.c optional iommu
arm64/iommu/iommu_if.m optional iommu
arm64/iommu/smmu.c optional iommu
arm64/iommu/smmu_acpi.c optional acpi iommu
arm64/iommu/smmu_quirks.c optional iommu
Add GPIO support for QorIQ boards. This patch adds a GPIO controller support targeted for NXP LS1046A SoC. The driver implements the following features: * setting direction of each pin (IN or OUT) * setting the mode of output pins (PUSHPULL or OPENDRAIN) * setting the state of each output pin (1 or 0) * reading the state of each input pin (1 or 0) Submitted by: Kamil Koczurek <kek@semihalf.com> Dawid Gorecki <dgr@semihalf.com> Reviewed by: manu Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D24353
2020-05-25 14:55:37 +00:00
arm64/qoriq/ls1046_gpio.c optional ls1046_gpio gpio fdt SOC_NXP_LS
Add LS1046A clockgen driver. Driver provides probe and attach functions for LS1046A clockgen and passes configuration information to QorIQ clockgen class. It may be used as a reference implementation for different QorIQ clockgen devices. Submitted by: Dawid Gorecki <dgr@semihalf.com> Reviewed by: mmel, manu Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D24352
2020-05-25 14:45:18 +00:00
arm64/qoriq/clk/ls1046a_clkgen.c optional clk SOC_NXP_LS
arm64/qoriq/clk/qoriq_clk_pll.c optional clk SOC_NXP_LS
arm64/qoriq/clk/qoriq_clkgen.c optional clk SOC_NXP_LS
Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC. This is required for ARM Coresight operation on Dragonboard 410c. Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D14987
2018-04-10 12:53:48 +00:00
arm64/qualcomm/qcom_gcc.c optional qcom_gcc fdt
Make BRCM2837 port conform FreeBSD/ARM64 guidelines - Rename SOC_BCM2837 to SOC_BRCM_BCM2837, put it to opt_soc.h - do not use files.XXX files, just move required sources to conf/files.arm64 and make them depend on soc_brcm_bcm2837 Suggested by: andrew
2016-10-14 22:23:03 +00:00
contrib/vchiq/interface/compat/vchi_bsd.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_arm.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_connected.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_core.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_shim.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
contrib/vchiq/interface/vchiq_arm/vchiq_util.c optional vchiq soc_brcm_bcm2837 \
compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
Add accelerated AES with using the ARMv8 crypto instructions. This is based on the AES-NI code, and modified as needed for use on ARMv8. When loaded the driver will check the appropriate field in the id_aa64isar0_el1 register to see if AES is supported, and if so the probe function will signal the driver should attach. With this I have seen up to 2000Mb/s from the cryptotest test with a single thread on a ThunderX Pass 2.0. Reviewed by: imp Obtained from: ABT Systems Ltd MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D8297
2016-11-21 11:18:00 +00:00
crypto/armv8/armv8_crypto.c optional armv8crypto
armv8_crypto_wrap.o optional armv8crypto \
dependency "$S/crypto/armv8/armv8_crypto_wrap.c" \
Create an empty stdint.h for arm_neon.h to include. The armv8crypto module includes arm_neon.h for the compiler intrinsic functions. This includes the userland stdint.h file that doesn't exist in the kernel. Fix this by providing an empty stdint.h to be used when we include arm_neon.h. Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D16254
2018-07-16 15:39:33 +00:00
compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} ${PROF} -march=armv8-a+crypto ${.IMPSRC}" \
Add accelerated AES with using the ARMv8 crypto instructions. This is based on the AES-NI code, and modified as needed for use on ARMv8. When loaded the driver will check the appropriate field in the id_aa64isar0_el1 register to see if AES is supported, and if so the probe function will signal the driver should attach. With this I have seen up to 2000Mb/s from the cryptotest test with a single thread on a ThunderX Pass 2.0. Reviewed by: imp Obtained from: ABT Systems Ltd MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D8297
2016-11-21 11:18:00 +00:00
no-implicit-rule \
clean "armv8_crypto_wrap.o"
Remove support for DES and Triple DES from OCF. It no longer has any in-kernel consumers via OCF. smbfs still uses single DES directly, so sys/crypto/des remains for that use case. Reviewed by: cem Relnotes: yes Sponsored by: Chelsio Communications Differential Revision: https://reviews.freebsd.org/D24773
2020-05-11 21:34:29 +00:00
crypto/des/des_enc.c optional netsmb
ossl: port to arm64 Enable in-kernel acceleration of SHA1 and SHA2 operations on arm64 by adding support for the ossl(4) crypto driver. This uses OpenSSL's assembly routines under the hood, which will detect and use SHA intrinsics if they are supported by the CPU. Reviewed by: jhb Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D27390
2020-12-04 21:12:17 +00:00
crypto/openssl/ossl_aarch64.c optional ossl
crypto/openssl/aarch64/sha1-armv8.S optional ossl \
compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${PROF} ${.IMPSRC}"
crypto/openssl/aarch64/sha256-armv8.S optional ossl \
compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${PROF} ${.IMPSRC}"
crypto/openssl/aarch64/sha512-armv8.S optional ossl \
compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${PROF} ${.IMPSRC}"
Add the start of INTRNG support for ACPI. This adds a new acpi_bus interface with a map_intr method. This is similar to the Open Firmware map_intr method and allows us to create the needed mapping from ACPI space to INTRNG space. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D8617
2018-01-11 17:09:12 +00:00
dev/acpica/acpi_bus_if.m optional acpi
Add basic support for ACPI. It splits out the nexus driver to two new drivers, one for fdt, one for acpi. It then uses this to decide if it will use fdt or acpi. The GICv2 (interrupt controller) and Generic Timer drivers have been updated to handle both cases. As this is early code we still need FDT to find the kernel console, and some parts are still missing, including PCI support. Differential Revision: https://reviews.freebsd.org/D2463 Reviewed by: jhb, jkim, emaste Obtained from: ABT Systems Ltd Relnotes: Yes Sponsored by: The FreeBSD Foundation
2015-06-11 15:45:33 +00:00
dev/acpica/acpi_if.m optional acpi
Add an acpi attachment to the pci_host_generic driver and have the ACPI bus provide it with its needed memory resources. This allows us to use PCIe on the ThunderX2 and, with a previous version of the patch, on the SoftIron 3000 with ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Sponsored by: DARPA, AFRL Sponsored by: Cavium (Hardware) Differential Revision: https://reviews.freebsd.org/D8767
2018-03-07 10:47:27 +00:00
dev/acpica/acpi_pci_link.c optional acpi pci
dev/acpica/acpi_pcib.c optional acpi pci
acpica: support parsing of arm64 affinity in acpi_pxm.c ACPI SRAT table on arm64 uses GICC entries to provide CPU locality information. These entries use an AcpiProcessorUid to identify the CPU (unlike on x86 where the entries have an APIC ID). Update acpi_pxm.c to extend the cpu_add/cpu_find/cpu_get_info functions to handle AcpiProcessorUid. Use the updated functions while parsing ACPI_SRAT_GICC_AFFINITY entry for arm64. Also update sys/conf/files.arm64 to build acpi_pxm.c when ACPI is enabled. Reviewed by: markj (previous version) Differential Revision: https://reviews.freebsd.org/D17942
2018-12-08 19:32:23 +00:00
dev/acpica/acpi_pxm.c optional acpi
Introduce a driver for NXP LS1046A SoC AHCI. Implement support for AHCI controller found in NXP QorIQ Layerscape SoCs. Submitted by: Artur Rojek <ar@semihalf.com> Reviewed by: manu Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D24466
2020-05-25 16:00:08 +00:00
dev/ahci/ahci_fsl_fdt.c optional SOC_NXP_LS ahci fdt
Add an ACPI attachment to the existing ahci_generic driver. This is used in some arm64 hardware, for example the AMD Opteron A1100. Reviewed by: mav Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D8852
2017-01-10 10:56:33 +00:00
dev/ahci/ahci_generic.c optional ahci
Add glue driver for Altera SOCFPGA Ethernet MAC (EMAC) found in Terasic DE10-Pro (an Intel Stratix 10 GX/SX FPGA Development Kit). The Altera EMAC is an instance of Synopsys DesignWare Gigabit MAC. This driver sets correct clock range for MDIO interface on Intel Stratix 10 platform. This is required due to lack of support for clock manager device for this platform that could tell us the clock frequency value for ethernet clock domain. Sponsored by: DARPA, AFRL
2019-07-29 16:32:23 +00:00
dev/altera/dwc/if_dwc_socfpga.c optional fdt dwc_socfpga
10Gigabit Ethernet driver for AMD SoC This patch has the driver for 10Gigabit Ethernet controller in AMD SoC. This driver is written compatible to the Iflib framework. The existing driver is for the old version of hardware. The submitted driver here is for the recent versions of the hardware where the Ethernet controller is PCI-E based. Submitted by: Rajesh Kumar <rajesh1.kumar@amd.com> MFC after: 1 month Relnotes: yes Differential Revision: https://reviews.freebsd.org/D25793
2020-10-11 16:01:16 +00:00
dev/axgbe/if_axgbe.c optional axa
dev/axgbe/xgbe-desc.c optional axa
dev/axgbe/xgbe-dev.c optional axa
dev/axgbe/xgbe-drv.c optional axa
dev/axgbe/xgbe-mdio.c optional axa
dev/axgbe/xgbe-sysctl.c optional axa
dev/axgbe/xgbe-txrx.c optional axa
dev/axgbe/xgbe_osdep.c optional axa
dev/axgbe/xgbe-phy-v1.c optional axa
Add generic device-tree cpufreq driver.
2016-09-06 21:18:14 +00:00
dev/cpufreq/cpufreq_dt.c optional cpufreq fdt
Move gpio and hwpmc to the correct place in files.arm64 Sponsored by: Innovate UK
2020-09-08 11:46:33 +00:00
dev/gpio/pl061.c optional pl061 gpio
dev/gpio/pl061_acpi.c optional pl061 gpio acpi
dev/gpio/pl061_fdt.c optional pl061 gpio fdt
dev/hwpmc/hwpmc_arm64.c optional hwpmc
dev/hwpmc/hwpmc_arm64_md.c optional hwpmc
ice(4): Introduce new driver for Intel E800 Ethernet controllers The ice(4) driver is the driver for the Intel E8xx series Ethernet controllers; currently with codenames Columbiaville and Columbia Park. These new controllers support 100G speeds, as well as introducing more queues, better virtualization support, and more offload capabilities. Future work will enable virtual functions (like in ixl(4)) and the other functionality outlined above. For full functionality, the kernel should be compiled with "device ice_ddp" like in the amd64 NOTES file, and/or ice_ddp_load="YES" should be added to /boot/loader.conf so that the DDP package file included in this commit can be downloaded to the adapter. Otherwise, the adapter will fall back to a single queue mode with limited functionality. A man page for this driver will be forthcoming. MFC after: 1 month Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D21959
2020-05-26 23:35:10 +00:00
dev/ice/if_ice_iflib.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_lib.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_osdep.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_resmgr.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_strings.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_iflib_recovery_txrx.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_iflib_txrx.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_common.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_controlq.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_dcb.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_flex_pipe.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_flow.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_nvm.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_sched.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_sriov.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_switch.c optional ice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
ice_ddp.c optional ice_ddp \
ice_ddp: Update package file to 1.3.16.0 This package is intended to be used with ice(4) version 0.26.16. That update will happen in a forthcoming commit. MFC after: 3 days Sponsored by: Intel Corporation
2020-09-04 17:37:58 +00:00
compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01031000 -mice_ddp -c${.TARGET}" \
ice(4): Introduce new driver for Intel E800 Ethernet controllers The ice(4) driver is the driver for the Intel E8xx series Ethernet controllers; currently with codenames Columbiaville and Columbia Park. These new controllers support 100G speeds, as well as introducing more queues, better virtualization support, and more offload capabilities. Future work will enable virtual functions (like in ixl(4)) and the other functionality outlined above. For full functionality, the kernel should be compiled with "device ice_ddp" like in the amd64 NOTES file, and/or ice_ddp_load="YES" should be added to /boot/loader.conf so that the DDP package file included in this commit can be downloaded to the adapter. Otherwise, the adapter will fall back to a single queue mode with limited functionality. A man page for this driver will be forthcoming. MFC after: 1 month Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D21959
2020-05-26 23:35:10 +00:00
no-implicit-rule before-depend local \
clean "ice_ddp.c"
ice_ddp.fwo optional ice_ddp \
dependency "ice_ddp.fw" \
compile-with "${NORMAL_FWO}" \
no-implicit-rule \
clean "ice_ddp.fwo"
ice_ddp.fw optional ice_ddp \
ice_ddp: Update package file to 1.3.16.0 This package is intended to be used with ice(4) version 0.26.16. That update will happen in a forthcoming commit. MFC after: 3 days Sponsored by: Intel Corporation
2020-09-04 17:37:58 +00:00
dependency "$S/contrib/dev/ice/ice-1.3.16.0.pkg" \
compile-with "${CP} $S/contrib/dev/ice/ice-1.3.16.0.pkg ice_ddp.fw" \
ice(4): Introduce new driver for Intel E800 Ethernet controllers The ice(4) driver is the driver for the Intel E8xx series Ethernet controllers; currently with codenames Columbiaville and Columbia Park. These new controllers support 100G speeds, as well as introducing more queues, better virtualization support, and more offload capabilities. Future work will enable virtual functions (like in ixl(4)) and the other functionality outlined above. For full functionality, the kernel should be compiled with "device ice_ddp" like in the amd64 NOTES file, and/or ice_ddp_load="YES" should be added to /boot/loader.conf so that the DDP package file included in this commit can be downloaded to the adapter. Otherwise, the adapter will fall back to a single queue mode with limited functionality. A man page for this driver will be forthcoming. MFC after: 1 month Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D21959
2020-05-26 23:35:10 +00:00
no-obj no-implicit-rule \
clean "ice_ddp.fw"
Add SY8106A Buck Regulator and Allwinner CIR devices to GENERIC arm64 kernel.
2019-04-20 03:21:47 +00:00
dev/iicbus/sy8106a.c optional sy8106a fdt
twsi: Clean up marvell part and add support for Marvell 7k/8k Sponsored by: Rubicon Communications, LLC ("Netgate")
2018-12-12 22:05:07 +00:00
dev/iicbus/twsi/mv_twsi.c optional twsi fdt
arm64: Add Allwinner I2C controller to GENERIC kernel
2017-07-09 12:53:02 +00:00
dev/iicbus/twsi/a10_twsi.c optional twsi fdt
dev/iicbus/twsi/twsi.c optional twsi fdt
Introduce IOMMU support for arm64 platform. This adds an arm64 iommu interface and a driver for Arm System Memory Management Unit version 3.2 (ARM SMMU v3.2) specified in ARM IHI 0070C document. Hardware overview is provided in the header of smmu.c file. The support is disabled by default. To enable add 'options IOMMU' to your kernel configuration file. The support was developed on Arm Neoverse N1 System Development Platform (ARM N1SDP), kindly provided by ARM Ltd. Currently, PCI-based devices and ACPI platforms are supported only. The support was tested on IOMMU-enabled Marvell SATA controller, Realtek Ethernet controller and a TI xHCI USB controller with a low to medium load only. Many thanks to Konstantin Belousov for help forming the generic IOMMU framework that is vital for this project; to Andrew Turner for adding IOMMU support to MSI interrupt code; to Mark Johnston for help with SMMU page management; to John Baldwin for explaining various IOMMU bits. Reviewed by: mmel Relnotes: yes Sponsored by: DARPA / AFRL Sponsored by: Innovate UK (Digital Security by Design programme) Differential Revision: https://reviews.freebsd.org/D24618
2020-11-16 21:55:52 +00:00
dev/iommu/busdma_iommu.c optional iommu
dev/iommu/iommu_gas.c optional iommu
Make BRCM2837 port conform FreeBSD/ARM64 guidelines - Rename SOC_BCM2837 to SOC_BRCM_BCM2837, put it to opt_soc.h - do not use files.XXX files, just move required sources to conf/files.arm64 and make them depend on soc_brcm_bcm2837 Suggested by: andrew
2016-10-14 22:23:03 +00:00
dev/mbox/mbox_if.m optional soc_brcm_bcm2837
Mark the Designware MMC and USB OTG drivers as FDT only. These are normally found on arm64 devices that use FDT. Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation
2016-07-20 17:46:33 +00:00
dev/mmc/host/dwmmc.c optional dwmmc fdt
arm64: Add explicit devices for dwmmc variant We used to include the hisi version if soc_hisi_hi6220 was present, include the altera version if dwmmc_altera was present and include the rockchip version if soc_rockchip_rk3328 was present. Now every version have it's own device directive. The rockchip version isn't named dwmmc_rockchip because all other rockchip driver are named rk_XXX. MFC after: 1 month
2019-12-11 18:36:07 +00:00
dev/mmc/host/dwmmc_altera.c optional dwmmc dwmmc_altera fdt
dev/mmc/host/dwmmc_hisi.c optional dwmmc dwmmc_hisi fdt
dev/mmc/host/dwmmc_rockchip.c optional dwmmc rk_dwmmc fdt
Add support for Armada 3700 in the NETA driver This patch enables using NETA driver on Marvell Armada 3700 SoC by introducing new compatible string, modifying clock source obtaining and also excluding unnecessary parts. The driver is added as a build option for arm64 platforms as well. Submitted by: Patryk Duda <pdk@semihalf.com> Obtained from: Semihalf Sponsored by: Semihalf Differential Revision: https://reviews.freebsd.org/D12258
2017-09-09 11:54:04 +00:00
dev/neta/if_mvneta_fdt.c optional neta fdt
dev/neta/if_mvneta.c optional neta mdio mii
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
dev/ofw/ofw_cpu.c optional fdt
Reduce OFW PCI code duplication - involves ARM, PPC and SPARC64 Import portions of the PowerPC OF PCI implementation into new file "ofwpci.c", common for other platforms. The files ofw_pci.c and ofw_pci.h from sys/powerpc/ofw no longer exist. All required declarations are moved to sys/dev/ofw/ofwpci.h. This creates a new ofw_pci_write_ivar() function and modifies some others methods. Most functions contain existing ppc implementations in the majority unchanged. Now there is no need to have multiple identical copies of methods for various architectures. Requested by: jhibbits Reviewed by: jhibbits, marius Submitted by: Marcin Mazurek <mma@semihalf.com> Obtained from: Semihalf Sponsored by: Annapurna Labs Differential Revision: https://reviews.freebsd.org/D4879
2016-03-29 15:19:56 +00:00
dev/ofw/ofwpci.c optional fdt pci
Add PCI Express driver for the ARM Neoverse N1 System Development Platform (N1SDP). Neoverse N1 is a high-performance ARM microarchitecture designed by the ARM Holdings for the server market. The PCI part on N1SDP was shipped untested and suffers from some integration issues. For instance accessing to not existing BDFs causes System Error (SError) exception. To mitigate this, the firmware scans the bus, catches SErrors and creates a table with valid BDFs. That allows us to filter-out accesses to invalid BDFs in this driver. Also the root complex config space (BDF == 0) has an unusual location in memory map, so remapping accesses to it is required. Finally, the config space is restricted to 32-bit accesses only. This was tested on the ARM boxes kindly provided by the ARM Ltd to the DARPA CHERI Project. In collaboration with: andrew Reviewed by: andrew Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D23349
2020-02-11 15:12:09 +00:00
dev/pci/controller/pci_n1sdp.c optional pci_n1sdp acpi
To allow for an ACPI attachment to the generic PCIe driver split off the FDT attachment to a new file. A separate ACPI attachment will then be added to allow arm64 servers with ACPI to use it over FDT. This should also help with merging this with the ofwpci driver, with further work needed to remove restrictions this driver places on resource allocation. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7319
2016-11-21 18:24:05 +00:00
dev/pci/pci_host_generic.c optional pci
Add an acpi attachment to the pci_host_generic driver and have the ACPI bus provide it with its needed memory resources. This allows us to use PCIe on the ThunderX2 and, with a previous version of the patch, on the SoftIron 3000 with ACPI. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Sponsored by: DARPA, AFRL Sponsored by: Cavium (Hardware) Differential Revision: https://reviews.freebsd.org/D8767
2018-03-07 10:47:27 +00:00
dev/pci/pci_host_generic_acpi.c optional pci acpi
To allow for an ACPI attachment to the generic PCIe driver split off the FDT attachment to a new file. A separate ACPI attachment will then be added to allow arm64 servers with ACPI to use it over FDT. This should also help with merging this with the ofwpci driver, with further work needed to remove restrictions this driver places on resource allocation. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7319
2016-11-21 18:24:05 +00:00
dev/pci/pci_host_generic_fdt.c optional pci fdt
Add driver for DesignWare PCIE core, and its Armada 8K specific attachement. MFC after: 3 weeks
2019-10-20 11:11:32 +00:00
dev/pci/pci_dw_mv.c optional pci fdt
dev/pci/pci_dw.c optional pci fdt
dev/pci/pci_dw_if.m optional pci fdt
Remove the psci option from arm64. It is now a standard option as it is required to boot correctly. Sponsored by: DARPA, AFRL
2018-06-10 19:42:44 +00:00
dev/psci/psci.c standard
Add generic arm/arm64 secure-monitor SMCCC interface and switch PSCI code to use it. This interface will also be used by Intel Stratix 10 platform. This was not tested on arm due to lack of PSCI-enabled arm hardware lying around. Reviewed by: andrew Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D21439
2019-09-13 15:56:33 +00:00
dev/psci/smccc_arm64.S standard
Add support for the ARM SMC Calling Convention (SMCCC). This is a method to call into the firmware in a similar way to the existing PSCI, and used PSCI to detect when SMCCC is enabled. There is a function ID space we can use. Currently we only support 3 functions in the ARM Architecture Calls region, however it is expected we will expend these in the future. Sponsored by: DARPA, AFRL
2018-06-13 15:32:00 +00:00
dev/psci/smccc.c standard
Add a driver for the SafeXcel EIP-97. The EIP-97 is a packet processing module found on the ESPRESSObin. This commit adds a crypto(9) driver for the crypto and hash engine in this device. An initial skeleton driver that could attach and submit requests was written by loos and others at Netgate, and the driver was finished by me. Support for separate AAD and output buffers will be added in a separate commit, to simplify merging to stable/12 (where those features don't exist). Reviewed by: gnn, jhb Feedback from: andrew, cem, manu MFC after: 1 week Sponsored by: Rubicon Communications, LLC (Netgate) Differential Revision: https://reviews.freebsd.org/D25417
2020-07-14 14:09:29 +00:00
dev/safexcel/safexcel.c optional safexcel fdt
Add support to the Marvell Xenon SDHCI controller. Tested on Espresso.bin (37x0) and Macchiato.bin (8k) with SD cards and eMMCs. Obtained from: pfSense Sponsored by: Rubicon Communications, LLC (Netgate)
2018-08-14 16:33:30 +00:00
dev/sdhci/sdhci_xenon.c optional sdhci_xenon sdhci fdt
Add an arm64 specific uart cpu driver. As arm64 may use ACPI to find the uart we need to handle both it and FDT, and as such we need to have an architecture specific driver. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7796
2016-11-21 11:27:14 +00:00
dev/uart/uart_cpu_arm64.c optional uart
Add a driver for the BCM2835 Mini-UART as seen on the RPi3 Reviewed by: andrew Approved by: andrew Differential Revision: https://reviews.freebsd.org/D15684
2018-06-12 13:26:31 +00:00
dev/uart/uart_dev_mu.c optional uart uart_mu
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
dev/uart/uart_dev_pl011.c optional uart pl011
Mark the Designware MMC and USB OTG drivers as FDT only. These are normally found on arm64 devices that use FDT. Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation
2016-07-20 17:46:33 +00:00
dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220
arm64: Add Synopsys DWC3 driver This add a driver for the Synopsys DWC3 driver found on multiple SoCs. It only supports host mode for now. MFC after: 1 month
2019-10-14 22:27:33 +00:00
dev/usb/controller/dwc3.c optional fdt dwc3
Add support for Armada 3700 EHCI This patch reuses ehci_mv driver by adding a support for the new compatible string and adding ehci_mv.c to list of available options for arm64 platforms. Submitted by: Patryk Duda <pdk@semihalf.com> Obtained from: Semihalf Sponsored by: Semihalf Differential Revision: https://reviews.freebsd.org/D12255
2017-09-09 11:06:58 +00:00
dev/usb/controller/ehci_mv.c optional ehci_mv fdt
Split out the attachment from the generic-ehci driver Create an attachment file for the existing ACPI attachment, and create a new FDT attachment for the generic-ehci driver. Submitted by: andrew (Original version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D19389
2019-10-03 18:53:03 +00:00
dev/usb/controller/generic_ehci.c optional ehci
dev/usb/controller/generic_ehci_acpi.c optional ehci acpi
dev/usb/controller/generic_ehci_fdt.c optional ehci fdt
Attach the generic USB OHCI driver to the arm64 build. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
2016-05-31 19:19:21 +00:00
dev/usb/controller/generic_ohci.c optional ohci fdt
dev/usb/controller/generic_usb_if.m optional ohci fdt
Allwinner USB DRD support (musb_otg) Allwinner USB DRD is based on the Mentor USB OTG controller, with a different register layout and a few missing registers. The code is by Andrew Turner (andrew). Reviewed by: hselasky, manu Obtained from: andrew MFC after: 5 weeks Differential Revision: https://reviews.freebsd.org/D5881
2020-09-07 06:39:00 +00:00
dev/usb/controller/musb_otg_allwinner.c optional musb fdt soc_allwinner_a64
usb_nop_xceiv: Add support for this pseudo device This is a "fake" phy that handle regulator, clocks and reset gpio. Only clock and regulator is supported for now. Sponsored-by: Rubicon Communications, LCC ("Netgate")
2019-02-27 20:52:35 +00:00
dev/usb/controller/usb_nop_xceiv.c optional fdt ext_resources
Add support for USB 3.0 XHCI via ACPI Ampere eMAG systems have XHCI just described in ACPI, not on PCI. Submitted by: Greg V <greg@unrelenting.technology> Reviewed by: andrew MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D19986
2019-05-08 15:42:39 +00:00
dev/usb/controller/generic_xhci.c optional xhci
dev/usb/controller/generic_xhci_acpi.c optional xhci acpi
dev/usb/controller/generic_xhci_fdt.c optional xhci fdt
Support new MDIO hierarchy in ThunderX DTB Some firmware revisions provide different DTB tree that include odd MDIO placement in the tree. This commit adds support for 2 new buses: - MRML bridge (PCIB subordinate) - MDIO nexus (MRML subordinate) This allows for the correct MDIO attachment with both - new and old firmware. Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5070
2016-01-28 15:44:14 +00:00
dev/vnic/mrml_bridge.c optional vnic fdt
Introduce initial support for Cavium's ThunderX networking interface - The driver consists of three main componens: PF, VF, BGX - Requires appropriate entries in DTS and MDIO driver - Supports only FDT configuration - Multiple Tx queues and single Rx queue supported - No RSS, HW checksum and TSO support - No more than 8 queues per-IF (only one Queue Set per IF) - HW statistics enabled - Works in all available MAC modes (1,10,20,40G) - Style converted to BSD according to style(9) - The code brings lmac_if interface used by the BGX driver to update its logical MACs state. Obtained from: Semihalf Sponsored by: The FreeBSD Foundation
2015-10-18 22:02:58 +00:00
dev/vnic/nic_main.c optional vnic pci
dev/vnic/nicvf_main.c optional vnic pci pci_iov
dev/vnic/nicvf_queues.c optional vnic pci pci_iov
dev/vnic/thunder_bgx_fdt.c optional vnic fdt
dev/vnic/thunder_bgx.c optional vnic pci
Introduce driver for Cavium's ThunderX MDIO This commit adds support for MDIO present in the ThunderX SoC. From the FDT point of view it is compatible with "octeon-3860-mdio" however only C22 mode is used. The code also implements lmac_if interface functions. Obtained from: Semihalf Sponsored by: The FreeBSD Foundation
2015-10-18 22:10:08 +00:00
dev/vnic/thunder_mdio_fdt.c optional vnic fdt
dev/vnic/thunder_mdio.c optional vnic
Allow building VNIC as a module Add directory structure and fix dependencies to be able to build and use Cavium VNIC driver as a module. Reviewed by: zbb Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D6345
2016-05-20 11:00:06 +00:00
dev/vnic/lmac_if.m optional inet | inet6 | vnic
Add support for intrng to arm64. As the GICv3 drivers will need to be updated, and until further testing can be done, this is disabled for now. It is expected arm64 will switch to this interface, and the old interface will be removed before 11.0 is released. Obtained from: ABT Systems Ltd Relnotes: yes Sponsored by: The FreeBSD Foundation
2016-05-16 10:48:51 +00:00
kern/msi_if.m optional intrng
kern/pic_if.m optional intrng
Move arm's devmap to some generic place, so it can be used by other architectures. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D6091 Sponsored by: DARPA, AFRL Sponsored by: HEIF5
2016-04-26 11:53:37 +00:00
kern/subr_devmap.c standard
Add support for intrng to arm64. As the GICv3 drivers will need to be updated, and until further testing can be done, this is disabled for now. It is expected arm64 will switch to this interface, and the old interface will be removed before 11.0 is released. Obtained from: ABT Systems Ltd Relnotes: yes Sponsored by: The FreeBSD Foundation
2016-05-16 10:48:51 +00:00
kern/subr_intr.c optional intrng
Convert arm's physmem interface to MI code The arm_physmem interface found in arm's MD code provides a convenient set of routines for adding/excluding physical memory regions and initializing important kernel globals such as Maxmem, realmem, phys_avail[], and dump_avail[]. It is especially convenient for FDT systems, since we can use FDT parsing functions and pass the result directly to one of these physmem routines. This interface is already in use on arm and arm64, and can be used to simplify this early initialization on RISC-V as well. This requires only a couple trivial changes: - Move arm_physmem_kernel_addr to arm/machdep.c. It is unused on arm64, and manipulated entirely in arm MD code. - Convert arm32_btop/arm64_btop to atop. This is equivalently defined on all architectures. - Drop the "arm" prefix. Reviewed by: manu, emaste ("looks reasonable") MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D24153
2020-04-19 00:12:30 +00:00
kern/subr_physmem.c standard
Bring in the start of the arm64 kernel. This is only the minimum set of files needed to boot in qemu. As such it is missing a few things. The bus_dma code is currently only stub functions with a full implementation from the development tree to follow. The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added. This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin. Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
2015-04-13 14:43:10 +00:00
libkern/bcmp.c standard
Port the NetBSD KCSAN runtime to FreeBSD. Update the NetBSD Kernel Concurrency Sanitizer (KCSAN) runtime to work in the FreeBSD kernel. It is a useful tool for finding data races between threads executing on different CPUs. This can be enabled by enabling KCSAN in the kernel config, or by using the GENERIC-KCSAN amd64 kernel. It works on amd64 and arm64, however the later needs a compiler change to allow -fsanitize=thread that KCSAN uses. Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D22315
2019-11-21 11:22:08 +00:00
libkern/memcmp.c standard \
compile-with "${NORMAL_C:N-fsanitize*}"
libkern/memset.c standard \
compile-with "${NORMAL_C:N-fsanitize*}"
armv8 has support for optional CRC32C instructions. This patch checks if they are available and if that is true make use of them. Thank you very much to Andrew Turner for providing help and review the patch! Reviewed by: andrew MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D10499
2017-04-27 17:53:05 +00:00
libkern/arm64/crc32c_armv8.S standard
First cut of DTrace for AArch64. Reviewed by: andrew, emaste Sponsored by: ARM Limited Differential Revision: https://reviews.freebsd.org/D2738
2015-07-01 15:51:11 +00:00
cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}"
cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}"
cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}"
rk3328: Add support for this SoC * rk_cru is a cru driver that needs to be subclassed by the real CRU driver * rk_clk_pll handle the pll type clock on RockChip SoC, it's only read only for now. * rk_clk_composite handle the different composite clock types (with gate, with mux etc ...) * rk_clk_gate handle the RockChip gates * rk_clk_mux handle the RockChip muxes (unused for now) * Only clocks for supported devices are supported for now, the rest will be added when driver support comes * The assigned-clock* property are not handled for now so we rely a lot on the bootloader to setup some initial values for some clocks.
2018-02-26 21:25:50 +00:00
arm64: Fix compile when removing SOC_ROCKCHIP_* options Make every rockchip file depend on the multiple soc_rockchip options While here make rk_i2c and rk_gpio depend on their device options. Reported by: sbruno
2019-02-10 08:14:06 +00:00
# RockChip Drivers
Add driver for Rockchip RK3399 eMMC PHY. Tested on NanoPC-T4 board. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D20840
2019-07-20 02:03:31 +00:00
arm64/rockchip/rk3399_emmcphy.c optional fdt rk_emmcphy soc_rockchip_rk3399
arm64: rockchip: Add rk_dwc3 driver This is a simplebus like driver that attaches the dwc3 child node and enable the clocks needed for the module. MFC after: 1 month
2019-10-25 18:08:59 +00:00
arm64/rockchip/rk_dwc3.c optional fdt rk_dwc3 soc_rockchip_rk3399
arm64: Fix compile when removing SOC_ROCKCHIP_* options Make every rockchip file depend on the multiple soc_rockchip options While here make rk_i2c and rk_gpio depend on their device options. Reported by: sbruno
2019-02-10 08:14:06 +00:00
arm64/rockchip/rk_i2c.c optional fdt rk_i2c soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399
arm64/rockchip/rk805.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399
arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
arm64/rockchip/rk_pinctrl.c optional fdt rk_pinctrl soc_rockchip_rk3328 | fdt rk_pinctrl soc_rockchip_rk3399
arm64/rockchip/rk_gpio.c optional fdt rk_gpio soc_rockchip_rk3328 | fdt rk_gpio soc_rockchip_rk3399
arm64: rockchip: Add driver for the io domain This driver configure the registers in the GRF according to the value of the regulators for the platform. Some IP can run with either 3.0V or 1.8V, if we don't configure them correctly according to the external voltage used they will not work. It's only done at boot time for now and might be needed at runtime for IP like sdmmc. Reviewed by: mmel Tested On: RockPro64, Firefly-RK3399 (gonzo), AIO-3288 (mmel) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22854
2019-12-28 15:30:50 +00:00
arm64/rockchip/rk_iodomain.c optional fdt rk_iodomain
arm64: rk3399: add SPI driver and include it in GENERIC config SPI driver for Rockchip's RK3399 SoC. Implements PIO mode, CS selection, SPI mode and frequency configuration. Reviewed by: manu MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D22148
2019-10-25 21:38:38 +00:00
arm64/rockchip/rk_spi.c optional fdt rk_spi
arm64: rockchip: Add usb2phy driver This driver is for the usb phy present on rockchip SoC. It only support RK3399 and host mode for now. The driver expose the usb clock needed by the usb controller.
2019-09-28 22:25:21 +00:00
arm64/rockchip/rk_usb2phy.c optional fdt rk_usb2phy soc_rockchip_rk3328 | soc_rockchip_rk3399
arm64: rockchip: Add RK3399 TypeC phy driver This is a driver for the USB3 PHY present in the RK3399. While the phy support DP (Display Port) the driver doesn't has we have no driver to test this with for now. All the lane and pll configuration is just magic values from rockchip. While the manual have some info on those registers it's really hard to understand how to calculate those values (if there is a way). MFC after: 1 month
2019-10-25 18:10:02 +00:00
arm64/rockchip/rk_typec_phy.c optional fdt rk_typec_phy soc_rockchip_rk3399
arm64: Fix compile when removing SOC_ROCKCHIP_* options Make every rockchip file depend on the multiple soc_rockchip options While here make rk_i2c and rk_gpio depend on their device options. Reported by: sbruno
2019-02-10 08:14:06 +00:00
arm64/rockchip/if_dwc_rk.c optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399
Add driver for temperature sensors found in RK32898, RK3328 and RK3399 SoC's. MFC after: 3 weeks Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D22442
2019-11-28 17:01:31 +00:00
arm64/rockchip/rk_tsadc_if.m optional fdt soc_rockchip_rk3399
arm64/rockchip/rk_tsadc.c optional fdt soc_rockchip_rk3399
arm64: rockchip: Add RK3399 PWM driver Add a driver for the pwm controller in the RK3399 SoC Submitted by: bdragon (original version) Reviewed by: ganbold (previous version) MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D19046
2020-01-16 21:25:13 +00:00
arm64/rockchip/rk_pwm.c optional fdt rk_pwm
Add driver for Rockchip PCIe root complex found in RK3399 SOC. Unfortunately, there are some limitations: - memory aperture of his controller is only 16MiB, so it is nearly unusable for graphic cards - every attempt to generate type 1 config cycle always causes trap. These config cycles are disabled now and we don't support cards with PCIe switch. - in some cases, attempt to do config cycle to (probably) not-yet ready card also causes trap. This cannot be detected at runtime, but it seems like very rare issue. MFC after: 3 weeks Differential Revision: https://reviews.freebsd.org/D22724
2019-12-14 14:56:34 +00:00
arm64/rockchip/rk_pcie.c optional fdt pci soc_rockchip_rk3399
arm64/rockchip/rk_pcie_phy.c optional fdt pci soc_rockchip_rk3399
arm64: Fix compile when removing SOC_ROCKCHIP_* options Make every rockchip file depend on the multiple soc_rockchip options While here make rk_i2c and rk_gpio depend on their device options. Reported by: sbruno
2019-02-10 08:14:06 +00:00
dev/dwc/if_dwc.c optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399
dev/dwc/if_dwc_if.m optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399
# RockChip Clock support
arm64/rockchip/clk/rk_cru.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
arm64/rockchip/clk/rk_clk_armclk.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
arm64/rockchip/clk/rk_clk_composite.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
Enhance Rockchip clocks implementation. - add support for fractional dividers - allow to declare fixed and linked clock MFC after: 3 weeks Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D22282
2019-11-08 19:13:11 +00:00
arm64/rockchip/clk/rk_clk_fract.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
arm64: Fix compile when removing SOC_ROCKCHIP_* options Make every rockchip file depend on the multiple soc_rockchip options While here make rk_i2c and rk_gpio depend on their device options. Reported by: sbruno
2019-02-10 08:14:06 +00:00
arm64/rockchip/clk/rk_clk_gate.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
arm64/rockchip/clk/rk_clk_mux.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
arm64/rockchip/clk/rk_clk_pll.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
rk3328: Add support for this SoC * rk_cru is a cru driver that needs to be subclassed by the real CRU driver * rk_clk_pll handle the pll type clock on RockChip SoC, it's only read only for now. * rk_clk_composite handle the different composite clock types (with gate, with mux etc ...) * rk_clk_gate handle the RockChip gates * rk_clk_mux handle the RockChip muxes (unused for now) * Only clocks for supported devices are supported for now, the rest will be added when driver support comes * The assigned-clock* property are not handled for now so we rely a lot on the bootloader to setup some initial values for some clocks.
2018-02-26 21:25:50 +00:00
arm64/rockchip/clk/rk3328_cru.c optional fdt soc_rockchip_rk3328
arm64/rockchip: add RK3399 support Add CRU (Clock and Reset Unit) driver for RK3399. Add support in rk_pinctrl driver. Submitted by: Greg V <greg@unrelenting.technology> (Original version) Differential Revision: https://reviews.freebsd.org/D16732 MFC after: 1 month
2018-12-01 20:28:16 +00:00
arm64/rockchip/clk/rk3399_cru.c optional fdt soc_rockchip_rk3399
arm64/rockchip/clk/rk3399_pmucru.c optional fdt soc_rockchip_rk3399
Add i.MX 8M Quad support - Add CCM driver and clocks implementations for i.MX 8M - Add GPC driver for iMX8 - Add clock tree for i.MX 8M Quad - Add clocks support and new compat strings (where required) for existing i.MX 6 UART, I2C, and GPIO drivers - Enable aarch64-compatible drivers form i.MX 6 in arm64 GENERIC kernel config - Add dtb/imx8 kernel module with DTBs for Nitrogen8M and iMX8MQ EVK With this patch both Nitrogen8M and iMX8MQ EVK boot with NFS root up to multiuser login prompt Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D25274
2020-07-01 00:33:16 +00:00
# i.MX8 Clock support
arm64/freescale/imx/imx8mq_ccm.c optional fdt soc_freescale_imx8
arm64/freescale/imx/clk/imx_clk_gate.c optional fdt soc_freescale_imx8
arm64/freescale/imx/clk/imx_clk_mux.c optional fdt soc_freescale_imx8
arm64/freescale/imx/clk/imx_clk_composite.c optional fdt soc_freescale_imx8
arm64/freescale/imx/clk/imx_clk_sscg_pll.c optional fdt soc_freescale_imx8
arm64/freescale/imx/clk/imx_clk_frac_pll.c optional fdt soc_freescale_imx8
# iMX drivers
arm64: Only compile imx8 files if soc_freescale_imx8 is selected No Objection from: gonzo
2020-07-26 10:07:05 +00:00
arm/freescale/imx/imx_gpio.c optional gpio soc_freescale_imx8
Add i.MX 8M Quad support - Add CCM driver and clocks implementations for i.MX 8M - Add GPC driver for iMX8 - Add clock tree for i.MX 8M Quad - Add clocks support and new compat strings (where required) for existing i.MX 6 UART, I2C, and GPIO drivers - Enable aarch64-compatible drivers form i.MX 6 in arm64 GENERIC kernel config - Add dtb/imx8 kernel module with DTBs for Nitrogen8M and iMX8MQ EVK With this patch both Nitrogen8M and iMX8MQ EVK boot with NFS root up to multiuser login prompt Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D25274
2020-07-01 00:33:16 +00:00
arm/freescale/imx/imx_i2c.c optional fsliic
arm64: Only compile imx8 files if soc_freescale_imx8 is selected No Objection from: gonzo
2020-07-26 10:07:05 +00:00
arm/freescale/imx/imx_machdep.c optional fdt soc_freescale_imx8
Add i.MX 8M Quad support - Add CCM driver and clocks implementations for i.MX 8M - Add GPC driver for iMX8 - Add clock tree for i.MX 8M Quad - Add clocks support and new compat strings (where required) for existing i.MX 6 UART, I2C, and GPIO drivers - Enable aarch64-compatible drivers form i.MX 6 in arm64 GENERIC kernel config - Add dtb/imx8 kernel module with DTBs for Nitrogen8M and iMX8MQ EVK With this patch both Nitrogen8M and iMX8MQ EVK boot with NFS root up to multiuser login prompt Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D25274
2020-07-01 00:33:16 +00:00
arm64/freescale/imx/imx7gpc.c optional fdt soc_freescale_imx8
dev/ffec/if_ffec.c optional ffec
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