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freebsd-skq/sys/arm/at91/at91_twi.c

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Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
/*-
* Copyright (c) 2006 M. Warner Losh. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
Tweak the disclaimer section of the license to match COPYRIGHT, for better or worse. Ok'd by folks that have additional copyrights to the files in cases where there's joint authorship.
2008-11-25 00:13:26 +00:00
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/kernel.h>
#include <sys/lock.h>
#include <sys/mbuf.h>
#include <sys/malloc.h>
#include <sys/module.h>
#include <sys/mutex.h>
#include <sys/rman.h>
#include <machine/bus.h>
#include <arm/at91/at91rm92reg.h>
#include <arm/at91/at91_twireg.h>
Use at91_master_clock instead of AT91C_MASTER_CLOCK.
2009-01-22 21:55:37 +00:00
#include <arm/at91/at91var.h>
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
#include <dev/iicbus/iiconf.h>
#include <dev/iicbus/iicbus.h>
#include "iicbus_if.h"
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
#define TWI_SLOW_CLOCK 1500
#define TWI_FAST_CLOCK 45000
#define TWI_FASTEST_CLOCK 90000
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
struct at91_twi_softc
{
device_t dev; /* Myself */
void *intrhand; /* Interrupt handle */
struct resource *irq_res; /* IRQ resource */
struct resource *mem_res; /* Memory resource */
struct mtx sc_mtx; /* basically a perimeter lock */
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
volatile uint32_t flags;
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
uint32_t cwgr;
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
int sc_started;
int twi_addr;
device_t iicbus;
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
};
static inline uint32_t
RD4(struct at91_twi_softc *sc, bus_size_t off)
{
return bus_read_4(sc->mem_res, off);
}
static inline void
WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
{
bus_write_4(sc->mem_res, off, val);
}
#define AT91_TWI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
#define AT91_TWI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
#define AT91_TWI_LOCK_INIT(_sc) \
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
"twi", MTX_DEF)
#define AT91_TWI_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
#define AT91_TWI_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
#define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
#define TWI_DEF_CLK 100000
static devclass_t at91_twi_devclass;
/* bus entry points */
static int at91_twi_probe(device_t dev);
static int at91_twi_attach(device_t dev);
static int at91_twi_detach(device_t dev);
static void at91_twi_intr(void *);
/* helper routines */
static int at91_twi_activate(device_t dev);
static void at91_twi_deactivate(device_t dev);
static int
at91_twi_probe(device_t dev)
{
device_set_desc(dev, "TWI");
return (0);
}
static int
at91_twi_attach(device_t dev)
{
struct at91_twi_softc *sc = device_get_softc(dev);
int err;
sc->dev = dev;
err = at91_twi_activate(dev);
if (err)
goto out;
AT91_TWI_LOCK_INIT(sc);
/*
* Activate the interrupt
*/
err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
o break newbus api: add a new argument of type driver_filter_t to bus_setup_intr() o add an int return code to all fast handlers o retire INTR_FAST/IH_FAST For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current Reviewed by: many Approved by: re@
2007-02-23 12:19:07 +00:00
NULL, at91_twi_intr, sc, &sc->intrhand);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
if (err) {
AT91_TWI_LOCK_DESTROY(sc);
goto out;
}
Use at91_master_clock instead of AT91C_MASTER_CLOCK.
2009-01-22 21:55:37 +00:00
sc->cwgr = TWI_CWGR_CKDIV(8 * at91_master_clock / TWI_FASTEST_CLOCK) |
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
TWI_CWGR_CHDIV(TWI_CWGR_DIV(TWI_DEF_CLK)) |
TWI_CWGR_CLDIV(TWI_CWGR_DIV(TWI_DEF_CLK));
WR4(sc, TWI_CR, TWI_CR_SWRST);
WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
WR4(sc, TWI_CWGR, sc->cwgr);
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL)
device_printf(dev, "could not allocate iicbus instance\n");
/* probe and attach the iicbus */
bus_generic_attach(dev);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
out:;
if (err)
at91_twi_deactivate(dev);
return (err);
}
static int
at91_twi_detach(device_t dev)
{
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
struct at91_twi_softc *sc;
int rv;
sc = device_get_softc(dev);
at91_twi_deactivate(dev);
if (sc->iicbus && (rv = device_delete_child(dev, sc->iicbus)) != 0)
return (rv);
Add locking to the various iicbus(4) bridge drivers: - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
AT91_TWI_LOCK_DESTROY(sc);
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
return (0);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
}
static int
at91_twi_activate(device_t dev)
{
struct at91_twi_softc *sc;
int rid;
sc = device_get_softc(dev);
rid = 0;
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->mem_res == NULL)
goto errout;
rid = 0;
sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
RF_ACTIVE);
Progress commit for getting TWI working
2006-10-20 07:06:39 +00:00
if (sc->irq_res == NULL)
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
goto errout;
return (0);
errout:
at91_twi_deactivate(dev);
return (ENOMEM);
}
static void
at91_twi_deactivate(device_t dev)
{
struct at91_twi_softc *sc;
sc = device_get_softc(dev);
if (sc->intrhand)
bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
sc->intrhand = 0;
bus_generic_detach(sc->dev);
if (sc->mem_res)
Release the resources for the registers for the TWI device with SYS_RES_MEMORY to match how we allocate them... Noticed by: Ian Lepore
2008-05-28 14:35:15 +00:00
bus_release_resource(dev, SYS_RES_MEMORY,
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
rman_get_rid(sc->mem_res), sc->mem_res);
sc->mem_res = 0;
if (sc->irq_res)
bus_release_resource(dev, SYS_RES_IRQ,
rman_get_rid(sc->irq_res), sc->irq_res);
sc->irq_res = 0;
return;
}
static void
at91_twi_intr(void *xsc)
{
struct at91_twi_softc *sc = xsc;
uint32_t status;
status = RD4(sc, TWI_SR);
if (status == 0)
return;
Add locking to the various iicbus(4) bridge drivers: - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
AT91_TWI_LOCK(sc);
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
sc->flags |= status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_NACK);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
if (status & TWI_SR_RXRDY)
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
sc->flags |= TWI_SR_RXRDY;
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
if (status & TWI_SR_TXRDY)
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
sc->flags |= TWI_SR_TXRDY;
if (status & TWI_SR_TXCOMP)
sc->flags |= TWI_SR_TXCOMP;
WR4(sc, TWI_IDR, status);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
wakeup(sc);
Add locking to the various iicbus(4) bridge drivers: - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
AT91_TWI_UNLOCK(sc);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
return;
}
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
static int
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
at91_twi_wait(struct at91_twi_softc *sc, uint32_t bit)
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
{
int err = 0;
MFp4: Make it work :-) o Don't delay when checking the done bits. There's no gain other than a small performance hit. o calculate the clock divisors better (things are still way slow, so maybe there's more here?) o don't always fail reset. Always succeed instead. o fix inverted logic around at91_twi_wait() return value o remove debug code o remove unneeded, unworking junk
2006-11-22 06:51:59 +00:00
int counter = 100000;
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
uint32_t sr;
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
Add locking to the various iicbus(4) bridge drivers: - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
AT91_TWI_ASSERT_LOCKED(sc);
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
while (!((sr = RD4(sc, TWI_SR)) & bit) && counter-- > 0 &&
!(sr & TWI_SR_NACK))
MFp4: Make it work :-) o Don't delay when checking the done bits. There's no gain other than a small performance hit. o calculate the clock divisors better (things are still way slow, so maybe there's more here?) o don't always fail reset. Always succeed instead. o fix inverted logic around at91_twi_wait() return value o remove debug code o remove unneeded, unworking junk
2006-11-22 06:51:59 +00:00
continue;
Progress commit for getting TWI working
2006-10-20 07:06:39 +00:00
if (counter <= 0)
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
err = EBUSY;
else if (sr & TWI_SR_NACK)
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
err = ENXIO; // iic nack convention
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
return (err);
}
static int
at91_twi_rst_card(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
{
struct at91_twi_softc *sc;
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
int clk;
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
sc = device_get_softc(dev);
Add locking to the various iicbus(4) bridge drivers: - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
AT91_TWI_LOCK(sc);
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
if (oldaddr)
*oldaddr = sc->twi_addr;
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
sc->twi_addr = addr;
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
/*
* speeds are for 1.5kb/s, 45kb/s and 90kb/s.
*/
switch (speed) {
case IIC_SLOW:
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
clk = TWI_SLOW_CLOCK;
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
break;
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
case IIC_FAST:
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
clk = TWI_FAST_CLOCK;
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
break;
case IIC_UNKNOWN:
case IIC_FASTEST:
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
default:
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
clk = TWI_FASTEST_CLOCK;
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
break;
}
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
sc->cwgr = TWI_CWGR_CKDIV(1) | TWI_CWGR_CHDIV(TWI_CWGR_DIV(clk)) |
TWI_CWGR_CLDIV(TWI_CWGR_DIV(clk));
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
WR4(sc, TWI_CR, TWI_CR_SWRST);
WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
WR4(sc, TWI_CWGR, sc->cwgr);
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
printf("setting cwgr to %#x\n", sc->cwgr);
Add locking to the various iicbus(4) bridge drivers: - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
AT91_TWI_UNLOCK(sc);
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
MFp4: Make it work :-) o Don't delay when checking the done bits. There's no gain other than a small performance hit. o calculate the clock divisors better (things are still way slow, so maybe there's more here?) o don't always fail reset. Always succeed instead. o fix inverted logic around at91_twi_wait() return value o remove debug code o remove unneeded, unworking junk
2006-11-22 06:51:59 +00:00
return 0;
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
}
static int
strict kobj signatures: number of fixes for arm architecture no functional changes should result Reviewed by: imp, current@ Approved by: jhb (mentor)
2009-06-11 17:05:13 +00:00
at91_twi_callback(device_t dev, int index, caddr_t data)
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
{
int error = 0;
switch (index) {
case IIC_REQUEST_BUS:
break;
case IIC_RELEASE_BUS:
break;
default:
error = EINVAL;
}
return (error);
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
}
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
static int
at91_twi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
{
struct at91_twi_softc *sc;
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
int i, len, err;
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
uint32_t rdwr;
uint8_t *buf;
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
uint32_t sr;
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
sc = device_get_softc(dev);
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
err = 0;
AT91_TWI_LOCK(sc);
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
for (i = 0; i < nmsgs; i++) {
/*
* The linux atmel driver doesn't use the internal device
* address feature of twi. A separate i2c message needs to
* be written to use this.
* See http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
* for details. Upon reflection, we could use this as an
* optimization, but it is unclear the code bloat will
* result in faster/better operations.
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
*/
rdwr = (msgs[i].flags & IIC_M_RD) ? TWI_MMR_MREAD : 0;
WR4(sc, TWI_MMR, TWI_MMR_DADR(msgs[i].slave) | rdwr);
len = msgs[i].len;
buf = msgs[i].buf;
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
/* zero byte transfers aren't allowed */
if (len == 0 || buf == NULL) {
err = EINVAL;
goto out;
}
if (len == 1)
WR4(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
else
WR4(sc, TWI_CR, TWI_CR_START);
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
if (msgs[i].flags & IIC_M_RD) {
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
sr = RD4(sc, TWI_SR);
while (!(sr & TWI_SR_TXCOMP)) {
if ((sr = RD4(sc, TWI_SR)) & TWI_SR_RXRDY) {
len--;
*buf++ = RD4(sc, TWI_RHR) & 0xff;
if (len == 0 && msgs[i].len != 1)
WR4(sc, TWI_CR, TWI_CR_STOP);
}
}
if (len > 0 || (sr & TWI_SR_NACK)) {
err = ENXIO; // iic nack convention
goto out;
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
}
} else {
while (len--) {
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
if (len == 0 && msgs[i].len != 1)
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
WR4(sc, TWI_CR, TWI_CR_STOP);
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
if ((err = at91_twi_wait(sc, TWI_SR_TXRDY)))
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
goto out;
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
WR4(sc, TWI_THR, *buf++);
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
}
}
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
if ((err = at91_twi_wait(sc, TWI_SR_TXCOMP)))
break;
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
}
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
out:;
if (err) {
MFp4: A bunch of patches from myself and Tisco to improve the robustness of IIC transactions when parts aren't present. This also removes a bunch of debug. This also moves this driver to 7-1 addressing rather than 6-0 addressing, which is more inline with all the other iic drivers in the tree. I've tested this for about a million years on the systems at work.
2007-03-23 22:57:24 +00:00
WR4(sc, TWI_CR, TWI_CR_SWRST);
WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
WR4(sc, TWI_CWGR, sc->cwgr);
Make this work a lot better: Remove a lot of older cruft not needed. Improve ISR support, but it is still unused since polling is faster Properly initalize the speed register to get 90kb/s, not 400b/s. Try to catch NACK Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
}
AT91_TWI_UNLOCK(sc);
return (err);
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
}
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
static device_method_t at91_twi_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, at91_twi_probe),
DEVMETHOD(device_attach, at91_twi_attach),
DEVMETHOD(device_detach, at91_twi_detach),
Connect twi to the FreeBSD iicbus infrastructure.
2006-04-06 04:31:19 +00:00
/* iicbus interface */
DEVMETHOD(iicbus_callback, at91_twi_callback),
DEVMETHOD(iicbus_reset, at91_twi_rst_card),
MFp4: first cut at getting I2C transfers working (generically). I'm unsure if this driver correctly implements all the start/stop junk right (but it did or didn't before I made this commit).
2006-09-07 21:53:28 +00:00
DEVMETHOD(iicbus_transfer, at91_twi_transfer),
Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC is a ARM920T based CPU with a bunch of built-in peripherals. The inital import supports the SPI bus, the TWI bus (although iicbus integration is not complete), the uarts, the system timer and the onboard ethernet. Support for the Kwikbyte KB9202 (http://www.kwikbyte.com) board is also included, although there's no reason why the 9200 and the 9201 wouldn't also work. Primitive support for running under the skyeye emulator is also provided (although skyeye's support for the AT91RM9200 is a little weak). The code has been structured so that other members of Atmel's arm family can be supported in the future. The AT91SAM9260 is not presently supported due to lack of hardware. The arm7tdmi families are also not supported becasue they lack an MMU. Many thanks to cognet@ for his help and assistance in bringing up this board. He did much of the vm work and wrote parts of the uart and system timer code as well as the bus space implementation. The system boots to single user w/o problem, although the serial console is a little slow and the ethernet driver is still in flux. This work was sponsored by Timing Solutions, Corporation. I am grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
{ 0, 0 }
};
static driver_t at91_twi_driver = {
"at91_twi",
at91_twi_methods,
sizeof(struct at91_twi_softc),
};
DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, 0, 0);
MFp4: tweaks
2006-07-14 22:40:24 +00:00
DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, 0, 0);
at91_twi depends on the iicbus module to satisfy its symbols when loaded, so make that explicit. Works for the monolithic kernel case, won't work for the kldload case.
2007-02-06 12:07:14 +00:00
MODULE_DEPEND(at91_twi, iicbus, 1, 1, 1);
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