23 Commits

Author SHA1 Message Date
mw
06ba4aaddd Enable ArmadaXP using INTRNG interrupt controller
Defining INTRNG remove some necessary registers and declarations of
pic_init_secondary, pic_ipi_send, pic_ipi_read and pic_ipi_clear.
Because Marvell ArmadaXP and Armada38X always use INTRNG, include all
INTRNG code and remove code that does not use it.
Separate pic registers declarations for Armada38X are unnecessary, it
works properly with ArmadaXP config.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14734
2018-04-03 21:17:19 +00:00
pfg
1d4c34376a sys/arm: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 15:04:10 +00:00
zbb
9d6e7340c6 Enable HWPMC overflow IRQ on both CPUs in MPIC
This commit enables usage of HWPMC interrupts for the
Marvell SoCs, which use MPIC (Armada38x and ArmadaXP).
Those interrupts require extra unmasking, comparing to
others. Also, in order to process counters per-CPU,
they are masked/unmasked using separate registers' sets
for each core.

Submitted by: Michal Mazur <mkm@semihalf.com>
    	      Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield, Netgate
Differential revision: https://reviews.freebsd.org/D10913
2017-06-13 18:55:21 +00:00
wma
910ae5e9b5 Fix MPIC mask/unmask
Before the fix for single interrupt, both percpu and non-percpu routes
were enabled/disable at the same time.

Submitted by:  Marcin Wojtas <mw@semihalf.com
Obtained from: Semihalf
Sponsored by:  Stormshield, Netgate
Reviewed by:   loos
Differential revision: https://reviews.freebsd.org/D10716
2017-05-19 08:25:40 +00:00
loos
cad66fd322 Use the MACROS to access the Global mpic registers. Makes the code
consistent and easier to read.

While here, remove two unused static functions and fix a unused function
warning when building !INTRNG.

No functional changes.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2017-05-17 21:14:27 +00:00
zbb
254aea0839 Fix registration of MPIC driver
Submitted by:  Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Netgate
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10717
2017-05-17 15:57:14 +00:00
zbb
19cc118b1f Correct MPIC order of attachment
If MPIC happens to be a slave interrupt controller (as on Armada38x),
it should be attached after primary interrupt controller.
Thus BUS_PASS_ORDER_LATE was added to default BUS_PASS_INTERRUPT.

This change doesn't affect the cases when MPIC is standalone IC.

Submitted by:  Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Stormshield, Netgate
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10715
2017-05-17 15:56:09 +00:00
mmel
e4f325a150 ARM: Remove unused includes.
MFC after: 1 week
2016-10-09 10:25:47 +00:00
skra
1f47b7e46f INTRNG - implement pic_post_filter method. This method is fundamental
one and must always be implemented for a PIC. There is no default for
it intentionally.
2016-05-22 11:42:34 +00:00
andrew
5755bcaba9 Return the struct intr_pic pointer from intr_pic_register. This will be
needed in later changes where we may not be able to lock the pic list lock
to perform a lookup, e.g. from within interrupt context.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-18 15:05:44 +00:00
skra
ee35e13013 INTRNG - redefine struct intr_map_data to avoid headers pollution. Each
struct associated with some type defined in enum intr_map_data_type
must have struct intr_map_data on the top of its own definition now.
When such structs are used, correct type and size must be filled in.

There are three such structs defined in sys/intr.h now. Their
definitions should be moved to corresponding headers by follow-up
commits.

While this change was propagated to all INTRNG like PICs,
pic_map_intr() method implementations were corrected on some places.
For this specific method, it's ensured by a caller that the 'data'
argument passed to this method is never NULL. Also, the return error
values were standardized there.
2016-05-05 13:31:19 +00:00
pfg
eac6031c8a sys/arm: Minor spelling fixes.
Only affects comments: no functional change.
2016-05-04 15:48:59 +00:00
andrew
b72ace02b4 Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine
independent code that needs to know about INTRNG such as PCI drivers.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-15 16:05:41 +00:00
skra
11cdd44a03 Remove FDT specific parts from INTRNG. Change its interface to make it
universal.

(1) New struct intr_map_data is defined as a container for arbitrary
description of an interrupt used by a device. Typically, an interrupt
number and configuration relevant to an interrupt controller is encoded
in such description. However, any additional information may be encoded
too like a set of cpus on which an interrupt should be enabled or vendor
specific data needed for setup of an interrupt in controller. The struct
intr_map_data itself is meant to be opaque for INTRNG.

(2) An intr_map_irq() function is created which takes an interrupt
controller identification and struct intr_map_data as arguments and
returns global interrupt number which identifies an interrupt.

(3) A set of functions to be used by bus drivers is created as well as
a corresponding set of methods for interrupt controller drivers. These
sets take both struct resource and struct intr_map_data as one of the
arguments. There is a goal to keep struct intr_map_data in struct
resource, however, this way a final solution is not limited to that.

(4) Other small changes are done to reflect new situation.

This is only first step aiming to create stable interface for interrupt
controller drivers. Thus, some temporary solution is taken. Interrupt
descriptions for devices are stored in INTRNG and two specific mapping
function are created to be temporary used by bus drivers. That's why
the struct intr_map_data is not opaque for INTRNG now. This temporary
solution will be replaced by final one in next step.

Differential Revision:	https://reviews.freebsd.org/D5730
2016-04-04 09:15:25 +00:00
wma
ebabdead98 Remove redefinitions in ARMADA code
* Rename IRQ_MASK to MPIC_IRQ_MASK not to overlap with
  register name from mvreg.h
* Remove ARM_INTRNG from ARMADA38X, apparently was already
  included.
2016-03-15 06:06:09 +00:00
wma
5715f97c30 Make MPIC compatible with ARM_INTRNG
After ARM_INTRNG introduction, MPIC code needed several modifications:
- IRQ resource and its handler added
-  several DEVMETHODs of INTRNG interface implemented
-  defines enhanced to ensure code compiles as well for AXP as for A38X
- added dummy MSI_IRQ, ERR_IRQ defines for Armada38x
- MPIC driver was added to files.armada38x, ARM_INTRNG option enabled in
  kernconf file and regs of MPIC corrected in dts file.

Instead of modifying Armada38X DTS, offsets to CPU registers defined in
driver were changed. That required restoring 'reg' property of mpic node
in ArmadaXP to state compliant with Linux DTS.

Additionally, required ARM_INTRNG definitions were added to mv_common.c.

Submitted by:          Bartosz Szczepanek <bsz@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           adrian, andrew, ian, skra
Approved by:           cognet (mentor)
Differential Revision: https://reviews.freebsd.org/D5030
2016-03-14 07:05:41 +00:00
andrew
e2b10f2227 Almost all copies of platform_mp_init_secondary just called
intr_pic_init_secondary. Replace them with a direct call. On BCM2836
and ARMADA XP we need to add this function, but it can be empty.

Reviewed by:	ian, imp
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D5460
2016-02-26 16:04:47 +00:00
andrew
c71425db1d An IPI must be cleared before it is handled otherwise next IPI could be
missed. In other words, if a new request for an IPI is sent while the
previous request is being handled but the IPI is not cleared yet, the
clearing of the previous IPI request also clears the new one and the
handling is missed.

There are only three MP interrupt controllers in ARM now. Two of them are
fixed by this change, the third one is correct, probably only just by
accident. The fix is minimalistic as new interrupt framework is awaited.

It was debugged on RPi2 where missing IPI handling together with SCHED_ULE
led to situation in which tdq_ipipending was not cleared and so IPI_PREEMPT
was stopped to be sent. Various odditys were found related to slow system
response time like various events timed out, and slow console response.

Submitted by:	Svatopluk Kraus <onwahe@gmail.com>
Reviewed by:	loos, kib
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D3722
2015-10-01 12:09:05 +00:00
andrew
23dcfe5ff8 Rename pic_ipi_get to pic_ipi_read for intrng. 2014-12-24 15:25:18 +00:00
ian
71d90c04a8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
gber
e054583277 Add support for MSI in interrupt controlller.
MSI are implemented via software interrupt. PCIe cards will write
into software interrupt register which will cause inbound shared
interrupt which will be interpreted as a MSI.

Obtained from:	Marvell, Semihalf
2012-09-14 10:05:01 +00:00
gber
1afc7a0a6c Remove unused structure fields
Obtained from:	Semihalf
2012-09-14 10:01:52 +00:00
gonzo
8b8633cc98 Merging of projects/armv6, part 7
Add Marvell ARMADA XP support

Obtained from:	Marvell, Semihalf
2012-08-15 05:15:49 +00:00