Fix the handling of the "PDC write transfer length" erratum for at91. The
problem affects revision 1xx hardware as well as later versions. Also, the
recommended workaround is to set the PDC count register for a 12-byte
transfer when the actual size is less than that, but there is no need to
extend or zero-out the data buffer, because the blklen register contains
the real transfer size and only that many bytes will be transferred.
Also add a sysctl to turn debugging printfs on or off on the fly.
Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full
(class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART
class only.
Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.
r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479,
r277480, r277512, r277516:
Add inline implementations of arm bus_space_read/write_N().
Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.
Use the explicit member initializer style to init the bus_space struct.
Use arm/bus_space-v6.c for all armv6 systems
Consolidate many identical implementations of bus_space to a single
common tag and implementation shared by armv4 and armv6.
Micro-optimize the new arm inline bus_space implementation by grouping all
the data the inline functions access together at the start of the bus_space
struct so that they all fit in a single cache line.
Add more register values to armreg.h and remove CPU_CONTROL_32BP_ENABLE
from asm.h as they were already defined in armreg.h.
Unify interrupts bit definition and usage. While here remove PSR_C_bit.
263030, 263033, 263034, 263056, 263057,
Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.
Remove all traces of support for ARM chips prior to the arm9 series.
Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).
Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.
Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.
Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.
Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.
Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.
Remove some unnecessary indirection and jump right to the handler functions.
Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).
Remove the unreferenced DATA() macro.
Remove #include <machine/asmacros.h> from files that don't need it.
262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949,
262950
Strip arm/conf/DEFAULTS down to just items that are mandatory for running
the architecture.
Move all the files named foo/common.c to foo/foo_common.c
Initial cut for DTS on the hl201 board.
Add commented out dts for sam9260ek as well as early printf support.
Make clock optional on uart nodes, then back it out ("I don't know what I
was thinking, but it is lame.")
Set the baud rate if it isn't 0
Make at91_soc_id() public.
Properly round at91 resource on unmapping.
Move AT91 AIC related stuff to own file.
Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in
LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32.
Follow r262916 with one more config file that references a renamed common.c
Remove bogus AT91 define that causes compile errors. Most of the defines
for SAM9X are going away soonish anyway (once FDT works), but until
then...
Remove all dregs of a per-thread undefined-exception-mode stack.
Rework the VFP code that handles demand-based save and restore of state.
Always call vfp_discard() on thread death.
When a thread begins life it doesn't own the VFP hardware state on any cpu.
Make undefined exception entry MP-safe.
r262606
Initial import of Linux/Vendor DTS files for various embedded boards.
Initial import of DTS files from Linux
Correct initial import script
New AT91 devices or fdt probe added to existing devices. Some of these
are just stubs for testing the new dts.
- nand
- SDRAMC
- shdwc
- tcb
- usb host and gadget
r262585, r262587, r262696, r262712
Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.
aicasm: Don't complain about missing prototypes to ease bootstrap issues.
Vybrid: Add driver for Inter-Integrated Circuit (I2C).
imx6: Initialize the Low Power Mode bits to keep the ARM cores running
during WFI.
All our current ARM multi-core systems have all cores in one package with
a shared L2 cache, reflect that in the common cpu_topo() routine.
mpcore timer: Supply a DELAY() implementation via weak linkage, so that
SoC-specific code can supply a better implementation.
imx6: Add some rudimentary voltage control.
Add an armv7 implementation of cpu_sleep().
Add __used attribute so that the DELAY implementation doesn't get
optimized away as unreferenced, causing linker errors when trying to
resolve the weak reference to the missing function.
Rework the EARLY_PRINTF mechanism. Instead of defining a special eprintf()
routine, now a platform can provide a pointer to an early_putc() routine
which is used instead of cn_putc(). Control can be handed off from early
printf support to standard console support by NULLing out the pointer
during standard console init.
Convert two while(1); statements into proper panics.
r261689, r261690, r261783, r261791, r261836, r261837, r261841,
Add FDT matching code to AT91 device drivers.
Better nomatch messages: include compat string. Also, flag devices as
disabled in the successful probe message, but leave what that means to
the actual driver (no semantic changes).
Fix Embest board name and id.
Honor the disabled status by only grabbing resources and returning
when running under FDT in the AT91 SPI driver.
r261676, r261677, r261698, r261778
Consolidate code related to setting up physical memory configuration into
a new physmem.c file.
Replace compile-time constant KERNPHYSADDR with abp_physaddr
Calculate the kernel's load address from the PC in the elf / gzip
trampoline instead of relying on KERNPHYSADDR as a compile-time constant.
It turns out a global variable is the only straightforward way to
communicate the kernel's physical load address from where it's known in
initarm() into cpu_mp_start() which is called from non-arm code and
takes no parameters.
Remove the now unused MMU_INIT macro.
Use vm_paddr_t, not vm_offset_t, when dealing with physical addresses.
No need to set physmem in each initarm() instance anymore, it's handled
in common code now.
Pass the pagetable used from locore.S to initarm to allow it to map data
in as required.
Fix the physmem exclude-region clipping logic for the edge-trim case.
Add some extra debugging output when DEBUG is defined.
Update legacy platforms to use new arm_physmem helper routines.
r261596, r261606
Add the imx sdhci controller.
Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.
Add the missing ')' at end of sentence. Reword it to use a more common idiom.
Pass the kernel physical address to initarm through the boot param struct.
Make functions only used in vfp.c static, and remove vfp_enable.
Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.
Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.
Remove references to PHYSADDR where it's used only in debugging output.
Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.
r261353
Fix the name of the dts file for the HL201...
When mapping an address, the bsh needs the same offset we do for other things.
Add explicit depends on bus_if.h and device_if.h to avoid a
chicken and egg problem in some compilation environments.
Switch to using PAs rather than VAs for the addresses we map for
devices. This is a nop, except for what's reported by atmelbus for the
resources.
Comment cleanups. Move things around for diff reduction against FDT work.
Fix gcc with -Wstrict-prototypes by telling it bi_emac takes no
parameters.
Bus space handles need to be the VA of the requested resource, not the
rounded page VA. Correct so the DBGU device can be mapped for FDT
console since it isn't on a page boundary.
Make early printf output nicer by inserting a carriage return before
any linefeeds that are output.
Before resetting the USART, delay a bit to allow the transmitter to
finish the current character to drain to avoid glitching. Also,
simplify the code a smidge.
Remove extra parens to silence clang warning.
Add Atmel serial drivers.
uart clock-frequency is a FreeBSD-specific extention. Make it optional and
allow the client uart drivers to decide if a frequency is required.
Remove redundant declaration for uart devclass.
Commit some unrelated, but harmless, FDT ifdefs.
Add at91 NAND support, Fix comment.
Remove obsolete options and fix comments
Provide a simplified way to specify GPIO pins for the Atmel port.
Add at91 data so we can convert a PIO unit number into a base address.
Add at91 standard memory controller helper functions.
Generalize AT91 NAND support a bit.
Connect NAND for the SAM9260EK eval board, as well as the HotE HL-201.
Add nand device and NANDFS into the mix for those at91 boards that have
support for it at the moment.
Allow AT91_MCI_ALLOW_OVERCLOCK to be an option in kernel config files.
Set the SoC name for the atmelbus name.
Add support for Samsung K9F2G08U0A (256MiB SLC) NAND
Comment updates.
Merge only the uart_dev_at91usart.c part of this revision,
since it has nothing to do with the commit log and was included
by mistake there.
This connects the new grab/ungrab upcalls that were revised
in uart to fix mountroot>.
Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.
Similar to the (1 << 31) case it is not defined to do (2 << 30).
This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.
A similar change was made in OpenBSD.
Plumb the cn_grab and cn_ungrab routines down into the uart
clients. Mask RX interrupts while grabbed on the atmel serial
driver. This UART interrupts every character. When interrupts are
enabled at the mountroot> prompt, this means the ISR eats the
characters. Rather than try to create a cooperative buffering system
for the low level kernel console, instead just mask out the ISR. For
NS8250 and decsendents this isn't needed, since interrupts only happen
after 14 or more characters (depending on the fifo settings). Plumb
such that these are optional so there's no change in behavior for all
the other UART clients. ddb worked on this platform because all
interrupts were disabled while it was running, so this problem wasn't
noticed. The mountroot> issue has been around for a very very long
time.
Approved by: re@ (gjb@)
Fix one race and one fence post error. When the TX buffer was
completely full, we'd not complete any of the mbufs due to the fence
post error (this creates a large leak). When this is fixed, we still
leak, but at a much smaller rate due to a race between ateintr and
atestart_locked as well as an asymmetry where atestart_locked is
called from elsewhere. Ensure that we free in-flight packets that
have completed there as well. Also remove needless check for NULL on
mb, checked earlier in the loop and simplify a redundant if.
Bump the maximum VM space from 3 * memory size to a fixed
256MB. That's all we have room for since we map the hardware registers
starting at 0xd0000000. This allows my 64MB AT91SAM9G20 to boot again
after the unmmaped I/O changes were MFC'd at r251897. Other
subplatforms may need similar treatment.
Although not strictly required to boot a 64MB board, bump
vm_max_virtual_address to be KERNVIRTADDR + 256MB. This allows some
future shock protection since the KVA requirements have gone up since
the unmapped changes have gone in, as well as preventing us from
overlapping with the hardware devices, which we map at 0xd0000000,
which we'd hit with anything more than 85MB...
Call cpu_setup() immediately after the page tables are installed. This
enables data cache and other chip-specific features. It was previously
done via an early SYSINIT, but it was being done after pmap and vm setup,
and those setups need to use mutexes. On some modern ARM platforms,
the ldrex/strex instructions that implement mutexes require the data cache
to be enabled.
Call cpu_setup() from the initarm() routine on platforms that don't use
the common FDT-aware initarm() in arm/machdep.c.
Begin reducing code duplication in arm pmap.c and pmap-v6.c by factoring
out common code related to mapping device memory into a new devmap.c file.
Remove the growing duplication of code that used pmap_devmap_find_pa() and
then did some math with the returned results to generate a virtual address,
and likewise in reverse to get a physical address. Now there are a pair
of functions, arm_devmap_vtop() and arm_devmap_ptov(), to do that. The
bus_space_map() implementations are rewritten in terms of these.
Move remaining code and data related to static device mapping into the
new devmap.[ch] files. Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).
The change that triggered the need for this on head was r257244. That
hasn't been MFC'd yet, but there's no harm in paving the way for it with
this MFC.
Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.
Remove #include <machine/frame.h> from all the arm code that doesn't
really need it. That would be almost everywhere it was included. Add
it in a couple files that really do need it and were previously getting
it by accident via another header.
Remove the last dregs of trapframe_t. It turns out only arm was using
this type, so remove it to make arm code more consistant with other
platforms.
transparent layering and better fragmentation.
- Normalize functions that allocate memory to use kmem_*
- Those that allocate address space are named kva_*
- Those that operate on maps are named kmap_*
- Implement recursive allocation handling for kmem_arena in vmem.
Reviewed by: alc
Tested by: pho
Sponsored by: EMC / Isilon Storage Division
Changes to make rtc/cts flow control work...
This does not turn on the builtin hardware flow control on the SoC's usart
device, because that doesn't work on uart1 due to a chip erratum (they
forgot to wire up pin PA21 to RTS0 internally). Instead it uses the
hardware flow control logic where the tty layer calls the driver to assert
and de-assert the flow control lines as needed. This prevents overruns at
the tty layer (app doesn't read fast enough), but does nothing for overruns
at the driver layer (interrupts not serviced fast enough).
To work around the wiring problem with RTS0, the driver reassigns that pin
as a GPIO and controls it manually. It only does so if given permission via
hint.uart.1.use_rts0_workaround=1, to prevent accidentally driving the pin
if uart1 is used without flow control (because something not related to
serial IO could be wired to that pin).
In addition to the RTS0 workaround, driver changes were needed in the area
of reading the current set of DCE signals. A priming read is now done at
attach() time, and the interrupt routine now sets SER_INT_SIGCHG when any
of the DCE signals change. Without these changes, nothing could ever be
transmitted, because the tty layer thought CTS was de-asserted (when in fact
we had just never read the status register, and the hwsig variable was
init'd to CTS de-asserted).
Changes to support bulk high-speed (230kbps and higher) data reception...
Allow the receive fifo size to be tuned with hint.uart.<dev>.fifo_bytes.
For high speed receive, a fifo size of 1024 works well. The default is
still 128 bytes if no hint is provided. Using a value larger than 384
requires a change in dev/uart/uart_core.c to size the intermediate
buffer as MAX(384, 3*sc->sc_rxfifosize).
Recalculate the receive timeout whenever the baud rate changes. At low
baud rates (19.2kbps and below) the timeout is the number of bits in 2
characters. At higher speed it's calculated to be 500 microseconds
worth of bits. The idea is to compromise between being responsive in
interactive situations and not timing out prematurely during a brief
pause in bulk data flow. The old fixed timeout of 1.5 characters was
just 32 microseconds at 460kbps.
At interrupt time, check for receiver holding register overrun status
and set the corresponding status bit in the return value.
When handling a buffer overrun, get a single buffer emptied and handed
back to the hardware as quickly as possible, then deal with the second
buffer. This at least minimizes data loss compared to the old logic
that fully processed both buffers before restarting the hardware.
Rewrite the logic for handling buffers after a receive timeout. The
original author speculated in a comment that there may be a race with
high speed data. There was, although it was rare. The code now handles
all three possible scenarios on receive timeout: two empty buffers, one
empty and one partial buffer, or one full and one partial buffer.
Reviewed by: imp
add the ability for userland to be notified of changes on gpio pins via
a select(2)/read(2) interface.
Change the interrupt handler from filtered to threaded.
Because of the uiomove() calls in the new interface, change locking from
standard mutex to sx.
Add / restore the at91_gpio_high_z() function.
Reviewed by: imp (long ago)
of bits, not just a 0/1 indicating whether any of the masked bits are on.
This is compatible with the single in-tree caller of this function right now
(at91_vbus_poll() in dev/usb/controller/at91dci_atemelarm.c).
and that can drive someone crazy. While m_get2() is young and not
documented yet, change its order of arguments to match m_getm2().
Sorry for churn, but better now than later.
