143 Commits

Author SHA1 Message Date
br
4ce32cf713 Add a driver for Serial Peripheral Interface (SPI). 2014-06-11 10:03:06 +00:00
kevlo
701aae6977 Remove extra semicolons. 2014-06-06 16:37:42 +00:00
andrew
ad9a51105a Add the start of the ARM platform code. This is based on the PowerPC
platform code, it is expected these will be merged in the future when the
ARM code is more complete.

Until more boards can be tested only use this with the Raspberry Pi and
rrename the functions on the other SoCs.

Reviewed by:	ian@
2014-05-17 11:27:36 +00:00
br
6561e2c486 Fix return value. Should be logic one or zero. 2014-05-15 10:06:59 +00:00
br
22c7dc4f34 Fix typo. 2014-05-14 14:19:57 +00:00
ian
9c837892fa Enable PL310 power-saving modes and tune the cache ram latencies for imx6. 2014-05-06 14:26:24 +00:00
ian
b63fa641d6 Move duplicated code to print l2 cache config into the common code. 2014-04-27 23:47:38 +00:00
ian
87fe508b84 Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51 or
imx6 ccm code.  Of course, the imx6 ccm code is still more a wish than
reality, so for now its implementations just return hard-coded numbers.
2014-04-26 16:48:09 +00:00
rpaulo
04202d989d Updates to i.MX53:
* Define support for the SDHCI driver, although it doesn't work yet
* Fix the memory mappings for IPU [1]

Reviewed by:	ray [1]
2014-04-08 04:05:04 +00:00
rpaulo
edea4d1eac Follow files.imx51 and add vt support. 2014-04-05 23:16:51 +00:00
ian
041f9bbdd2 Flag several sysctl variables as tunables. 2014-04-04 15:31:57 +00:00
ian
079d8c3b12 Rework the cpu frequency management code for imx6.
This adds the concept of "operating points," combinations of frequency
and voltage at which the cpu is known to work correctly.  Some day these
should come from FDT data, but for now the table is hard-coded.

This also allows tuning the min and max operating frequencies.  The min
frequency is what the thermal management code will slow down to if the
core temperature gets too high.  The max frequency is what gets used if
the temperature is okay.

Normally the max cannot be set higher than the value burned into the
ocotp fuses as the chip's rated max, but there is now a new sysctl+tunable
cpu_overclock_enable; when set to non-zero it allows raising the frequency
above the ocotp value: USE WITH CARE!  (At least one of my imx6 boards
has a cpu whose ocotp values never got set correctly; they claim a max
of 792mhz, but the physical markings on the chip say it's good to 1ghz.)

Because all these values affect the entire SoC, there is a new sysctl
node, hw.imx6, where all these values live.  The values that are currently
under dev.imx6_anatop.0 should probably move to hw.imx6 too, because
"anatop" doesn't even mean anything to me, let alone to an end user.
2014-04-02 21:34:48 +00:00
ian
5e0029a0ec Switch imx6 to using the mpcore per-cpu event timers, but continue to use
the GPT timer, which is fixed-frequency, as a timecounter.
2014-04-02 21:06:43 +00:00
ian
fce983ceac Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.  This actually makes no difference
now, but will when we get support for gpio-based card detection.
2014-04-02 19:06:53 +00:00
ian
e825adc7a6 Eliminate irq_dispatch.S. Move the data items it contained into arm/intr.c
and the functionality it provided into arm/exception.S.  Rename the main
irq handling routine from arm_handler_execute() to arm_irq_handler() to
make it more congruent with how other exception handlers are named, and
also update its signature to reflect what has long been reality: it is
passed just a trapframe pointer, no interrupt number argument.
2014-03-10 18:10:09 +00:00
imp
26a7b1e23b Move all the files named foo/common.c to foo/foo_common.c, as
appropriate for each of the 'foo' in the tree. This will allow us to
compile them together (although symbol conflicts prevent us from doing
that today, this just fixes the file name collision).
2014-03-08 00:14:40 +00:00
br
003e2c25e4 - Export panel info to DTS
- Reset all the layers before setup first one
- Enable display
2014-03-07 16:14:51 +00:00
br
37a7c0392e Add driver for Port control and interrupts (PORT).
PORT is responsible for external interrupts management,
so move IRQ lines from GPIO driver.
2014-03-07 07:06:36 +00:00
ian
1aa753817e Add a tunable to set the number of active cores, and enable SMP by default. 2014-03-02 19:46:03 +00:00
ian
b517c5faad Add some rudimentary voltage control to go with the rudimentary frequency
control.  If we have to scale back the frequency due to temperature, it
will help to lower the voltage as well.
2014-02-28 00:26:57 +00:00
ian
67c7973b9f Initialize the Low Power Mode bits to keep the ARM cores running during WFI. 2014-02-27 22:55:33 +00:00
br
0b84389952 Do not setup interrupt handler (polling is used). 2014-02-27 18:13:07 +00:00
br
ffacc2e731 Add driver for Inter-Integrated Circuit (I2C). 2014-02-27 09:59:15 +00:00
ian
6765240e8d Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.  Most arm platforms either don't need to
do anything, or just need to call the standard eventtimer init routines.
A generic implementation that does that is now provided via weak linkage.
Any platform that needs to do something different can provide a its own
implementation to override the generic one.
2014-02-26 22:06:10 +00:00
ian
509a9dbc3f Minor tweaks to the imx GPT timer...
- Don't use spaces or dots in the eventtimer or timecounter names.
   They turn into sysctl node names, and it's just confusing.
 - Use comparator #3 instead of #1 for one-shot events.  There's an
   extra 1-cycle penalty in the hardware for accessing the registers
   for comparator 1, no point in paying that penalty.
 - Lower the quality of the eventtimer from 1000 to 800, because the
   device can't support PERCPU timers and some other device in the system
   may be able to provide that.
2014-02-26 18:29:14 +00:00
br
ed49704845 - Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
2014-02-25 17:02:11 +00:00
ian
0245f95433 Invalidate the SCU cache tag ram on all 4 cores, not just 1-3. I misread
Juergen's original code, it was doing all 4 cores.  Also remove the L2
cache invalidate operation, this code runs before L2 is activated.
2014-02-25 15:22:40 +00:00
ian
a0e8831378 Add the bits needed to run SMP on imx6.
The 'option SMP' isn't added to the kernel config yet; people wanting to
test this have to opt-in for now.
2014-02-24 03:51:31 +00:00
ian
3b515730da Fix a typo _IMX51_TZICRREG_H_ -> _IMX51_TZICREG_H_ (extra R) 2014-02-23 21:13:04 +00:00
ian
3c9c635c3b Don't force bootverbose on anymore, it can be set from ubldr now. 2014-02-23 01:49:01 +00:00
ian
93f036b416 Add basic cpu frequency control and temperature monitoring to imx6_anatop.
The temperature monitor device is enabled to sample the die temperature at
16hz.  The temperature is published via sysctl.  A callout routine at 10hz
monitors the temperature and throttles back the cpu if the temperature
goes over a user-settable throttle point (by default 10C less than the
critical high-point temperature for the chip).  The hardware is supposed
to be able to deliver an interrupt when the temperature exceeds a settable
limit, but the interrupt never arrives so for now a callout does the job.

At attach time we read the maximum cpu frequency the chip is allowed to run
at and the cpu is set to run at that speed.  It's reported at attach time.
A sysctl variable reports the current speed when queried.

New sysctl values:

  dev.imx6_anatop.0.cpu_mhz: 984
  dev.imx6_anatop.0.temperature: 37.9C
  dev.imx6_anatop.0.throttle_temperature: 95.0C

Steven Lawrance did the initial heavy lifting on this, but I changed
enough stuff that I'm the one to blame if anything breaks.

Submitted by:	Steven Lawrance <stl@koffein.net>
2014-02-21 06:00:06 +00:00
ian
7de199d4c4 Add early printf support, wrapped in #if 0 because it's only rarely needed. 2014-02-20 14:29:59 +00:00
br
dbb2be7f15 - Decrease buffer size.
- Handle eDMA interrupt on running channel only.
2014-02-16 19:21:44 +00:00
br
0c8f485c94 Add driver for Synchronous Audio Interface (SAI).
SAI supports full-duplex serial interfaces with frame
synchronization such as I2S, AC97, TDM, and codec/DSP
interfaces.
2014-02-16 16:49:54 +00:00
ian
1431a5d9b9 Oops, remove some dregs of debugging. 2014-02-16 03:30:22 +00:00
ian
bfc46c3238 Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when
necessary.  This is a temporary measure to keep progress moving; in the
long run we need better control over the order in which devices attach
(better than "the order they appear in the fdt dts source").
2014-02-16 03:09:39 +00:00
ian
aa7c8cae90 Sweep up a couple crumbs left over from the imx6->fsl renaming. 2014-02-15 21:59:00 +00:00
ian
2be94cb523 It turns out Freescale cleverly made the ocotp device compatible across
several different families of SoCs, so move it to the freescale directory
and prefix everything with fsl rather than imx6.
2014-02-15 21:21:57 +00:00
ian
882689c353 Convert the "R1B fix" from a busy-loop in the interrupt handler to a callout. 2014-02-15 17:55:35 +00:00
ian
2cb62fce97 Add a driver to provide access to imx6 on-chip one-time-programmble data.
Submitted by:	Steven Lawrance <stl@koffein.net>
2014-02-15 17:19:55 +00:00
ian
2b9e255000 Remove a couple obsolete function declarations. 2014-02-13 19:14:23 +00:00
br
803f6663ca Add function for configuring PLL4 (Audio) clock frequency output. 2014-02-13 06:38:01 +00:00
ian
86ac81dac6 Add handling of standard "non-removable" property, and also some workaround
code so that if card detect is wired to a gpio pin, for now we just treat
it the same as non-removable (because there isn't a gpio driver yet).
2014-02-13 03:45:33 +00:00
ian
d9b84ac407 Write translation code for the SDHCI_PRESENT_STATE register. Freescale
moved some bits around in their version of the register, adjust things
so that the sdhci code sees the standard layout.
2014-02-13 02:38:16 +00:00
br
833d3a1a45 Add drivers for:
- Enhanced Direct Memory Access Controller (eDMA)
- Direct Memory Access Multiplexer (DMAMUX)
2014-02-08 19:47:59 +00:00
nwhitehorn
c9c7c29042 Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.

Reviewed by:	imp, ian
2014-02-05 14:44:22 +00:00
br
ddfbb3ea13 o Add prototype for tcon_bypass() used by dcu4
o Add register definition
2014-02-02 21:10:40 +00:00
br
1e1f8dcd24 Add driver for Display Control Unit (DCU4). 2014-02-02 20:25:27 +00:00
ian
71d90c04a8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
br
837d437b96 o Expand device tree information
o Export iomuxc (pins) configuration to DTS
o Allow devices to assign clocks in DTS
2014-02-02 17:48:06 +00:00