207284 Commits

Author SHA1 Message Date
gnn
5ffbd45332 Add a TCP state tracking script based on FreeBSD TCP SDTs 2015-03-07 18:17:15 +00:00
hselasky
353679f97c Add DA_Q_NO_RC16 quirk for USB mass storage device.
PR:		194062
MFC after:	1 week
2015-03-07 17:18:06 +00:00
hselasky
6ceab54f74 Add more USB IDs.
PR:		197753
MFC after:	1 week
2015-03-07 17:11:07 +00:00
ian
550c116c70 Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.

Differential Revision:	https://reviews.freebsd.org/D1993
Submitted by:	Michal Meloun
2015-03-07 15:24:15 +00:00
ian
7292a1689e Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full
(class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART
class only.

This paves the way for declaring uart_class data and ofw/fdt compat data
with a uart implementation, rather than needing a big global table of
compat data and weak-symbol declarations of every existing implementation.

Differential Revision:	https://reviews.freebsd.org/D1992
Submitted by:	Michal Meloun
2015-03-07 15:18:57 +00:00
jilles
964c68ec8c env: Fix testsuite for additional variables set by sh.
MFC after:	1 week
2015-03-07 13:54:44 +00:00
gnn
c531c598ba Add support for walltimestamp to DTrace on ARM. 2015-03-07 04:38:25 +00:00
alc
56c9a1b2f6 Correct a typo in vm_object_backing_scan() that originated in r254141.
Specifically, change a lock acquire into a lock release.

MFC after:	3 days
Sponsored by:	EMC / Isilon Storage Division
2015-03-07 04:18:40 +00:00
jmg
ec5ca7444d forgot to bump date, and replace contraction (igor)... 2015-03-07 03:48:32 +00:00
loos
f6ce146e25 Bump .Dd to current date (which I should have done as part of initial
commit).

Connect ds3231.4 to the build.
2015-03-07 01:42:04 +00:00
jmg
c9d3fcf295 make things a bit more clear.. we worked together on language..
Submitted by:	Justin Cormack
2015-03-06 23:17:18 +00:00
pfg
816f612e0a compat_passwd(): yet another uninitialized access to stayopen.
CID:	1018731
2015-03-06 22:22:57 +00:00
edwin
ad0d8bd396 MFV of 279704,tzdata{2015a}
Release 2015a - 2015-01-29

Changes affecting future time stamps

    The Mexican state of Quintana Roo, represented by America/Cancun,
    will shift from Central Time with DST to Eastern Time without DST
    on 2015-02-01 at 02:00.  (Thanks to Steffen Thorsen and Gwillim Law.)

    Chile will not change clocks in April or thereafter; its new standard time
    will be its old daylight saving time.  This affects America/Santiago,
    Pacific/Easter, and Antarctica/Palmer.  (Thanks to Juan Correa.)

    New leap second 2015-06-30 23:59:60 UTC as per IERS Bulletin C 49.
    (Thanks to Tim Parenti.)

  Changes affecting past time stamps

    Iceland observed DST in 1919 and 1921, and its 1939 fallback
    transition was Oct. 29, not Nov. 29.  Remove incorrect data from
    Shanks about time in Iceland between 1837 and 1908.

    Some more zones have been turned into links, when they differed
    from existing zones only for older time stamps.  As usual,
    these changes affect UTC offsets in pre-1970 time stamps only.
    Their old contents have been moved to the 'backzone' file.
    The affected zones are: Asia/Aden, Asia/Bahrain, Asia/Kuwait,
    and Asia/Muscat.
2015-03-06 21:45:35 +00:00
jhb
7d16cdc7ad Fix a typo. 2015-03-06 20:53:56 +00:00
ian
0fd8b4a005 Update a comment that had drifted out of date with the last changes. 2015-03-06 20:52:05 +00:00
np
6fe9778c81 cxgbe(4): experimental rx packet sink for netmap queues. This is not
intended for general use.

MFC after:	1 month
2015-03-06 20:41:28 +00:00
np
e5e48257ae cxgbe(4): knobs to experiment with the interrupt coalescing timer for
netmap rx queues, and the "batchiness" of rx updates sent to the chip.

These knobs will probably become per-rxq in the near future and will be
documented only after their final form is decided.

MFC after:	1 month
2015-03-06 20:39:19 +00:00
jhb
c1c1fd8e25 Only schedule interrupts on a single hyperthread of a modern Intel CPU core
by default.  Previously we used a single hyperthread on Pentium4-era
cores but used both hyperthreads on more recent CPUs.

MFC after:	2 weeks
2015-03-06 20:34:28 +00:00
ed
58f62559c6 Update the ELFOSABI_* constants.
Two new operating systems have been added in the meantime.
ELFOSABI_FENIXOS that uses value 16 (published in the latest draft) and
ELFOSABI_CLOUDABI that uses value 17 (to be published in the next draft).
2015-03-06 16:43:54 +00:00
br
66f825e513 Fix style. 2015-03-06 16:23:30 +00:00
slm
c363e6d0d2 This setting of stop_at_shutdown should have been removed with r279253
Approved by:	ken
MFC after:	1 week
2015-03-06 16:17:08 +00:00
br
392792c839 Set a dependancy on fbt module for ARM. 2015-03-06 16:08:03 +00:00
np
79eb0c64a9 cxgbe(4): provide the correct size of freelists associated with netmap
rx queues to the chip.  This will fix many problems with native netmap
rx on ncxl/ncxgbe interfaces.

MFC after:	1 week
2015-03-06 16:05:20 +00:00
glebius
3a52ecfa66 - In vnode_pager_generic_getpages() use different free counters for
synchronous and asynchronous requests.  The latter can saturate the
  I/O and we do not want them to affect regular paging.
- Allocate the pbuf at the very beginning of the function, so that
  if we are low on certain kind of pbufs don't even proceed to BMAP,
  but sleep.

Reviewed by:	kib
Sponsored by:	Nginx, Inc.
Sponsored by:	Netflix
2015-03-06 14:15:30 +00:00
ae
3169d96832 tcp6_ctlinput() doesn't pass MTU value to in6_pcbnotify().
Check cmdarg isn't NULL before dereference, this check was in the
ip6_notify_pmtu() before r279588.

Reported by:	Florian Smeets
MFC after:	1 week
2015-03-06 05:50:39 +00:00
tychon
eedd9cfb16 When ICW1 is issued the edge sense circuit is reset which means that
following an initialization a low-to-high transistion is necesary to
generate an interrupt.

Reviewed by:	neel
2015-03-06 02:05:45 +00:00
gonzo
20f0285d8c Add sysctls to control PS-PL level shifters and FCLK settings.
PL (programmable logic) uses FCLK0..FCLK3 as a clock sources.
Normally they're configured by first stage boot loader (FSBL)
and normal user never has to touch them. These sysctls may come
useful for hardware developers

hw.fpga.fclk.N.source: clock source (IO, DDR, ARM)
hw.fpga.fclk.N.freq: requested frequency in Hz
hw.fpga.fclk.N.actual_freq: actual frequency in Hz (R/O)

hw.fgpa.level_shifters: 0/1 to enable/disable PS-PL level shifters,
    normally they're enabled either by FSBL or after programming
    FPGA through devcfg(4)
2015-03-05 21:41:58 +00:00
hrs
218de7f1d6 - Implement loopback probing state in enhanced DAD algorithm.
- Add no_dad and ignoreloop per-IF knob.  no_dad disables DAD completely,
  and ignoreloop is to prevent infinite loop in loopback probing state when
  loopback is permanently expected.
2015-03-05 21:27:49 +00:00
mav
a0ef792dfe Add variable initialization missed by me and clang.
Reported by:	grehan
MFC after:	2 weeks
2015-03-05 20:29:18 +00:00
mav
710980f2ff Fix error translation broken in r279658.
Reported by:	grehan
MFC after:	2 weeks
2015-03-05 20:24:34 +00:00
pfg
1a66333f9f rlogin(1): initialize term variable.
CID:		1011522
Obtained from:	NetBSD (CVS 1.18, partial)
2015-03-05 19:51:37 +00:00
andrew
43cb9d5cd8 dtrace_cas32 and dtrace_casptr should retrn the data loaded from target
not the new value.

Sponsored by:	ABT Systems Ltd
2015-03-05 18:03:42 +00:00
andrew
ff8a1038b7 Add the MD parts of dtrace needed to use fbt on ARM. For this we need to
emulate the instructions used in function entry and exit.

For function entry ARM will use a push instruction to push up to 16
registers to the stack. While we don't expect all 16 to be used we need to
handle any combination the compiler may generate, even if it doesn't make
sense (e.g. pushing the program counter).

On function return we will either have a pop or branch instruction. The
former is similar to the push instruction, but with care to make sure we
update the stack pointer and program counter correctly in the cases they
are either in the list of registers or not. For branch we need to take the
24-bit offset, sign-extend it, and add that number of 4-byte words to the
program counter. Care needs to be taken as, due to historical reasons, the
address the branch is relative to is not the current instruction, but 8
bytes later.

This allows us to use the following probes on ARM boards:
  dtrace -n 'fbt::malloc:entry { stack() }'
and
  dtrace -n 'fbt:🆓return { stack() }'

Differential Revision:	https://reviews.freebsd.org/D2007
Reviewed by:	gnn, rpaulo
Sponsored by:	ABT Systems Ltd
2015-03-05 17:55:31 +00:00
pfg
8e5cfd9355 qsort(3): small style(9) cleanups.
Basically spaces vs. tabs.
No functional change.
2015-03-05 17:17:11 +00:00
nwhitehorn
048b34a391 Fix build after unifying DAR/DEAR storage in trap frame. 2015-03-05 17:02:22 +00:00
pfg
a78cf22f54 qsort(3): enhance to handle 32-bit aligned data on 64-bit systems
Implement a small enhancement to the original qsort implementation:
If the data is 32 bit aligned we can side-step the long type
version and use int instead.

The change brings a modest but significant improvement in
32 bit workloads.

Relnotes:	yes

PR:		135718
Taken from:	ache
2015-03-05 17:00:39 +00:00
mav
a34b7ad0d2 Implement cache flush for ahci-hd and for virtio-blk over device.
MFC after:	2 weeks
2015-03-05 15:29:18 +00:00
mav
52d1cb2338 Add check for absent stripe size to r279652.
MFC after:	2 weeks
2015-03-05 13:52:30 +00:00
mav
02e846756e Report logical/physical sector sizes for virtual SATA disk.
MFC after:	2 weeks
2015-03-05 12:21:12 +00:00
mav
214386b6e7 Add support for TOPOLOGY feature of virtio block device.
Passing through physical block size/offset from underlying storage allows
guest to manage proper data and I/O alignment to improve performance.

MFC after:	2 weeks
2015-03-05 10:40:45 +00:00
mav
a12775b872 Size of opt_io_size field is 32 bit.
MFC after:	2 weeks
2015-03-05 10:29:46 +00:00
mav
49b2675241 Reenable VIRTIO_BLK_F_TOPOLOGY feature.
MFC after:	2 weeks
2015-03-05 09:51:59 +00:00
rwatson
d81f712ba9 Don't all DTrace's FBT on ARM to instrument undefinedinstruction(), as
this would lead to DTrace reentrance.

Sponsored by:	DARPA, AFRL
2015-03-05 07:40:41 +00:00
dteske
1686d13fd7 sysrc(8): Add key-=remove' and improve key+=append' syntax
MFC after:	3 days
X-MFC-to:	stable/10 stable/9
2015-03-05 05:54:34 +00:00
nwhitehorn
cd06a4774f Move IVOR setup from assembler to C, decreasing required assumptions about
address formats for trap handlers.
2015-03-05 05:53:08 +00:00
loos
80210b69e0 Use the child device name here is lame because at the point that this
happens, the child device is not yet specified.
2015-03-05 03:11:47 +00:00
loos
4655e1ef19 Change ofw_gpiobus_destroy_devinfo() to unmap the GPIO pins and then
rework the code a little bit to use this function consistently to cleanup
all the changes made as part of the probe phase.

This fixes an issue where a FDT child node without a matching driver could
leave the GPIO pins mapped and prevent the further use of them.
2015-03-05 02:54:30 +00:00
loos
aa6f296074 Add a bus_probe_nomatch() method for gpiobus/ofw_gpiobus.
This prints a warning when your system have a hinted child or a FDT child
node for which you don't have a matching driver:

gpiobus0: <unknown device> at pin(s) 24 irq 24
2015-03-05 01:49:58 +00:00
bapt
61b9798759 r* commands are not precious anymore 2015-03-04 22:01:44 +00:00
nwhitehorn
07a9fad289 The AIM DAR (data access fault address register) and Book-E DEAR registers
have the same meaning and occupy the same memory address in the trapframe
courtesy of union. Avoid some pointless #ifdef by spelling them both 'DAR'
in the trapframe.
2015-03-04 21:06:57 +00:00