22138 Commits

Author SHA1 Message Date
Bernhard Schmidt
688f94830d The 6000 series adapters have a slightly different offset for band 6,
2GHz HT40 channels.
2011-05-08 10:21:42 +00:00
Bernhard Schmidt
3016ab149d Re-add 2 device IDs which got lost.
Pointed out by:	benjsc
2011-05-08 10:19:29 +00:00
Hans Petter Selasky
afa524e6cf Cleanup usb_notify_addq_compat(). It should not
be needed any more.

MFC after:	7 days
2011-05-08 08:22:11 +00:00
Adrian Chadd
f678fb43eb These EEPROM bits actually defined whether HT/20 and HT/40 support
for the given channel is available.

It isn't used yet; ar5416GetWirelessModes() needs to be taught
about this rather than assuming HT20/HT40 is available.
2011-05-08 08:18:30 +00:00
Adrian Chadd
5c892e7497 Fiddle with the PLL initialisation order to match ath9k/Atheros HAL.
This seems to make the AR9160 behave better during heavy scanning,
where before it'd hang and require a hard reset to recover.

Obtained From:	Linux ath9k, Atheros
2011-05-08 07:21:09 +00:00
Adrian Chadd
351384c64f Properly indent the WAR code i pasted in from ath9k a few months
ago.
2011-05-08 05:45:06 +00:00
Adrian Chadd
60d3878423 * Add in a comment about ar5416InitUserSettings() potentially
modifying AR_DIAG_SW.

  There's a hardware workaround which sets disabling some errors
  early at startup and clears said bits before the PCU begins
  receiving - it does this to avoid RX descriptor status errors.

  It's possible these bits aren't being completely properly twiddled
  in all instances; but in particular if the diag_reg HAL variable
  is set it won't be setting these bits correctly. I'll review this
  at some point.

 * Disable multicast search on mac address and key id - the driver
   doesn't use it at the moment and thus adhoc may be broken for
   merlin and later.

* Change this to be for Merlin 1.0 (which from what I understand
  wasn't ever publicly released) to be more correct.
2011-05-08 05:25:42 +00:00
Adrian Chadd
5accb5fd53 Fiddle with the AR5416 1.0 chainmask setup.
Apparently all three RX chains need to be enabled before initial calibration
is done, even if only two are configured.

Reorder the alt chain swap bit to match what the Atheros HAL is doing.

Obtained From:	ath9k, Atheros
2011-05-08 03:24:17 +00:00
Adrian Chadd
af8223ba6d Fix the IS_5416 checks to actually work correctly.
I've verified that my AR5416 revision 2.2 (minor revision 0x0A) now
matches the correct checks.
2011-05-07 18:42:41 +00:00
Hans Petter Selasky
4ad5f8c23f Add new USB ID.
Submitted by:	Dmitry Luhtionov
MFC after:	7 days
2011-05-07 16:32:59 +00:00
Adrian Chadd
26e8415d1d Do a HAL capabilities sync pass based on the Atheros HAL.
* Shuffle some of the capability numbers around to match the
  Atheros HAL capability IDs, just for consistency.

* Add some new capabilities to FreeBSD from the Atheros
  HAL which will be be shortly used when new chipsets are added
  (HAL SGI-20 support is for Kiwi/AR9287 support); for
  TX aggregation (MBSSID aggregate support, WDS aggregation
  support); CST/GTT support for carrier sense/TX timeout.
2011-05-07 15:30:23 +00:00
Adrian Chadd
b657b11d8d Update the ext channel cycpwr threshold 1 register for the extension
channel when the channel is HT/40.

The new ANI code (primarily for the AR9300/AR9400) in ath9k sets this
register but the ANI code for the previous 11n chips didn't set this.

Unlike ath9k, only set this for HT/40 channels.

Obtained From:	ath9k
2011-05-07 13:08:48 +00:00
Adrian Chadd
f93ef5516b Read in the extended regulatory domain flags so future code can use them.
These describe FCC/Japan channel and DFS behaviour.

The AR9285 and later chips don't set these bits in the eeprom, the correct
behaviour is to just assume all five bits are enabled.
2011-05-07 11:05:16 +00:00
Adrian Chadd
001ac28926 Instead of returning an unknown mac/bb signature, just return 0. 2011-05-07 06:52:04 +00:00
Adrian Chadd
b810285f24 Add some comments about which HAL capabilities are currently FreeBSD
specific.

The Atheros HAL and FreeBSD HAL share the same capabilities up
until HAL_CAP_11D, where things begin to diverge.

I'll look at tidying these up soon.

Obtained from:	Atheros
2011-05-07 06:47:09 +00:00
Adrian Chadd
de1334e8d7 Some BB hang changes:
* Add Howl (ar9130) to the list of chips that have DFS/BB/MAC hangs
* Don't treat unknown BB hangs as fatal; ath9k/Atheros HAL don't
  treat it as such.
* Add HAL_DEBUG_DFS to the debug fields in ath_hal/ah_debug.h

The BB hang check simply loops over an observation register checking
for a stuck state engine, but it can happen under high traffic
conditions. Ath9k and the Atheros HAL simply log a debug message and
continue.

Private to FreeBSD:

* Add HAL_DEBUG_HANG to the debug fields
* Change the hang debugging to HAL_DEBUG_HANG rather than HAL_DEBUG_DFS
  like in the Atheros HAL.

Obtained from:	Atheros
2011-05-07 06:45:35 +00:00
Pyun YongHyeon
de53eba037 Fix build. 2011-05-07 04:40:44 +00:00
Adrian Chadd
ef1901a3c9 Change AR_SREV_OWL_{X}_OR_LATER to AR_SREV_5416_{X}_OR_LATER.
For now, these are equivalent macros. AR_SREV_OWL{X}_OR_LATER
will later change to exclude Howl (AR9130) in line with what
the Atheros HAL does.

This should not functionally change anything.

Obtained from:	Atheros
2011-05-07 02:59:24 +00:00
Adrian Chadd
d1915e7308 Fix the OWL revision checks.
A quick story, which is partially documented in the commit.

The silicon revision in Linux ath9k and the Atheros HAL use an
AR_SREV_REVISION mask of 0x07.

FreeBSD's HAL uses the AR5212 AR_SREV_REVISION mask of 0x0F.

Thus the OWL silicon revisions were coming through as 0xA, 0xB,
0xC, rather than 0x0, 0x1 and 0x2.

My ath9k-sourced AR_SREV_OWL_<X> macros were thus using the wrong
silicon revision values and wouldn't correctly match.

This commit does a few things:

* Change the AR_SREV_OWL_<x> macros to use the AR_SREV_REVISION_OWL_*
  values, not AR_XSREV_REVISION_OWL macros;
* Disable AR_XSREV_REVISION_OWL_* values;
* Modify the IS_5416 to properly check the MAC is OWL, rather than
  potentially matching on non-OWL revisions (which shouldn't happen
  unless there's a silicon revision of higher than 0x9 in a later
  chip..)
* Add a couple more macros from the Atheros HAL for compatibility.

The main difference now is that the Atheros HAL defines
AR_SREV_OWL_{20,22}_OR_LATER subtly differently - it fails on all HOWL
silicon. The AR_SREV_5416_*_OR_LATER macros match on the relevant OWL
version -and- all HOWL versions, along with subsequent versions.

A subsequent commit is going to migrate the uses of AR_SREV_OWL_X_OR_LATER
to AR_SREV_5416_X_OR_LATER to match what's going on in the Atheros HAL.

There's only two uses of AR_SREV_OWL_X_OR_LATER which currently don't
apply to FreeBSD but it may do in the future.

Yes, it's all confusing!
2011-05-07 02:54:52 +00:00
Pyun YongHyeon
3ea23f341b Remove unneeded use of variable status. This should have been done
in r221557.
2011-05-07 02:19:46 +00:00
Pyun YongHyeon
0b96ba12be XL_DMACTL is 32bit register, use 32bit write macro.
While I'm here add more bits for the register.
2011-05-07 00:25:12 +00:00
Pyun YongHyeon
7498e81a2d Rearm watchdog timer if driver kick controller to recover from TX
underrun error.
While here, prepend 0x to status code to show TX status is hex
number.
2011-05-07 00:18:58 +00:00
Pyun YongHyeon
48dcbc3370 Rename xl_stats_update() callout handler to xl_tick() and move MII
tick driving logic to xl_tick(). Now xl_tick() handles MII tick as
well as periodic updating of statistics.
This change removes a hack used in interrupt handler where it
wanted to update statistics without driving MII tick.
2011-05-07 00:06:02 +00:00
Pyun YongHyeon
4a5c788456 Reuse the TX descriptor(DPD) if xl_encap() failed instead of just
picking the next available one. This may explain why xl(4) sees TX
underrun error with no queued frame. I hope this addresses a long
standing xl(4) watchdog timeout issue as well.

Obtained from:	OpenBSD
2011-05-06 23:49:10 +00:00
Pyun YongHyeon
5a13764b11 Change xl_rxeof() a bit to return the number of processed frames in
RX descriptor ring. Previously it returned the number of frames
that were successfully passed to upper stack which in turn means it
ignored frames that were discarded due to errors. The number of
processed frames in RX descriptor ring is used to detect whether
driver is out of sync with controller's current descriptor pointer.
Returning number of processed frames reduces unnecessary (probably
wrong) re-synchronization.

While here, remove unnecessary local variable initialization.
2011-05-06 23:01:29 +00:00
Pyun YongHyeon
74517b0724 Terminate interrupt handler if driver detect it's not running.
Also add check for driver running state before trying to send
frames. While I'm here, use for loop.
2011-05-06 22:55:53 +00:00
Pyun YongHyeon
f321edf95a Updating status word should be the last operation of UPD structure
renewal.  Disable instruction reordering by adding volatile to
xl_list_onefrag structure.
2011-05-06 22:45:13 +00:00
Pyun YongHyeon
0ecf6b16c8 Call bus_dmamap_sync() only after TX DPD update. 2011-05-06 22:36:43 +00:00
Pyun YongHyeon
4f58a95ce1 Set status word once instead of twice. For 3C90xB/3C90xC, frame
length of status word is ignored. While here move bus_dmamap_sync()
up where DMA map is loaded.
2011-05-06 22:26:57 +00:00
Pyun YongHyeon
78564eda2d Remove unnecessary htole32/le32toh dance. 2011-05-06 22:16:43 +00:00
Pyun YongHyeon
dd0a76883f Rewrite RX filter logic and provide controller specific filter
handler for 3C90x and 3C90xB/C respectively.  This simplifies ioctl
handler as well as enhancing readability.
While I'm here don't reprogram multicast filter when driver is not
running.
2011-05-06 22:01:46 +00:00
Adrian Chadd
e7cb5d548d Add a function which enables or disables RX RIFS searching, and migrate
the code which does this into it.
2011-05-06 15:33:56 +00:00
Nathan Whitehorn
cc734417b3 Do not use Open Firmware to open the device and instead program its start
on our own. This prevents hangs at boot when using a bm(4) NIC where the
cable is not plugged in at boot time.

Obtained from:	NetBSD
MFC after:	1 week
2011-05-06 03:26:24 +00:00
Navdeep Parhar
3792a4d286 Bump up the number of egress queues that the driver is allowed to use.
MFC after:	3 days
2011-05-05 23:09:17 +00:00
Xin LI
8901793222 Detect and set Atom's Tj(max) to 90 if it's not the 45nm D400/D500/N400
series.

MFC after:	2 weeks
2011-05-05 19:15:15 +00:00
Jack F Vogel
3cec53b8a7 Add an initialization to the error variable, without
this there is a rare return path that bogusly appears
to fail when it should not.  Also white space correction.

Thanks to Arnaud Lacombe for noticing the problem.
2011-05-05 17:28:45 +00:00
Alexander Motin
e2d6ccef4b Add PCI ID for Marvell 88SE9182 -- PCIe 2.x x2 relative of the 88SE912x.
Submitted by:	dchagin
MFC after:	1 week
2011-05-05 17:11:26 +00:00
Adrian Chadd
47ff47a858 Don't perform NF calibration for radio chains which aren't in use:
Quoting the ath9k commit message:

At present the noise floor calibration is processed in supported
control and extension chains rather than required chains.
Unnccesarily doing nfcal in all supported chains leads to
invalid nf readings on extn chains and these invalid values
got updated into history buffer. While loading those values
from history buffer is moving the chip to deaf state.

This issue was observed in AR9002/AR9003 chips while doing
associate/dissociate in HT40 mode and interface up/down
in iterative manner. After some iterations, the chip was moved
to deaf state. Somehow the pci devices are recovered by poll work
after chip reset. Raading the nf values in all supported extension chains
when the hw is not yet configured in HT40 mode results invalid values.

Reference:	https://patchwork.kernel.org/patch/753862/

Obtained from:	Linux ath9k
2011-05-05 08:11:22 +00:00
Adrian Chadd
ed8659ed69 Another Howl (AR9130) fix.
I haven't seen a 5ghz AR9130 based board yet though!

Obtained from:	Atheros
2011-05-05 04:43:05 +00:00
Adrian Chadd
d2615832bf Fix up the chipset checks for the AR5416 and later silicon.
The checks should function as follows:

* AR_SREV_<silicon> : check macVersion matches that version id
* AR_SREV_<silicon>_<revision> : check macVersion and macRevision match
    the version / revision respectively

* AR_SREV_<silicon>_<revision>_OR_LATER: check that
  + if the chip silicon version == macVersion, enforce revision >= macRevision
  + if the chip silicon version > macVersion, allow it.

For example, AR_SREV_MERLIN() only matches AR9280 (any revision),
AR_SREV_MERLIN_10() would only match AR9280 version 1.0, but
AR_SREV_MERLIN_20_OR_LATER() matches AR9280 version >= 2.0 _AND_
any subsequent MAC (So AR9285, AR9287, etc.)

The specific fixes which may impact users:

* if there is Merlin hardware > revision 2.0, it'll now be correctly
  matched by AR_SREV_MERLIN_20_OR_LATER() - the older code simply
  would match on either Merlin 2.0 or a subsequent MAC (AR9285, AR9287, etc.)

* Kite version 1.1/1.2 should now correctly match. As these macros
  are used in the AR9285 reset/attach path, and it's assumed that the
  hardware is kite anyway, the behaviour shouldn't change. It'll only
  change if these macros are used in other codepaths shared with
  older silicon.

Obtained from:	Linux ath9k, Atheros
2011-05-05 03:42:04 +00:00
Adrian Chadd
59298273a9 Import some HOWL (AR9130) related fixes from Atheros.
Obtained from:	Atheros
2011-05-05 02:59:31 +00:00
Navdeep Parhar
489eeba940 T4 packet timestamps.
Reference code that shows how to get a packet's timestamp out of
cxgbe(4).  Disabled by default because we don't have a standard way
today to pass this information up the stack.

The timestamp is 60 bits wide and each increment represents 1 tick of
the T4's core clock.  As an example, the timestamp granularity is ~4.4ns
for this card:

# sysctl dev.t4nex.0.core_clock
dev.t4nex.0.core_clock: 228125

MFC after:	1 week
2011-05-05 02:38:08 +00:00
Navdeep Parhar
8820ce5fe7 T4 packet filtering/steering.
- Enable 5-tuple and every-packet lookup.

- Setup the default filter mode to allow filtering/steering based on IP
  protocol, ingress port, inner VLAN ID, IP frag, FCoE, and MPS match
  type; all combined together.  You can also filter based on MAC index,
  Ethernet type, IP TOS/IPv6 Traffic Class, and outer VLAN ID but you'll
  have to modify the default filter mode and exclude some of the
  match-fields in it.

  IPv4 and IPv6 SIP/DIP/SPORT/DPORT are always available in all filter
  rules.

- Add driver ioctls to get/set the global filter mode.

- Add driver ioctls to program and delete hardware filters.  A couple of
  the "switch" actions that rewrite Ethernet and VLAN information and
  switch the packet out of another port may not work as the L2 code is not
  yet in place.  Everything else, including all "drop" and "pass" rules
  with RSS or absolute qid, should work.

Obtained from:	 Chelsio Communications
2011-05-05 02:04:56 +00:00
Pyun YongHyeon
cb777a0752 Enable Ethernet@WireSpeed for BCM5718/BCM57765 family. While I'm
here inverse meaning of PHY flag as Ethernet@WireSpeed is enabled
for most PHYs.
2011-05-05 00:43:40 +00:00
Navdeep Parhar
b815af1b74 Always re-arm an iq's interrupt before leaving the handler.
MFC after:	1 week
2011-05-04 23:07:30 +00:00
Pyun YongHyeon
b4a256ac67 Add initial BCM57765 family support. The BCM57765 family seems to
have similar hardware features of BCM5718 family except the number
of receive return ring is 4. The BCM57765 family is known to
support IEEE 802.3az EEE(Energy Efficient Ethernet) but this change
does not include EEE support code. I hope EEE is implemented in
near future.
This change will support BCM57761, BCM57765, BCM57781, BCM57785,
BCM57791 and BCM57795. All hardware offloading features are
supported and suspend/resume also should work.
Many thanks to Broadcom for continuing support of FreeBSD.

Tested by:	Paul Thornton (prt <> prt dot org)
HW donated by:	Broadcom
2011-05-04 17:04:31 +00:00
Adrian Chadd
5a04ce2fdf Remove this useless bit of code for Kite. The RIFS register value is overriden
by the initvals, so disabling RIFS before calling writeIni() effectively does
nothing.
2011-05-04 09:26:33 +00:00
Marius Strobl
3fcb7a5365 - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
  it might provide useful for debugging). For most mii(4) drivers it
  was unclear whether the PHYs driven by them actually support
  loopback or not. Moreover, typically loopback mode also needs to
  be activated on the MAC, which none of the Ethernet drivers using
  mii(4) implements. Given that loopback media has no real use (and
  obviously hardly had a chance to actually work) besides for driver
  development (which just loopback mode should be sufficient for
  though, i.e one doesn't necessary need support for loopback media)
  support for it is just dropped as both NetBSD and OpenBSD already
  did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
  instead of discrete function pointers, and extend this to include
  a "reset" entry point. Make sure any PHY-specific reset routine is
  always used, and provide one for lxtphy(4) which disables MII
  interrupts (as is done for a few other PHYs we have drivers for).
  This includes changing NIC drivers which previously just called the
  generic mii_phy_reset() to now actually call the PHY-specific reset
  routine, which might be crucial in some cases. While at it, the
  redundant checks in these NIC drivers for mii->mii_instance not being
  zero before calling the reset routines were removed because as soon
  as one PHY driver attaches mii->mii_instance is incremented and we
  hardly can end up in their media change callbacks etc if no PHY driver
  has attached as mii_attach() would have failed in that case and not
  attach a miibus(4) instance.
  Consequently, NIC drivers now no longer should call mii_phy_reset()
  directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
  The purpose of that function is to perform the common steps to attach
  a PHY driver instance and to hook it up to the miibus(4) instance and to
  optionally also handle the probing, addition and initialization of the
  supported media. So all a PHY driver without any special requirements
  has to do in its bus attach method is to call mii_phy_dev_attach()
  along with PHY-specific MIIF_* flags, a pointer to its PHY functions
  and the add_media set to one. All PHY drivers were updated to take
  advantage of mii_phy_dev_attach() as appropriate. Along with these
  changes the capability mask was added to the mii_softc structure so
  PHY drivers taking advantage of mii_phy_dev_attach() but still
  handling media on their own do not need to fiddle with the MII attach
  arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
  for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
  structure. Several PHY drivers require this information also after
  attaching and previously had to wrap their own softc around mii_softc.
  NetBSD/OpenBSD also keep track of the model and revision on their
  mii_softc structure. All PHY drivers were updated to take advantage
  as appropriate.
- Convert the mebers of the MII data structure to unsigned where
  appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
  when mapping an OUI to the MII ID registers. All PHY drivers and
  miidevs where changed as necessary. Actually this now again allows to
  largely share miidevs with NetBSD, which fixed this problem already
  9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
  weren't explicitly converted to support flow control before. It's
  unclear whether flow control actually works with these but typically
  it should and their net behavior should be more correct with these
  changes in place than without if the MAC driver sets MIIF_DOPAUSE.

Obtained from:	NetBSD (partially)
Reviewed by:	yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
John Baldwin
83c41143ca Reimplement how PCI-PCI bridges manage their I/O windows. Previously the
driver would verify that requests for child devices were confined to any
existing I/O windows, but the driver relied on the firmware to initialize
the windows and would never grow the windows for new requests.  Now the
driver actively manages the I/O windows.

This is implemented by allocating a bus resource for each I/O window from
the parent PCI bus and suballocating that resource to child devices.  The
suballocations are managed by creating an rman for each I/O window.  The
suballocated resources are mapped by passing the bus_activate_resource()
call up to the parent PCI bus.  Windows are grown when needed by using
bus_adjust_resource() to adjust the resource allocated from the parent PCI
bus.  If the adjust request succeeds, the window is adjusted and the
suballocation request for the child device is retried.

When growing a window, the rman_first_free_region() and
rman_last_free_region() routines are used to determine if the front or
end of the existing I/O window is free.  From using that, the smallest
ranges that need to be added to either the front or back of the window
are computed.  The driver will first try to grow the window in whichever
direction requires the smallest growth first followed by the other
direction if that fails.

Subtractive bridges will first attempt to satisfy requests for child
resources from I/O windows (including attempts to grow the windows).  If
that fails, the request is passed up to the parent PCI bus directly
however.

The PCI-PCI bridge driver will try to use firmware-assigned ranges for
child BARs first and only allocate a "fresh" range if that specific range
cannot be accommodated in the I/O window.  This allows systems where the
firmware assigns resources during boot but later wipes the I/O windows
(some ACPI BIOSen are known to do this) to "rediscover" the original I/O
window ranges.

The ACPI Host-PCI bridge driver has been adjusted to correctly honor
hw.acpi.host_mem_start and the I/O port equivalent when a PCI-PCI bridge
makes a wildcard request for an I/O window range.

The new PCI-PCI bridge driver is only enabled if the NEW_PCIB kernel option
is enabled.  This is a transition aide to allow platforms that do not
yet support bus_activate_resource() and bus_adjust_resource() in their
Host-PCI bridge drivers (and possibly other drivers as needed) to use the
old driver for now.  Once all platforms support the new driver, the
kernel option and old driver will be removed.

PR:		kern/143874 kern/149306
Tested by:	mav
2011-05-03 17:37:24 +00:00
George V. Neville-Neil
040b46f5ba Add in support for multicast.
Submitted by:	Sriram Rapuru at @ Wipro for Exar Inc.
MFC after:	2 weeks
2011-05-03 15:58:24 +00:00