that takes into account all limitation to DMA memory (boundaries,
alignment) and implements bounce pages.
- Add BUS_DMASYNC_POSTREAD case to bus_dmamap_sync_buf
(1) fix printf formats.
(2) Prefer FreeBSD's MIPS_PHYS_TO_KSEG0 to hand-rolled one from Cavium.
(3) Mark a few 64-bit cleanliness issues (possible).
(4) Minor formatting fixes.
o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v)
o define as "1" on amd64 and i386 where there is no restriction
o make the type returned consistent with ALIGN
o remove _ALIGNED_POINTER
o make associated comments consistent
Reviewed by: bde, imp, marcel
Approved by: re (kensmith)
# Note: Cavium provided a port that has atomics similar to these, but
# that does a syncw; sync; atomic; sync; syncw where we just do the classic
# mips 'atomic' operation (eg ll; frob; sc). It is unclear to me why
# the extra is needed. Since my initial target is one core, I'll defer
# investigation until I bring up multiple cores. syncw is an octeon specific
# instruction.
them to void * first. This neatly solves the "how do I print a
register_t" problem because sizeof(void *) is always the same as
sizeof(register_t), afaik.
this is correct. While registers are 64-bit, n32 is a 32-bit ABI and
lives in a 32-bit world (with explicit 64-bit registers, however).
Change an 8, which was 4 + 4 or sizeof(int) + SZREG to be a simple '4
+ SZREG' to reflect the actual offset of the structure in question.
places. Provide n32/n64 register name defintions. This should have
no effect for the O32 builds that everybody else uses, but should help
make N64 builds possible (lots of other changes are needed for that).
Obtained from: NetBSD (for the regdef.h changes)
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs. This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.
For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.
Approved by: re (kib)
MFC after: 6 weeks
required by video card drivers. Specifically, this change introduces
vm_cache_mode_t with an appropriate VM_CACHE_DEFAULT definition on all
architectures. In addition, this changes adds a vm_cache_mode_t parameter
to kmem_alloc_contig() and vm_phys_alloc_contig(). These will be the
interfaces for allocating mapped kernel memory and physical memory,
respectively, with non-default cache modes.
In collaboration with: jhb
- Modules and kernel code alike may use DPCPU_DEFINE(),
DPCPU_GET(), DPCPU_SET(), etc. akin to the statically defined
PCPU_*. Requires only one extra instruction more than PCPU_* and is
virtually the same as __thread for builtin and much faster for shared
objects. DPCPU variables can be initialized when defined.
- Modules are supported by relocating the module's per-cpu linker set
over space reserved in the kernel. Modules may fail to load if there
is insufficient space available.
- Track space available for modules with a one-off extent allocator.
Free may block for memory to allocate space for an extent.
Reviewed by: jhb, rwatson, kan, sam, grehan, marius, marcel, stas
trap() function re-enables interrupts if exception happened with
interrupts enabled and therefor status register might be modified
by interrupt filters
atomic_fetchadd_32. Without it gcc would use it as input
register for v and sometimes generate following code for
function call like atomic_fetchadd_32(&(fp)->f_count, -1):
801238b4: 2402ffff li v0,-1
801238b8: c2230018 ll v1,24(s1)
801238bc: 00431021 addu v0,v0,v1
801238c0: e2220018 sc v0,24(s1)
801238c4: 1040fffc beqz v0,801238b8 <dupfdopen+0x2e8>
801238c8: 00000000 nop
Which is definitly wrong because if sc fails v0 is set to 0
and previous value of -1 is overriden hence whole operation
turns to bogus
Yes, this puts things in the wrong place, doesn't compile and is
woefully incomplete. However, it will allow us to more easily track
against the upstream sources without needing to import the entire
Cavium tree under vendor.
This port is based on FreeBSD 7.0 as of April 2007 and the pre-import
MIPS tree (aka mips2), so much work is necessary here.
to prevent race over k0, k1 registers.
- Update interrupts mask in saved status register for
MipsUserIntr and MipsUserGenException. It might be
modified by intr filter or ithread.
hard and soft interrupts
- Do not handle masked interrupts
- Do not write Cause register because most bytes are read-only and
writing the same byte to RW fields are pointless. And in case of
software interrupt utterly wrong
- Get rid of arge_fix_chain, use m_defrag like if_vr
- Rework interrupt handling routine to avoid race that lead
to disabling RX interrupts
- Enable full duplex if requested
- Properly set station MAC address
- Slightly optimize RX loop
- Initialize FILTERMATCH and FILTERMASK registers as linux driver does
- Replace a1 with k1 to while restoring context. a1 was there by mistake,
interrupts are disabled at this point and it's safe to use k0, k1.
This code never was reached beacasue current Status register handling
prevented interrupta from user mode.
write fault or while wiring a mapping that must support write access.
In general, this change should reduce the number of traps that occur for
the purpose of setting the modified bit. More specifically, this change
should prevent traps while holding locks in a sysctl handler. See
kern/kern_sysctl.c revisions 1.168 and 1.195 (svn r192160) for further
details.
Tested by: gonzo
* In arge_attach(), hard reset the MAC blocks before configuring the MAC.
* In arge_reset_dma(), clear pending packet interrupts based off
the hardware counter instead of acking every packet in the ring,
as the hardware counter can exceed the ring size. If the reset
was successful the counters will be zero anyway.
* In arge_encap(), remove an unused variable.
* In arge_tx_locked(), remove redundant setting of the EMPTY flag as
the TX DMA engine sets it for us.
* In arge_intr(), remember to clear the interrupt status bits
relayed from arge_intr_filter().
* Handle RX overflow and TX underflow.
* In arge_tx_intr(), remember to unmask the TX interrupt bits
after processing them.
register increments only every second cycle. The only timing
references for us is Count value. Therefore it's better to convert
frequencies related to it and use them. Besides cleanup this commit
fixes twice more then requested sleep interval problem.
possible future I-cache coherency operation can succeed. On ARM
for example the L1 cache can be (is) virtually mapped, which
means that any I/O that uses temporary mappings will not see the
I-cache made coherent. On ia64 a similar behaviour has been
observed. By flushing the D-cache, execution of binaries backed
by md(4) and/or NFS work reliably.
For Book-E (powerpc), execution over NFS exhibits SIGILL once in
a while as well, though cpu_flush_dcache() hasn't been implemented
yet.
Doing an explicit D-cache flush as part of the non-DMA based I/O
read operation eliminates the need to do it as part of the
I-cache coherency operation itself and as such avoids pessimizing
the DMA-based I/O read operations for which D-cache are already
flushed/invalidated. It also allows future optimizations whereby
the bcopy() followed by the D-cache flush can be integrated in a
single operation, which could be implemented using on-chips DMA
engines, by-passing the D-cache altogether.
Reimplement "kernel_pmap" in the standard way.
Eliminate unused variables. (These are mostly variables that were
discarded by the machine-independent layer after FreeBSD 4.x.)
Properly handle a vm_page_alloc() failure in pmap_init().
Eliminate dead or legacy (FreeBSD 4.x) code.
Eliminate unnecessary page queues locking.
Eliminate some excess white space.
Correct the synchronization of pmap_page_exists_quick().
Tested by: gonzo
a fair number of static data structures, making this an unlikely
option to try to change without also changing source code. [1]
Change default cache line size on ia64, sparc64, and sun4v to 128
bytes, as this was what rtld-elf was already using on those
platforms. [2]
Suggested by: bde [1], jhb [2]
MFC after: 2 weeks
Introduce pmap_try_insert_pv_entry(), a function that conditionally
creates a pv entry if the number of entries is below the high water mark
for pv entries.
Introduce pmap_enter_quick_locked() and use it to reimplement
pmap_enter_object(). The old implementation was broken. For example,
it could block while holding a mutex lock.
Change pmap_enter_quick_locked() to fail rather than wait if it is
unable to allocate a page table page. This prevents a race between
pmap_enter_object() and the page daemon. Specifically, an inactive
page that is a successor to the page that was given to
pmap_enter_quick_locked() might become a cache page while
pmap_enter_quick_locked() waits and later pmap_enter_object() maps
the cache page violating the invariant that cache pages are never
mapped. Similarly, change
pmap_enter_quick_locked() to call pmap_try_insert_pv_entry() rather
than pmap_insert_entry(). Generally speaking,
pmap_enter_quick_locked() is used to create speculative mappings. So,
it should not try hard to allocate memory if free memory is scarce.
Tested by: gonzo
registers with ar71xx_bus_space_reversed. Note, that byte order
of values is handled by drivers. bus_spaces fixes only position
of register in word.
- Replace .hints hack for AR71XX UART with ar71xx_bus_space_reversed.
CACHE_LINE_SIZE constant. These constants are intended to
over-estimate the cache line size, and be used at compile-time
when a run-time tuning alternative isn't appropriate or
available.
Defaults for all architectures are 64 bytes, except powerpc
where it is 128 bytes (used on G5 systems).
MFC after: 2 weeks
Discussed on: arch@
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
1) Move the new field (brand_note) to the end of the Brandinfo structure.
2) Add a new flag BI_BRAND_NOTE that indicates that the brand_note pointer
is valid.
3) Use the brand_note field if the flag BI_BRAND_NOTE is set and as old
modules won't have the flag set, so the new field brand_note would be
ignored.
Suggested by: jhb
Reviewed by: jhb
Approved by: kib (mentor)
MFC after: 6 days
to the full path of the image that is being executed.
Increase AT_COUNT.
Remove no longer true comment about types used in Linux ELF binaries,
listed types contain FreeBSD-specific entries.
Reviewed by: kan
".note.ABI-tag" section.
The search order of a brand is changed, now first of all the
".note.ABI-tag" is looked through.
Move code which fetch osreldate for ELF binary to check_note() handler.
PR: 118473
Approved by: kib (mentor)
kernel. Rather than just kick off the page daemon, we actively retire
more mappings. The inner loop now looks a lot like the inner loop of
pmap_remove_all.
Also, get_pv_entry can't return NULL now, so remove panic if it did.
Reviewed by: alc@
- Add debug output
- Fix pmap_zero_page and related places: use uncached segments and invalidate
cache after zeroing memory.
- Do not test for modified bit if it's not neccessary
(merged from mips-juniper p4 branch)
- Some #includes reorganization
