Add support for Toradex Apalis i.MX6 development board.
Add support for imx6 audio transmitting, include drivers for:
o Digital Audio Multiplexer (AUDMUX)
o Smart Direct Memory Access Controller (SDMA)
o Synchronous Serial Interface (SSI)
Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full
(class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART
class only.
Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.
Moves all the duplicate code to a single function.
Verify for invalid modes and unwanted flags before pass the new flags to
driver.
Make gpio_default_map_gpios() static. No functional changes.
Improves the GPIO API description a little bit.
gpio_pin_max must return the maximum supported pin number and not the total
number of pins on the system.
Make the GPIO children attach to the first unit available and not only to
unit 0.
This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.
r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479,
r277480, r277512, r277516:
Add inline implementations of arm bus_space_read/write_N().
Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.
Use the explicit member initializer style to init the bus_space struct.
Use arm/bus_space-v6.c for all armv6 systems
Consolidate many identical implementations of bus_space to a single
common tag and implementation shared by armv4 and armv6.
Micro-optimize the new arm inline bus_space implementation by grouping all
the data the inline functions access together at the start of the bus_space
struct so that they all fit in a single cache line.
Allow i2c bus speed to be configured via hints, FDT data, and sysctl.
Implement bus speed setting for OMAP4, AM335x, and imx5/6.
Fix the i2c bus speed divisors for TI OMAP4 and AM335x to give the
advertised 100, 400, and 1000 KHz speeds.
PR: 195009
Attach the imx6 CCM driver during BUS_PASS_CPU.
Unconditionally enable the clocks for all imx6 devices that we have drivers
for, or that are required to run the chip (such as busses).
Attach this driver during BUS_PASS_BUS and move the cpu init code to a
bus_new_pass() handler so it doesn't happen until BUS_PASS_CPU. This allows
the anatop driver to outbid the generic simplebus driver (which the FDT
data describes as compatible).
Add compat strings for all the flavors of GIC this driver should support.
Also allow the driver to attach to ofwbus as well as simplebus, some FDT
data puts the root interrupt controller on the root bus.
Add a common routine for parsing FDT data describing an ARM GIC interrupt.
Use gic_decode_fdt() rather than a local routine to parse fdt interrupt
properties. Move fdt_pic_table and fdt_fixup_table into imx6_machdep.c,
which means imx6 doesn't need imx_common.c anymore.
The private peripheral interrupts start at offset 16, not 0. Also, use
names rather than inline mystery constants for these offsets.
- Add a basic iomux driver for imx6.
- Implement the same public interface in imx51 and imx6 iomux
- The iomux driver is no longer optional, remove it from kernel configs.
- Implement the imx_iomux_get/set_gpr() interface for imx6.
- Stop setting the iomux device status to disabled, now that we have a driver.
o Enable GPIO device driver for i.MX6.
It was originally written for i.MX5 and compatible with newer chip.
o Extend device tree information
o style(9) fixes
o Rename gpio driver file.
Add a function to get the frequency of the AHB bus. Another stopgap
function until we have full clock support for imx6.
The imx5x and imx6 chips have an onboard IOMUX device which also contains a
few "general purpose registers" whose values control chip behavior in ways
that have nothing to do with IO pin mux control. Define a simple API that
other soc-specific code can use to read and write the registers, and provide
the imx51 implementation of them.
Fix a typo.
- Nuke unused sdhci_softc.
- Static'ize sdhci_debug local to sdhci.c.
- Const'ify PCI device description strings.
- Nuke redundant resource ID members from sdhci_pci_softc.
- Nuke unused hw.sdhci_pci.debug tunable.
- Add support for using MSI instead of INTx, controllable via the tunable
hw.sdhci.enable_msi (defaulting to on) and tested with a RICOH R5CE823 SD
controller.
- Use NULL instead of 0 for pointers.
Rename vt_generate_vga_palette() to vt_generate_cons_palette() and
change it to build a palette where the color index is the same than in
terminal escape codes, not the VGA index. That's what TCHAR_CREATE()
uses and passes to vt(4).
The main differences between both orders are:
o Blue and red are swapped (1 <-> 4)
o Yellow and cyan are swapped (3 <-> 6)
The problem remained unnoticed, because the RGB bit indexes passed to
vt_generate_vga_palette() were reversed. This inversion was cancelled
by the colors inversions in the generated palette. For instance, red
(0xff0000) and blue (0x0000ff) have bytes in opposite order, but were
swapped in the palette. But after changing the value of blue (see last
paragraph), the modified color was in fact the red one.
While here, tune the palette to better match console colors and improve
the readability (especially the dark blue).
This is an MFC of r269783 and r269791.
Cache the imx6 SoC type in a static var so that it only has to be figured
out by sniffing hardware registers once.
Add a missing clock register definition.
Pending interrupt status is cleared by writing to the ISR, not the data reg.
Use named constant rather than '0' to access the reset controller register.
Move the pl310.enabled tunable to hw.pl310.enabled. Clean up a few minor
style(9) nits. Use DEVMETHOD_END.
Break out the code that figures out the L2 cache geometry to its own
routine, so that it can be called from multiple places in upcoming changes.
Call platform_pl310_init() before enabling the controller, and handle the
case where the controller is already enabled.
Add defines for the bits in the PL310 debug control register.
Add a public routine to set the L2 cache ram latencies. This can be
called by platform init routines to fine-tune cache performance.
Enable PL310 power-saving modes and tune the cache ram latencies for imx6.
Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51
or imx6 ccm code.
Actually save the mpcore clock frequency retrieved from fdt data.
imx6..
- Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.
- Flag several sysctl variables as tunables.
- Rework the cpu frequency management code for imx6 to add "operating
points" and min/max frequency controls.
generic timer...
- Setup both secure and non-secure timer IRQs.
We don't know our ARM security state, so one of them will operate.
- Don't set frequency, since it's unpossible in non-secure state.
Only rely on DTS clock-frequency value or get clock from timer.
Switch imx6 to using the mpcore per-cpu event timers, but continue to use
the GPT timer, which is fixed-frequency, as a timecounter.
Change NO_EVENTTIMERS from an arm-specific to an MI option, so that it can
be used in MI code.
263030, 263033, 263034, 263056, 263057,
Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.
Remove all traces of support for ARM chips prior to the arm9 series.
Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).
Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.
Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.
Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.
Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.
Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.
Remove some unnecessary indirection and jump right to the handler functions.
Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).
Remove the unreferenced DATA() macro.
Remove #include <machine/asmacros.h> from files that don't need it.
262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949,
262950
Strip arm/conf/DEFAULTS down to just items that are mandatory for running
the architecture.
Move all the files named foo/common.c to foo/foo_common.c
Initial cut for DTS on the hl201 board.
Add commented out dts for sam9260ek as well as early printf support.
Make clock optional on uart nodes, then back it out ("I don't know what I
was thinking, but it is lame.")
Set the baud rate if it isn't 0
Make at91_soc_id() public.
Properly round at91 resource on unmapping.
Move AT91 AIC related stuff to own file.
Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in
LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32.
Follow r262916 with one more config file that references a renamed common.c
Remove bogus AT91 define that causes compile errors. Most of the defines
for SAM9X are going away soonish anyway (once FDT works), but until
then...
Remove all dregs of a per-thread undefined-exception-mode stack.
Rework the VFP code that handles demand-based save and restore of state.
Always call vfp_discard() on thread death.
When a thread begins life it doesn't own the VFP hardware state on any cpu.
Make undefined exception entry MP-safe.
262885, 262891, 262903,
imx6: Add a tunable to set the number of active cores, enable SMP by default.
ffec: Fix multicast filtering.
Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.
OMAP: When calculating the MPU freq, make sure not to overflow.
Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display
nandfs: Slight code reordering to make error branch last.
Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.
Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.
r262585, r262587, r262696, r262712
Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.
aicasm: Don't complain about missing prototypes to ease bootstrap issues.
Vybrid: Add driver for Inter-Integrated Circuit (I2C).
imx6: Initialize the Low Power Mode bits to keep the ARM cores running
during WFI.
All our current ARM multi-core systems have all cores in one package with
a shared L2 cache, reflect that in the common cpu_topo() routine.
mpcore timer: Supply a DELAY() implementation via weak linkage, so that
SoC-specific code can supply a better implementation.
imx6: Add some rudimentary voltage control.
Add an armv7 implementation of cpu_sleep().
Add __used attribute so that the DELAY implementation doesn't get
optimized away as unreferenced, causing linker errors when trying to
resolve the weak reference to the missing function.
r262482, r262483, r262531,
Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.
If the L2 cache type is PIPT, pass a physical address for a flush.
Actually set the proper bit to indicate TTB shared memory.
Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.
Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.
Add the bits needed to run SMP on imx6.
Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.
Minor tweaks to the imx GPT timer
Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
r262355, r262419,
Add Vybrid driver for Synchronous Audio Interface (SAI).
Decrease SAI buffer size. Handle eDMA interrupt on running channel only.
Give the physmem fdt helper routines static linkage since no global
definition of them is provided anywhere.
Add imx6 early printf support, wrapped in #if 0 because it's rarely needed.
Add basic cpu frequency control and temperature monitoring to imx6_anatop.
Add the FREEBSD_BOOT_LOADER option so that a loaded DTB passed in from
ubldr will actually get used.
Create a generic IMX6 kernel config, then fix it to have an ident line.
Don't force imx6 bootverbose on anymore, it can be set from ubldr now.
r261955, r261958,
Add a driver to provide access to imx6 on-chip one-time-programmble data.
Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when
necessary.
It turns out Freescale cleverly made the ocotp device compatible across
several different families of SoCs, so move it to the freescale directory
and prefix everything with fsl rather than imx6.
Convert the imx6 sdhci "R1B fix" from a busy-loop in the interrupt handler
to a callout.
Increase the wait time for acquiring the SD bus from 10 to 250ms.
If no compatible cards were found after probing the SD bus, say so.
Add timeout logic to sdhci, separate from the timeouts done by the hardware.
After a timeout, reset the controller using SDHCI_RESET_CMD|SDHCI_RESET_DATA
rather than SDHCI_RESET_ALL; the latter turns off clocks and power, removing
any possibility of recovering from the error.
Add a helper routine to depth-search the device tree for a node with a
matching 'compatible' property.
r261848, r261855
On armv6 and later, use the WriteNotRead bit of the fault status register
to decide what protections are required by the faulting access.
Use the right symbols for determining arm architecture. Include the
necessary header file which has the new FAULT_WNR symbol defined in it.
Allow the kernel to be loaded at any 1MiB address. This requirement is
because we use the 1MiB section maps as they only need a single pagetable.
Add function for configuring Vybrid PLL4 (Audio) clock frequency output.
imx6 changes ...
- Fix the definition of the SDHCI_STATE_DAT and SDHCI_STATE_CMD fields,
and add SDHCI_RETUNE_REQUEST. None of these are actually used in the
code yet.
- Write translation code for the SDHCI_PRESENT_STATE register.
Freescale moved some bits around in their version of the register,
adjust things so that the sdhci code sees the standard layout.
- Add standard non-removable and cd-gpios properties to the usdhc
devices. That generates references to gpio devices, so uncomment them
even though there isn't a gpio driver to do anything with them yet.
- Add handling of standard "non-removable" property, and also some
workaround code so that if card detect is wired to a gpio pin, for now
we just treat it the same as non-removable (because there isn't a gpio
driver yet).
- Enable both sdcard slots, but not the sdio-based wifi that we don't
yet have a driver for.
- Remove a couple obsolete function declarations.
Remove FreeBSD 6 support from atmel usb controllers.
Add Vybrid drivers for:
- Enhanced Direct Memory Access Controller (eDMA)
- Direct Memory Access Multiplexer (DMAMUX)
r261596, r261606
Add the imx sdhci controller.
Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.
Add the missing ')' at end of sentence. Reword it to use a more common idiom.
Pass the kernel physical address to initarm through the boot param struct.
Make functions only used in vfp.c static, and remove vfp_enable.
Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.
Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.
Remove references to PHYSADDR where it's used only in debugging output.
Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.
Add support for Colibri VF50 Evaluation Board.
Add driver for Display Control Unit (DCU4).
Add prototype for tcon_bypass() used by dcu4.
Add register definition.
o Expand device tree information
o Export iomuxc (pins) configuration to DTS
o Allow devices to assign clocks in DTS
o Split kernel configuration to chip common and board specific parts.
