aic79xx.c:
o Remove redundant ahd_update_modes() call.
o Correct panic in diagnostic should state corruption cause
the SCB Id to be invalid during a selection timeout.
o Add workaround for missing BUSFREEREV feature in Rev A silicon.
o Corect formatting nits.
o Use register pretty printing in more places.
o Save and restore our SCB pointer when updating the waiting queue
list for an "expected" LQ-out busfree.
o In ahd_clear_intstat, deal with the missing autoclear in the
CLRLQO* registers.
o BE fixup in a diagnostic printf.
o Make sure that we are in the proper mode before disabling
selections in ahd_update_pending_scbs.
o Add more diagnostics.
o task_attribute_nonpkt_tag -> task_attribute: we don't need a
nonpkt_tag field anymore for allowing all 512 SCBs to be
used in non-packetized connections.
o Negotiate HOLD_MCS to U320 devices.
o Add a few additional mode assertions.
o Restore the chip mode after clearing out the qinfifo so that
code using ahd_abort_scbs sees a consistent mode.
o Simplify the DMA engine shutdown routine prior to performing
a bus reset.
o Perform the sequencer restart after a chip reset prior to
setting up our timer to poll for the reset to be complete.
On some OSes, the timer could actually pre-empt us and order
is important here.
o Have our "reset poller" set the expected mode since there is
no guarantee of what mode will be in force when we are called
from the OS timer.
o Save and restore the SCB pointer in ahd_dump_card_state(). This
routine must not modify card state.
o Ditto for ahd_dump_scbs().
aic79xx.h:
o Add a few more chip bug definitions.
o Align our tag on a 32bit boundary.
aic79xx.reg:
aic79xx.seq:
o Start work on removing workarounds for Rev B.
o Use a special location in scratch from for stroring
our SCBPTR during legacy FIFO allocations. This corrects
problems in mixed packetized/non-packetized configurations
where calling into a FIFO task corrupted our SCBPTR.
o Don't rely on DMA priority to guarantee that all data in
our FIFOs will flush prior to a command completion notification
going out of the command channel. We've never seen this assumption
fail, but better safe than sorry.
o Deal with missing BUSFREEREV feature in H2A.
o Simplify disconnect list code now that the list will always
have only a single entry.
o Implement the AHD_REG_SLOW_SETTLE_BUG workaround.
o Swith to using "REG_ISR" for local mode scratch during
our ISR.
o Add a missing jmp to the data_group_dma_loop after our
data pointers have been re-initialized by the kernel.
o Correct test in the bitbucket code so that we actually
wait for the bitbucket to complete before signaling the
kernel of the overrun condition.
o Reposition pkt_saveptrs to avoid a jmp instruction.
o Update a comment to reflect that the code now waits for
a FIFO to drain prior to issuing a CLRCHN.
aic79xx_inline.h:
o Remove unused untagged queue handling code.
o Don't attempt to htole64 what could be a 32bit value.
aic79xx_pci.c:
o Set additional bug flags for rev A chips.
This ensures that we don't enter our interrupt handler until
all OSM components it might reference have been fully initialized
during attach.
Remove vestiges of untagged queue handling.
Add hints to ahd_get_scb() so it knows what type of SCB collision
management to perform for each new transaction.
Properly disable/enable IU_REQ with changes in tagged queuing and
disconnection settings passed in by CAM.
Uninline some routines that are just too big to be inlined.
Add some helper macros for SCB ID collision management.
Use a hardware SCB rather than a full SCB for the "next
SCB to queue" sentinal.
Update for new "high SCBID bit" qoutfifo delivery scheme.
If interrupts are disabled on the card, don't bother running
our interrupt handler. Our handler was called due to a shared
interrupt, and the card's interrupts are explicitly disabled
to prevent entry into our interrupt handler.
functions for register pretty-printing.
Implement "top bit of SCBID is valid bit" qoutfifo delivery scheme.
"the the" -> "the".
Remove old and never used tag collision chain handling in the
sequencer. Tag collisions are never allowed to get as far as
on the controller.
Simplify busy target table handling routines.
Update comments to reflect reality.
Add support for catching more protocol violations.
Correct a bug in data fifo handling in mixed packetized and
non-packetized environments. SG_STATE must be cleared even
if an SG fetch is not in progress at the time of FIFO shutdown
or we may confuse the non-packetized transaction idle-loop.
busy target table addressing changes, our qoufifo scheme,
and long lun support.
Drop bus reset hold delay to 25us.
Remove chip workarounds for revisions that never went to
production.
Add aic7901A identification information.
Remove untagged queue logic.
Push protocol violation handler to its own routine. We now
properly detect and recovery from the following target induced
protocol violations:
o Unexpected or invalid non-packetized Relesection
o Command complete with no status message
o Good Status after incomplete cdb transfer
Add an SCB collision avoidance algorithm that allows us to
use all 512 SCBs for non-packetized operations. There is
still the possibility of running out of SCBs with non-colliding
tag identifiers, but the algorithm ensures that the stall will
be rare and short lived.
Convert to a read-only algorithm for validing entries in the
qoufifo. The sequencer now toggles the high bit of the SCB
identifier on each wrap around of the qinfifo. If the high
bit doesn't match the expected value for this pass of the
qoufifo, the entry is not valid. This has the benefit of
working on machines that have large granularity cache write
back semantics without requiring any additional memory.
Remove lots of code related to untagged SCB queues. Since
these controllers can keep a fully busy target table, we
will never have untagged SCB queues.
Lots of improvements to diagnostic logging.
Clarify some comments.
Don't clear BUSFREE interrupt enable in SIMODE1 in the SELTO
handler. Just clearing the interrupt status is sufficient and
this avoids the chance of disabling busfree detection in connection
that occurs while we are handling the busfree interrupt.
Clear all possible interrupt sources when handling a busfree
interrupt. The hardware clears some but not all of them.
Don't panic if we get into the default SCSIINT handler.
Dump the card state and clear all interrupt sources in the
hope that we can continue.
LASTPHASE != PREVPHASE. Use the correct PREVPHASE for testing
against values in the PERRDIAG register.
According to SPI4, the bus free that is required after certain
PPR negotiations will only occur at the end of all message phases.
Handle the bus free if it occurs after a transaction in either
the message-in or message-out phases. The busfree can also occur
if the status of IU_REQ changes due to a WDTR or SDTR message.
We now set the expect busfree flag in ahd_set_syncrate so that
it works regardless of message type.
Correct a problem with missing certain busfree events. The
chip supports single-stepping even if a SCSIINT is pending.
This obviates the need to clear all of the SCSI interrupt enables
prior to single stepping. Since ENBUSFREE can only be disabled
manually and not re-enabled, avoiding touching this bit in the
single-step case yields reliable bus free detection.
Enhance ahd_clear_intstat to clear all SCSIINT sources.
Only use ahd_update_pending_scbs() if we are active on the
bus. We cannot modify the "MK_MESSAGE" bits on SCBs in the
execution queue if a selection might be in process since
the sequencer uses this bit to detect PPR negotiation to
a target with an outstanding IU_REQ agreement.
Allocate the SCB delivery mechansim's sentinal SCB specially
so we don't waste a valid SCB for this task.
Move tranceive state settle logic to ahd_chip_init() since
this needs to occur after every chip reset, not just the
chip reset that happens during primary driver initialization.
Correct a bug with transmitting lun information in packetized
connections.
Restrict busy target table operations to the range of luns
that can be used for non-packetized connections. Larger luns
can only be accessed in packetized mode.
Correct a busy target table addressing bug.
Be more careful about how we shutdown the DMA engines during
bus reset events.
Only freeze the SIMQ once regardless of the number of bus
reset events that occur while we are polling for the resets
to stop.
Don't rely on the sequencer remaining paused() during our
reset poll. It is safe for the sequencer to run during this
time, and many callers to the bus reset code would need to
be modified to make this assumption universally true.
Even if we are not going to clobber SCB state when an auto-request
sense SCB has a check condition, we must still unfreeze the queue.
Re-arrange the BAD STATUS handler to handle this case appropriately.
Modify the SCB download size depending on whether long luns are
being stored in the SCB.
Add ahd_print_register() for pretty printing register diagnostics.
Don't trust that the flexport logic to detect the presence of
a seeprom is available. It may not be on some motherboard
implementations.
"the the" -> "the"
our interrupt handler. Our handler was called due to a shared
interrupt, and the card's interrupts are explicitly disabled
to prevent entry into our interrupt handler.
Set the AHC_LSCBS_ENABLED softc flag appropriately.
Convert to using softc storage for our seeprom data.
Break seeprom parsing out into a separate routine.
Change our policy in regards to AHC_SPIOCAP so that we
will allow auto-termination to take place on some aic7855
based cards.
Remove initialized but never really used variables.
Use "offset == 0" not "period == 0" to denote async trasnfers.
Implement TARG_IMMEDIATE_SCB non-disconnected target mode
SCB delivery scheme.
In our timeout handler, don't rely on the phase already being
set to denote an active connection. IDENTIFY_SEEN is more
than sufficient.
Verify that the softc passed in ahc_detach is still known
to the driver before blindly using it.
functions for register pretty-printing.
Only clear SELDO once we've recorded enough information for
the host to understand that the connection is valid. The
host uses the SELDO status as a handshake to close this
race window.
Correct a bug in target mode handling of non-disconnected
transactions. The host would indicate the correct SCB to
DMA by setting the SCB id in the currently selected hardware
SCB. Unfortunately, we would then immediated allocate a
hardware SCB which, depending on the access patern might not
be the same hardware SCB that the host setup for us. Avoid
this by having the host put the SCBID into scratch ram.
Document the SXFRCTL2 register found on U2 and U160 controllers.
Overload the MWI_RESIDUAL field for use as the SCB to be downloaded
for "immediate" (or those without the disconnect privledge)
transactions.
Add scratch ram locations for the 274X that give us a bit more
information including whether to enable extended translation.
value slipped in from a debugging session.
Add AHC_LSCBS_ENABLED and AHC_SCB_CONFIG_USED ahc_flags which
allow for some code to move to the core.
Remove extern for ahc_syncrates[]. The OSMs no longer need
direct access to this array.
Add serial eeprom field to the ahc softc.
Prototype ahc_search_untagged_queues() and ahc_print_register().
Convert to AHC_SHOW_XXX debug option format.
Switch to using the same AHC_SHOW_XXX format as the ahd driver.
Always give the target a MSG_INITIATOR_DET_ERR for unexpected
DT or ST phase errors.
Add AHC_SHOW_SELTO diagnostics.
Force renegotiation whenever an unexpected bus free occurs
to rule out a negotiation mismatch as the cause for the error.
Use "offset != 0" as an intenal indicator of "async" rather than
using a period of 0.
In ahc_fetch_devinfo(), correct a bug in getting "our id" as
target. We weren't looking at all the SEQ_FLAGS that indicate
that we are still in a selected rather than reselected state.
Add support for the AHC_SHOW_MESSAGES debugging option.
If ahc_parse_msg() tells us to terminate the message loop,
do so without acking the message. The message may be one
that the sequencer needs to handle on its own.
In ahc_parse_msg() return MSGLOOP_TERMINATED for all messages
the sequencer handles.
Allocate storage for, and track, seeprom contents in our softc.
Touch all SCB bytes to avoid parity errors should one of our
debugging routines read an otherwise uninitiatlized byte.
S/G lists must be 8 byte aligned. Reflect this in our DMA tag.
"the the" -> "the" in a comment
When pausing the card to perform error recovery, ensure that we
are not in the process of being selected or have just been selected
but have not yet handled that selection. This leaves only one other
race window, in the command complete handler, that needs to be fixed
to make recovery 100% bullet proof.
Convert a few straglers from bsd u_intX_t to inttypes uintX_t.
Remove unused variables.
Split out searching of the untagged holding queues to its own
routine. In certain recovery scenarios, we want to just
remove entries in the untagged queue without touching related
transactions that are in the QINFIFO or WAITING queues that are
searched by ahc_search_qinfifo().
Add an implementation of the ahc_print_register() routine which
"pretty prints" registers. The extra bloat in the form of string
tables for this feature is controlled by the AHC_REG_PRETTY_PRINT
option.
Fix a few bugs in ahc_enable_lun() that could prevent controllers
lacking the multiple-target-id feature from changing "our id" on
the fly. Add a large comment to this section while I'm here
describing the restrictions on "id switching".
Honor the extended translation setting for EISA cards now that
I've determined where this information is kept.
Defer card interrupt enabling to the OSM since it may have
some initialization to perform that must occur before interrupts
can be enabled.
ahc_eisa.c:
ahc_pci.c:
Conform to new aic7xxx IRQ API.
Adapt to aic7xxx_freebsd -> aic7xxx_osm changes.
aic7770.c:
Disable card generated interrupt early in our probe for
"extra safety"
Commonize some seeprom code with the PCI side of the driver.
aic7xxx.c:
Correctly initialize a few scratch ram locations during
a sequencer restart. This avoids spurious sequencer ram
parity errors in some configurations.
Include the softc in ahc_update_residual calls. We need it
for some diagnostics in this code path.
Flag a data overrun on an auto-request sense failure as a
CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR.
Force a renegotiation after noticing a parity error. This
covers targets that lose our negotiation settings but don't
bother to give us a unit attention condition. This can happen
if a target fails during a reselection of us during a cable
pull.
Convert some code to using constants.
Fix some typos.
Correct target mode message loop handling. ahc_clear_msg_state
was not clearing the "need to go to message out phase" bit once
our loop was over.
Simplify some abort handling code.
Include tag information in target mode immediate notify events.
When shutting down EISA controllers, don't EISA BIOS settings in
the high portions of scratch ram. This fixes warm boot issues on
some systems.
Save a bit of space by only allocating the SCBs that we can use.
Avoid some code paths in ahc_abort_scbs() if we are currently
acting as a target.
Correctly cleanup stranded SCBs in the card's SCB array. These
are SCBs who's mapping has already been torn down by code that
aborted the SCB by seeing it in another list first.
Add a comment about some potential bus reset issues for target
mode on Twin (EISA only) controllers.
aic7xxx.h:
Cleanup the hardware scb definitions a bit.
Allocate a ful 256 byte scb mapping index. This simplifies
the lookup code since the table covers all possible (and potentially
bogus) values.
Make AHC_DEBUG work again.
aic7xxx.reg:
Updates to hardware SCB definition.
New definitions for target mode fixes.
aic7xxx.seq:
In target mode, initialize SAVED_LUN just after we receive
the identify message. It may be required in the error recovery
path when a normal cdb packet (includes lun) is not sent up to
the host for processing.
Respond to irregular messages during a selection in target mode.
Defer looking for space for a cdb packet until we are about to
enter command phase. We want to be able to handle irregular messages
even if we would otherwise return QUEUE_FULL or BUSY.
Add support for sending Ignore Wide Residue messages as a target.
In the disable disconnect case in target mode, set our transfer
rate correctly once data are availble.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Add the ability to write and erase the seeprom.
aic7xxx_inline.h:
Correct Big Endian handling of large cdb sizes (> 12 bytes).
Adaptec to changes in the calc_residual API.
Correct a target mode bug where we always attempted to service
the input queue even if no progress could be made due to lack
of ATIOs.
aic7xxx_osm.c:
Adaptec to new IRQ mapping API. The new API allows the core
to only enable our IRQ mapping once it is safe (sufficient
initialization) to do so.
Slap bootverbose protection around some diagnostics.
Only attempt DT phases if we are wide.
aic7xxx_osm.h:
Enable big endian support.
Adjust for IRQ API change.
aic7xxx_pci.c:
Be more careful about relying on subvendor 9005 information.
We now only trust it for HBAs. This should allow the driver
to attach to some MBs where the subvendor/device information
does not follow the Adaptec spec.
Only enable interrupts on the card once we are fully setup.
Disable external SCB ram usage on the aic7895. I have not
been able to make it 100% reliable.
Adjust to seeprom routines being properly prefixed with "ahc".
Fix a few bugs in the external SCB ram probing routine. We
need to clear any parity errors we've triggered during the
probe to avoid future, fatal, interrupts.
If we detect an invalid cable combination, pretent there are
no cable at all. This will enable all of the terminators
which is probably the safest configuration we can "guess".
MFC after: 4 days
should be initialized to 0 for PCI adapters which was a side-effect of
the memset in ahc_alloc(). EISA/VL adapters require our unpause value to
include the "levelness" of our interrupt.
This change allows EISA adapters to work again.
PR: 29689, 29471
Correct an off by one in our critical section handling.
SEQADDR always reads the next instruction to execute,
so we must subtract one from its value before making
comparisons with entries in the critical section table.
Print a few additional registers whenever we dump
card state.
Show the SCB_CONTROL and SCB_TAG values for all pending
SCBs in card SCB ram when dumping card state.
aic7xxx.seq:
Fix a bug introduced while optimizing the SDPTR path.
We would ack the SDPTR message twice on Ultra2 or better
chips if it occurred after all data had been transferred
for a transaction.
Change our workaround for the PCI2.1 retry bug on some
chips. Although the previous workaround was logically
correct, its faster method of draining the FIFO seemed
to occassionally confuse the FIFO state. We now drain
the FIFO at half the speed which avoids the problem.
aic7xxx_pci.c:
Chips with the PCI 2.1 retry bug can't handle a 16byte
cachesize. If the cachesize is set to 16bytes, drop
it to 0.
