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177 Commits

Author SHA1 Message Date
rnoland
aaadc6c547 vblank[crtc].last represents the hardware counter while request.sequence 
represents the software counter.  Don't currupt things here.

MFC after:	3 days
 2009-06-23 17:50:35 +00:00
rnoland
e2c228d3d4 Hold the lock while we save/restore register for suspend/resume. 
MFC after:	3 days
 2009-06-23 17:38:28 +00:00
rnoland
4f053b7460 The G45 docs indicate that all G4X chips use the new framecount register. 
Intel agrees with my reading of the docs, make it so for all G4X chips.

The new register also has a 32 bit width as opposed to 24 bits.  Fix
things up so that the counters roll over properly.

MFC after:	3 days
 2009-06-20 16:45:14 +00:00
rnoland
36023fcd02 realloc() behaves identically to malloc when passed a NULL object pointer 
If an error does occur we would have left max_context with an incorrect
value.

MFC after:	3 days
 2009-06-20 16:40:48 +00:00
rnoland
4b0b98bba1 Don't panic if drm_rmmap is called with a NULL map pointer. 
MFC after:	3 days
 2009-06-20 16:37:24 +00:00
rnoland
f0aed0f29a Don't try to setup interrupts for drivers that don't support them. 
This causes sis and probably a couple of other driver to panic and fail.

Tested by:	cpghost <cpghost@cordula.ws>
PR:		133554
MFC after:	3 days
 2009-04-19 16:54:33 +00:00
rnoland
2444e34b78 check offsets for R300_ZB_ZPASS_ADDR 
Submitted by:	Maciej Cencora <m.cencora@gmail.com>
MFC after:	3 days
 2009-04-07 22:26:53 +00:00
rnoland
f5751c34ee Add regs required for occlusion queries support 
Submitted by:	Maciej Cencora <m.cencora@gmail.com>
MFC after:	3 days
 2009-04-07 22:20:58 +00:00
rnoland
d8382f1581 Add support for RV790 (HD 4890) asics 
MFC after:	3 days
 2009-04-03 19:23:14 +00:00
rnoland
c5caf6772f A little more cleanup from AMD, if we don't have the right microcode 
there is no reason to mess with the chip.

MFC after:	3 days
 2009-04-03 19:21:39 +00:00
rnoland
166d59298a Simplify the radeon microcode loading. 
Submitted by:	Christoph Mallon
MFC after:	3 days
 2009-03-31 17:52:05 +00:00
rnoland
7c16ec50d6 We don't know what these pages are going to be used for, they should be 
un-cached.  This got lost somewhere with all the bus_dma fixups.

MFC after:	3 days
 2009-03-30 18:01:42 +00:00
rnoland
5bf93e3bc7 Load the right microcode for RS780. 
MFC after:	3 days
 2009-03-30 17:49:21 +00:00
rnoland
71edadf45e Fix up waiting on vblank again... This reverts a last minute change that 
I made on the last patch, it seems to upset suspend/resume and shutdown.

MFC after:	3 days
 2009-03-26 02:10:18 +00:00
rnoland
f7c1e3a6bf Rework the management of vblank interrupts a bit. 
When a vt switch occurs the irq handler is uninstalled.  Interrupts
and the state tracking of what was enabled/disabled wasn't working
properly.  This should resolve the reports of "slow windows" after a
vt switch, among other things.  The radeon 2d driver seems to work a
bit more correctly than the Intel driver.  With the Intel driver,
vblank interrupts will be enabled at system startup and will only
be disabled after an additional modeset (vt switch, dpms, randr event).

With this patch, I am able to run glxgears synced to vblank and
vt switch while it is running without ill effects.

MFC after:	3 days
 2009-03-25 01:50:56 +00:00
rnoland
6a5678040a Intel handled the management of the breadcrumb counter inconsistently. 
Make sure that we always handle it the same way.

MFC after:	3 days
 2009-03-25 01:44:16 +00:00
rnoland
164b031cda The GART allocations are a propery of the gart, not of scatter-gather 
memory.  Track them in the appropriate structure.

MFC after:	3 days
 2009-03-25 01:41:56 +00:00
rnoland
adefdc48e5 Fix up the flags to bus_dmamem again. The man page incorrectly showed 
the BUS_DMA_NOCACHE flags as being a valid flag for load instead of alloc.

Discussed with:	kib
MFC after:	3 days
 2009-03-22 20:58:29 +00:00
rnoland
0c27368296 vm_offset_t is unsigned, so compare of >= 0 is not needed. 
Found with:	Coverity Prevent(tm)
CID:		2259

MFC after:	3 days
 2009-03-20 18:35:16 +00:00
rnoland
b1f84dee06 Remove the DRM_ERROR to fix build. It didn't make any sense anyway. 
MFC after:	3 days
 2009-03-20 18:01:32 +00:00
rnoland
20b6095aac Fix what appears to be a typo, and restore the registers correctly. 
Found with:	Coverity Prevent(tm)
CID: 		2454
 2009-03-20 17:51:26 +00:00
rnoland
1d4e991616 Don't deref dev->dev_private before checking that it exists. 
Found with:	Coverity Prevent(tm)
CID:		2940

MFC after:	3 days
 2009-03-20 17:48:36 +00:00
rnoland
895053fb73 Only issue the wakeup and store the counter if vblank is enabled on 
the pipe.

MFC after:	3 days
 2009-03-20 04:53:12 +00:00
rnoland
2a1f86a975 Add a couple of radeon pci ids. 
MFC after:	3 days
 2009-03-20 04:49:48 +00:00
rnoland
074d756fc9 Adjust the flags to bus_dmamem around here too. 
MFC after:	3 days
 2009-03-20 04:48:27 +00:00
rnoland
d310eb36e2 Add some debugging so I can see when syscalls are being restarted 
consistantly.  After a lengthy irc discussion it seems like we
shouldn't need to worry about them, but it's nice to know about.

MFC after:	3 days
 2009-03-19 08:36:08 +00:00
rnoland
eadbcd8e34 Rework vblank handling to try to resolve some reports of "slow" windows 
after vt switch or suspend.  I can't really test this on Intel right now
but I think I've heard reports of it on radeon as well.  I can't break
it on the radeon here.

MFC after:	3 days
 2009-03-19 08:34:04 +00:00
rnoland
45592455be Sync up the rest of the code that we use with what Intel is shipping 
-Some irq/vblank related changes that hopefully will help.
	-A little more cleanup while I'm here.

MFC after:	3 days
 2009-03-19 08:28:36 +00:00
rnoland
78db4b9606 Pull in some suspend / resume changes from Intel's code 
Tested by:	mav@
MFC after:	3 days
 2009-03-19 08:22:56 +00:00
rnoland
b18e0f5075 Cast to (unsigned long) to make printf happy on i386 
MFC after:	3 days
 2009-03-17 05:10:12 +00:00
rnoland
6c3703e6cd Add support for matching solely on vendor id. 
We will use this method with nouveau

MFC after:	3 days
 2009-03-17 03:53:44 +00:00
rnoland
224f04f590 Improve the debugging output of drm_mmap 
MFC after:	3 days
 2009-03-17 03:50:35 +00:00
rnoland
9993b42fe9 Add list_for_each_prev to our linux compatibility. 
We need this for nouveau

MFC after:	3 days
 2009-03-17 03:49:24 +00:00
rnoland
209dd0d752 Minor code cleanup 
MFC after:	3 days
 2009-03-17 03:46:37 +00:00
rnoland
437af23ffa We can have more than 3 pci resources 
MFC after:	3 days
 2009-03-17 03:44:36 +00:00
rnoland
12867b8e80 Cast register maps and offsets to vm_offset_t 
MFC after:	3 days
 2009-03-17 03:39:09 +00:00
rnoland
f718488412 Change the logic around to match ati_pcigart. 
MFC after:	3 days
 2009-03-17 03:36:24 +00:00
rnoland
a1322394c1 Use flsl() here rather than ffsl() 
I discovered that we were computing page_order differently than linux.

MFC after:	3 days
 2009-03-17 03:32:12 +00:00
rnoland
8e5cd6f1a0 Use the right MSI_REARM for RS600. 
MFC after:	3 days
 2009-03-16 19:09:59 +00:00
rnoland
6822cdf607 Get rid of any remaining PZERO flags in mtx_sleep() 
Also, clean up some ifdef mess while I'm here.

MFC after:	3 days
 2009-03-16 08:19:11 +00:00
rnoland
b65366a14a Fix R600 writeback across suspend/resume. 
This is likely a NOOP for us, since I haven't ported the suspend/resume
code yet.

MFC after:	3 days
 2009-03-16 08:15:35 +00:00
rnoland
084103fa7c Consistently use kdev for the kernel device. 
Submitted by:	vehemens <vehemens@verizon.net>
MFC after:	3 days
 2009-03-09 07:55:18 +00:00
rnoland
7d9d797109 Clean up the printing on amd64. Should also be consistent on i386. 
MFC after:	3 days
 2009-03-09 07:50:27 +00:00
rnoland
684aefd788 There is no need to sync these buffers to swap. 
MFC after:	3 days
 2009-03-09 07:49:13 +00:00
rnoland
10f014e6a9 Change the flags to bus_dmamem around to allow it to sleep waiting for 
resources during allocation, but not during map load.  Also, zero the
buffers here.

MFC after:	3 days
 2009-03-09 07:47:03 +00:00
rnoland
e227ee6ba8 Fix the flags to bus_dmamem_* to allow the allocation to sleep while 
waiting for resources.  It is really the load that we can't defer.
BUS_DMA_NOCACHE belongs on bus_dmamap_load() as well.

MFC after:	3 days
 2009-03-09 07:38:22 +00:00
rnoland
d19cf7a6d0 -Make the PCI(E)/AGP calculations consistent 
-Calculate the scratch address correctly

MFC after:	10 days
 2009-03-09 07:33:35 +00:00
rnoland
a7840d9936 Call the right function for the right chipset. 
MFC after:	10 days
 2009-03-09 07:24:32 +00:00
rnoland
67b6c21b74 Import support for ATI Radeon R600 and R700 series chips. 
Tested on an HD3850 (RV670) on loan from Warren Block.

Currently, you need one of the following for this to be useful:

	x11-drivers/xf86-video-radeonhd-devel (not tested)
	xf86-video-ati from git (EXA works, xv is too fast)
	xf86-video-radeonhd from git (EXA works, xv works)

There is no 3d support available from dri just yet.

MFC after:	2 weeks
 2009-03-07 21:36:57 +00:00
rnoland
ddd5c68e84 Initialize the vblank structures at load time. Previously we did this 
at irq install/uninstall time, but when we vt switch, we uninstall the
irq handler.  When the irq handler is reinstalled, the modeset ioctl
happens first.  The modeset ioctl is supposed to tell us that we can
disable vblank interrupts if there are no active consumers.  This will
fail after a vt switch until another modeset ioctl is called via dpms
or xrandr.  Leading to cases where either interrupts are on and can't
be disabled, or worse, no interrupts at all.

MFC after:	2 weeks
 2009-02-28 02:37:55 +00:00