Commit Graph

148 Commits

Author SHA1 Message Date
cognet
3358c90219 There's no need to include <machine/asmacros.h> here. 2005-11-08 13:01:29 +00:00
cognet
37615e7c34 MFi386 rev 1.536 (sort of)
Move what can be moved (UMA zones creation, pv_entry_* initialization) from
pmap_init2() to pmap_init().
Create a new function, pmap_postinit(), called from cpu_startup(), to do the
L1 tables allocation.
pmap_init2() is now empty for arm as well.
2005-11-06 16:10:28 +00:00
jhb
ebae8f6ee4 Whitespace. 2005-10-14 18:36:49 +00:00
jhb
2a9f465c22 Change the userland atomic operations on arm to use memory operands for
the modified memory rather than using register operands that held a pointer
to the memory.  The biggest effect is that we now correctly tell the
compiler that these functions change the memory that these functions
modify.

Reviewed by:	cognet
2005-10-14 18:07:45 +00:00
cognet
6d1f0bd555 dump_avail has nothing to do with ARM_USE_SMALL_ALLOC, so move its
declaration out of the #ifdef.
2005-10-04 16:29:31 +00:00
cognet
5e32ed69e9 Provide a dump_avail[] variable, which contains the page ranges to be
dumped.

For iq31244_machdep.c, attempt to recognize hints provided by the elf
trampoline.
2005-10-03 14:15:50 +00:00
cognet
4cd1fe1a59 Add a new API to let platform-specific ports provide functions for big
copy/zeroing.
2005-10-03 14:12:10 +00:00
cognet
89d66c6bc0 asm versions of in_cksum_hdr() and in_pseudo(). 2005-10-03 14:06:44 +00:00
jhb
89caa56972 Add a new atomic_fetchadd() primitive that atomically adds a value to a
variable and returns the previous value of the variable.

Tested on:	i386, alpha, sparc64, arm (cognet)
Reviewed by:	arch@
Submitted by:	cognet (arm)
MFC after:	1 week
2005-09-27 17:39:11 +00:00
stefanf
78a1b1beb4 Move MINSIGSTKSZ from <machine/signal.h> to <machine/_limits.h> and rename
it to __MINSIGSTKSZ.  Define MINSIGSTKSZ in <sys/signal.h>.

This is done in order to use MINSIGSTKSZ for the macro PTHREAD_STACK_MIN
in <pthread.h> (soon <limits.h>) without having to include the whole
<sys/signal.h> header.

Discussed with:		bde
2005-08-20 16:44:41 +00:00
imp
52bcb6f38c msdosfs_conv.c references cmos_wall_clock and adjkerntz. Since these
are 0 for arm, define them as such to make msdosfs_conv.c compile
again on arm.
2005-07-27 21:19:28 +00:00
jhb
b8779c810b Add extra constraints to tell the compiler that the memory be modified
in the arm __swp() and sparc64 casa() and casax() functions is actually
being used as an input and output and not just the value of the register
that points to the memory location.  This was the underlying source of
the mbuf refcount problems on sparc64 a while back.  For arm this should be
a nop because __swp() has a constraint to clobber all memory which can
probably be removed now.

Reviewed by:	alc, cognet
MFC after:	1 week
2005-07-27 20:01:45 +00:00
jhb
75a402d1cc Use a + constraint modifier for a register arg in __bswap16_var().
Reviewed by:	cognet
2005-07-27 19:59:21 +00:00
jhb
c7383aebd6 Convert the atomic_ptr() operations over to operating on uintptr_t
variables rather than void * variables.  This makes it easier and simpler
to get asm constraints and volatile keywords correct.

MFC after:	3 days
Tested on:	i386, alpha, sparc64
Compiled on:	ia64, powerpc, amd64
Kernel toolchain busted on:	arm
2005-07-15 18:17:59 +00:00
jhb
4e2603348a Fix a typo.
Approved by:	re (scottl)
2005-06-23 21:54:17 +00:00
jkoshy
1d3209ab83 MFP4:
- Implement sampling modes and logging support in hwpmc(4).

- Separate MI and MD parts of hwpmc(4) and allow sharing of
  PMC implementations across different architectures.
  Add support for P4 (EMT64) style PMCs to the amd64 code.

- New pmcstat(8) options: -E (exit time counts) -W (counts
  every context switch), -R (print log file).

- pmc(3) API changes, improve our ability to keep ABI compatibility
  in the future.  Add more 'alias' names for commonly used events.

- bug fixes & documentation.
2005-06-09 19:45:09 +00:00
cognet
cbb8d627a3 - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32
interrupts.
- Implement teardown methods where appropriate.
2005-06-09 12:26:20 +00:00
cognet
ee6e2d90e2 Add a new arm-specific option, ARM_USE_SMALL_ALLOC. If defined, it provides
an implementation of uma_small_alloc() which tries to preallocate memory
1MB per 1MB, and maps it into a section mapping.
2005-06-07 23:04:24 +00:00
cognet
70eb7340ea Bring in bits I forgot while importing write back support for arm9. 2005-06-03 19:49:53 +00:00
nyan
0fce92f5c4 Remove bus_{mem,p}io.h and related code for a micro-optimization on i386
and amd64.  The optimization is a trivial on recent machines.

Reviewed by:	-arch (imp, marcel, dfr)
2005-05-29 04:42:30 +00:00
cognet
be7058be25 s/_KLD_MODULE/KLD_MODULE/ 2005-05-26 16:05:22 +00:00
cognet
3aa321bbac Remove bits specific to CPUs we won't support (< armv4). 2005-05-25 13:46:32 +00:00
cognet
f58c9faa71 Use asm versions of in_cksum() and friends. 2005-05-24 21:44:34 +00:00
cognet
6f02d3277d Asm version of bswap16().
Obtained from: 	NetBSD
2005-05-24 21:43:16 +00:00
cognet
7001627d7d Make sure we clean the RAS start address once we're done.
This fixes the random segfaults which occurs at high interrupts rate.
2005-05-24 21:42:31 +00:00
marcel
4dd49b3b66 Add empty header (except of the multiple-inclusion protection) to
get hwpmc(4) to compile on this platform.
2005-04-20 18:44:53 +00:00
imp
b1662f9d0f Break out the definition of bus_space_{tag,handle}_t and a few other types
into _bus.h to help with name space polution from including all of bus.h.
In a few days, I'll commit changes to the MI code to take advantage of thse
sepration (after I've made sure that these changes don't break anything in
the main tree, I've tested in my trees, but you never know...).

Suggested by: bde (in 2002 or 2003 I think)
Reviewed in principle by: jhb
2005-04-18 21:45:34 +00:00
cognet
64c6be3ab3 Import a basic implementation of the restartable atomic sequences to provide
atomic operations to userland (this is OK for UP only, but SMP is still so
far away).
2005-04-07 22:03:04 +00:00
cognet
0eff5864a9 - Try harder to report dirty page.
- Garbage-collect pmap_update(), it became quite useless.
2005-04-07 22:01:53 +00:00
jhb
41cadaa11e Divorce critical sections from spinlocks. Critical sections as denoted by
critical_enter() and critical_exit() are now solely a mechanism for
deferring kernel preemptions.  They no longer have any affect on
interrupts.  This means that standalone critical sections are now very
cheap as they are simply unlocked integer increments and decrements for the
common case.

Spin mutexes now use a separate KPI implemented in MD code: spinlock_enter()
and spinlock_exit().  This KPI is responsible for providing whatever MD
guarantees are needed to ensure that a thread holding a spin lock won't
be preempted by any other code that will try to lock the same lock.  For
now all archs continue to block interrupts in a "spinlock section" as they
did formerly in all critical sections.  Note that I've also taken this
opportunity to push a few things into MD code rather than MI.  For example,
critical_fork_exit() no longer exists.  Instead, MD code ensures that new
threads have the correct state when they are created.  Also, we no longer
try to fixup the idlethreads for APs in MI code.  Instead, each arch sets
the initial curthread and adjusts the state of the idle thread it borrows
in order to perform the initial context switch.

This change is largely a big NOP, but the cleaner separation it provides
will allow for more efficient alternative locking schemes in other parts
of the kernel (bare critical sections rather than per-CPU spin mutexes
for per-CPU data for example).

Reviewed by:	grehan, cognet, arch@, others
Tested on:	i386, alpha, sparc64, powerpc, arm, possibly more
2005-04-04 21:53:56 +00:00
cognet
f6962ae479 Bring in a version of float.h more correct for softfloat. 2005-03-20 00:34:24 +00:00
scottl
7be505a035 Refactor the bus_dma header files so that the interface is described in
sys/bus_dma.h instead of being copied in every single arch.  This slightly
reorders a flag that was specific to AXP and thus changes the ABI there.
The interface still relies on bus_space definitions found in <machine/bus.h>
so it cannot be included on its own yet, but that will be fixed at a later
date.  Add an MD <machine/bus_dma.h> for ever arch for consistency and to
allow for future MD augmentation of the API.  sparc64 makes heavy use of
this right now due to its different bus_dma implemenation.
2005-03-14 16:46:28 +00:00
joerg
c85a3e95f7 netchild's mega-patch to isolate compiler dependencies into a central
place.

This moves the dependency on GCC's and other compiler's features into
the central sys/cdefs.h file, while the individual source files can
then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to
refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42.

By now, GCC and ICC (the Intel compiler) have been actively tested on
IA32 platforms by netchild.  Extension to other compilers is supposed
to be possible, of course.

Submitted by:	netchild
Reviewed by:	various developers on arch@, some time ago
2005-03-02 21:33:29 +00:00
cognet
43586d701a Instead of using sysarch() to store-retrieve the tp, add a magic address,
ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
line will be allocated and locked for this address, so that it will never go
to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
slower, and is wrong for SMP, but should be fine for UP).
The tp is still stored in the mdthread struct, and at each context switch,
ARM_TP_ADDRESS gets updated.

Suggested by:   davidxu
2005-02-26 18:59:01 +00:00
cognet
ea8a18c379 Add the field in the md part of the struct thread required by ARM_[GET|SET]_TP. 2005-02-26 00:02:14 +00:00
cognet
3aab487108 Implement two new sysarch for arm, ARM_GET_TP and ARM_SET_TP, to work around
the lack of tls on arm.
2005-02-25 22:56:16 +00:00
ru
6cc6926066 Use a common multi-inclusion protection, and add such a
protection to alpha/include/exec.h.
2005-02-19 21:16:48 +00:00
cognet
19a07769b7 Define NIRQ to 64 for CPU_ARM9, because Cirrus Logic EP93XX cores provides
64 irqs.
This should be re-thought later.
2005-02-13 18:26:31 +00:00
njl
2579b2e0bf Sort functions. 2005-02-01 06:36:27 +00:00
cognet
ab7ed627f8 Start to support the big endian case as well. 2005-01-18 15:51:50 +00:00
cognet
897fdcefd3 Add the prototype for bus_dmamap_load_mbuf_sg().
Spotted out by:	scottl
2005-01-15 19:31:08 +00:00
cognet
14d3ee495d Add support for ptrace() and gdb breakpoints. 2005-01-10 22:43:16 +00:00
imp
77267e277f Start all license statements with /*- 2005-01-05 21:58:49 +00:00
cognet
5b61dc111e Make sure gcc doesn't generate something such as swp r3, r4, [r3] for __swp,
as it has unpredictable results.
2004-12-18 17:43:01 +00:00
cognet
8c5a104a40 Remove an unused field from the struct pv_entry.
While I'm there, fix style.
2004-12-05 22:46:30 +00:00
cognet
22b168ab24 Implement breakpoints and single stepping on arm.
Obtained from:	NetBSD
2004-11-21 18:11:39 +00:00
cognet
75354c7e52 Implement enough to be able to enter and leave DDB. 2004-11-20 16:52:10 +00:00
cognet
c2bbd5fdeb Get the kernel stack right now that the u-area is gone. 2004-11-20 16:51:32 +00:00
das
dbdcb7be99 Remove UAREA_PAGES and USPACE definitions. The definitions of
USPACE_SVC_STACK_TOP, USPACE_SVC_STACK_BOTTOM, USPACE_UNDEF_STACK_TOP,
and USPACE_UNDEF_STACK_BOTTOM look wrong to me, so I'm leaving them
alone.

Reviewed by:	arch@
2004-11-20 02:31:37 +00:00
cognet
601293a498 Import a RET macro, that will use bx if the arch supports it.
Obtained from:	NetBSD
2004-11-09 16:45:55 +00:00