"Method of Reporting Informational Exceptions") in the SCSI mode database.
T10/04-371 revision 2 (revision 4; page 2, table 1) describes it as a
bit-field of 4 bits wide.
1. http://www.t10.org/ftp/t10/document.04/04-371r2.pdf
This a recommit of head@r289913 to fix the original commit message, in
particular:
- I incorrectly claimed that unit change was 'i' -> 't'.
- The spec I reference in this commit is 2 decades newer than the one noted in
r289913. The fields in the SCSI mode database are more complete in the newer
spec, so it'll be easier for someone to decipher this commit if need be
later.
- I screwed up the bug entry in the previous commit message
Pointyhat to: ngie (for botching up r289913)
PR: 200619
Reported by: Michael Baptist
Submitted by: Lars Skodje
Sponsored by: EMC / Isilon Storage Divisionf
"Method of Reporting Informational Exceptions") in the SCSI mode database as
the field described in X3T10/94-190 (revision 4; page 2, table 1) [1.] is
4 bits wide, not 4 bytes wide
1. http://ftp.t10.org/ftp/t10/document.94/94-190r4.pdf
Bug 200619
MFC after: 1 week
Reported by: Michael Baptist <mbaptist@isilon.com>
Submitted by: Lars Skodje <lskodje@isilon.com>
Sponsored by: EMC / Isilon Storage Division
We need to reset the chancmp and chainaddr MMIO registers to bring the
device back to a working state.
Name the chanerr bits while we're here.
Sponsored by: EMC / Isilon Storage Division
We only need to borrow a mutex for the drain sleep and the 0->1
transition, so just reuse an existing one for now.
The wchan is arbitrary. Using refcount itself would have required
__DEVOLATILE(), so use the lock's address instead.
Different uses are tagged by kind, although we only do anything with
that information in INVARIANTS builds.
Sponsored by: EMC / Isilon Storage Division
Callers should have acquired this lock when they invoked ioat_acquire()
before issuing operations. Assert it is held.
Sponsored by: EMC / Isilon Storage Division
This is still the worst possible way to allocate memory if it will ever
be under pressure, but at least it won't deadlock.
Suggested by: WITNESS
Sponsored by: EMC / Isilon Storage Division
Pull out the timer callout delay into IOAT_INTR_TIMO and shorten it
considerably (5s -> 100ms). Single operations do not take 5-10 seconds
and when interrupts aren't working, waiting 100ms sucks a lot less than
5s.
Sponsored by: EMC / Isilon Storage Division
device nodes
In particular, use st_rdev (the device type), not st_dev (the device inode),
and fix the comparison to be correct with the st_rdev field
Bug 203648
MFC after: 2 weeks
Submitted by: Thomas Schmitt <scdbackup@gmx.net>
Coverity CID: 1008927
Sponsored by: EMC / Isilon Storage Division
I couldn't test arge0->arge1 bridging, only arge0 VLAN bridging.
The DIR-825C1 only hooks up arge0 to the switch GMAC0 and so
you need to abuse VLANs to test.
Tested:
* DIR-825C1 (AR9344)
General changes:
- Parameterize out the mount command.
- Use mtree to verify the contents of an image (check_image_contents) instead
of using diff (diff verifies content, but not file metadata).
- Move common logic out to functions (common_cleanup, mount_image,
check_image_contents)
- Add stub testcases for makefs -D (crashes with SIGBUS, similar to bug # 192839)
- Add a note about the ISO-9660 and rockridge specs
- Add testcases that exercise:
-- Creating disk images from an mtree and multiple directories.
-- -F flag use (not really an extensive testcase right now)
cd9660-specific test changes:
- Remove an XXX comment about symlinks; I forgot that non-rockridge images turn
symlinks into hardlinks.
- Add testcases that exercise:
-- -o allow-deep-trees
-- -o allow-max-name stub testcase (doesn't seem to be implemented in makefs)
-- -o preparer (existence in image; not conformance to spec)
-- -o publisher (existence in image; not conformance to spec)
-- -o rockridge (basic)
MFC after: 2 weeks
Sponsored by: EMC / Isilon Storage Division
the temporary file to vers.c at the end of the script
The previous logic wrote out to vers.c multiple times, so the file
could be incorrectly interpreted as being completely written out
after one of the echo calls with recursive make, when in reality it
was only partially written.
Also, in the event the build was interrupted when creating vers.c
(small race window), it would have a leftover file that needed to
be cleaned up before resuming the build.
MFC after: 3 weeks
Sponsored by: EMC / Isilon Storage Division
pager. It is enough to execute VOP_BMAP() once to obtain both the
disk block address for the requested page, and the before/after limits
for the contiguous run. The clipping of the vm_page_t array passed to
the vnode_pager_generic_getpages() and the disk address for the first
page in the clipped array can be deduced from the call results.
While there, remove some noise (like if (1) {...}) and adjust nearby
code.
Reviewed by: alc
Discussed with: glebius
Tested by: pho
Sponsored by: The FreeBSD Foundation
MFC after: 3 weeks
ordered with the MFENCE instruction. Similar weak guarantees are also
specified by the AMD APM vol. 3 rev. 3.22. x86 pmap methods
pmap_invalidate_cache_range() and pmap_invalidate_cache_pages() braced
CLFLUSH loop with MFENCE both before and after the loop.
In the revision 56 of SDM, Intel stated that all existing
implementations of CLFLUSH are strict, CLFLUSH instructions execution
is ordered WRT other CLFLUSH and writes. Also, the strict behaviour
is made architectural.
A new instruction CLFLUSHOPT (which was documented for some time in
the Instruction Set Extensions Programming Reference) provides the
weak behaviour which was previously attributed to CLFLUSH.
Use CLFLUSHOPT when available. When CLFLUSH is used on Intel CPUs, do
not execute MFENCE before and after the flushing loop.
Reviewed by: alc
Sponsored by: The FreeBSD Foundation
is a dcache invalidate to point of coherency just like dcache_inv_poc(), but
a slightly different version specific to dma operations. Elaborate the
comment about how and why it's different.
Now 24xx and above chips support full 8-byte LUN address space.
Older FC chips may support up to 16K LUNs when firmware allows.
Tested in both initiator and target modes for 23xx, 24xx and 25xx.
Before both 0 and sys_nsig would be successfully returned by parse_signal()
although being invalid signal numbers.
PR: Alexandre Perrin <alex@kaworu.ch>
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D3990
This is because the previous version was very obscure about the fact
that despite having Clang "on by default" for architectures such as powerpc, it
does not actually build due to the GCC it uses not having C++11 support.
Using an external compiler that supports C++11 does allow this to work.
This whole block should be rethought more given "on by default" is not
really default without extra work which could actually be surprising for
why Clang is showing up when using a newer GCC.
Sponsored by: EMC / Isilon Storage Division
'buildconfig' is connected to 'all', but 'installconfig' is only called
manually. There is not much need to conditionalize this file right
now due to how it is hooked up and its impact on various build phases.
Sponsored by: EMC / Isilon Storage Division
per-map. The per-tag scheme is not safe, and a mutex can't be used to
protect it because the mapping routines can't sleep. Code brought in
from armv6 implementation.
