Remove custom DTS duplicate of tda19988 node and use upstream-provided
one introduced by r295436. This duplication created two tdaX devices
which confused fb driver into using only 640x480 area while setting
display to native resolution.
Reported by: Michael Smith
MFC after: 3 days
Armada38x is already supported in the tree.
This commit adds support for DB-AP board.
File was taken from Linux v4.8 and accustomed to FreeBSD
in minimal possible way.
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D7327
ClearFog is equipped with Marvell Armada 388 SoC, which is already
supported in FreeBSD.
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D7326
Hardware buffer management entries are not used yet by FreeBSD.
They were added for compliance with Linux Armada 38x device tree
representation and will be used in future network support.
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D8179
The micro-Firewall DTS is now a single BSD licensed file.
Reported by: manu
Obtained from: pfSense
MFC after: 2 weeks
Sponsored by: Rubicon Communications, LLC (Netgate)
UEXT are Universal EXTension connector from Olimex. They embed i2c, spi
and uart pins along power in one connector and are found on most,
if not all, Olimex boards.
The Olimex A20 SOM EVB have two UEXT connector so enable the nodes found on
those two connectors.
Patch has been applied upstream, in the meantime add the nodes to our custom
DTS.
Remove empty wrapper for sys/gnu version of am335x-evm.dts located in
sys/boot/fdt, with current include paths priority it's recursive #include
and current build system can find file in sys/gnu when generating dtb
Reported by: Jared McNeill
Linux has a slightly different device tree definition for DPAA than originally
done in the FreeBSD driver. This changes the driver to be mostly compatible
with the Linux device tree definitions. Currently the differences are:
bman-portals: compatible = "fsl,bman-portals" (Linux is "simple-bus")
qman-portals: compatible = "fsl,qman-portals" (Linux is "simple-bus")
fman: compatible = "fsl,fman" (Linux is "simple-bus")
The Linux device tree doesn't specify anything for rgmii in the mdio. This
change still requires the device tree to specify the phy-handle, and doesn't yet
support tbi.
The exported functions will be used by
Alpine Ethernet driver.
Obtained from: Semihalf
Submitted by: Michal Stanek <mst@semihalf.com>
Sponsored by: Annapurna Labs
Reviewed by: wma
Differential Revision: https://reviews.freebsd.org/D7763
This patch adds support for MSI-X interrupts
on Annapurna Alpine platform. MSI-X on Alpine
work similarly to GICv2m, i.e. some range of
SPI interrupts is reserved in GIC and individual
SPIs can be triggered by MSI-X messages.
This SPI range is defined in FDT.
Obtained from: Semihalf
Submitted by: Michal Stanek <mst@semihalf.com>
Sponsored by: Annapurna Labs
Reviewed by: nwhitehorn, wma
Differential Revision: https://reviews.freebsd.org/D7579
Technically touchscreen chip is FT5406 but all hardware
communication is performed by VideCore and only final results
are presented to ARM part through memory region shared between
VC and ARM.
evdev is used as userland interface. FT5406 supports up to
10 touchpoints, but for now driver emulates single touch device
because I do not have GUI bits to test this functionality.
Driver is not enabled in default config for RPI and RPI2
Tested with: evdev-dump, tslib
This commit adds drivers for Alpine Cache Coherency Unit
and North Bridge Service whose task is to configure
the system fabric and enable cache coherency.
Obtained from: Semihalf
Submitted by: Michal Stanek <mst@semihalf.com>
Sponsored by: Annapurna Labs
Reviewed by: wma
Differential Revision: https://reviews.freebsd.org/D7565
RISC-V cpu implementations.
o Update RocketChip device tree source (DTS).
We now support latest verison of RocketChip synthesized on
Xilinx FPGA (Zedboard).
RocketChip is an implementation of RISC-V processor written on
Chisel hardware construction language.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
strings provided by user/config files. This update is replacing sprintf with
snprintf for cases the command_errbuf is built from dynamic content.
PR: 211958
Reported by: ecturt@gmail.com
Reviewed by: imp, allanjude
Approved by: imp (mentor), allanjude (mentor)
Differential Revision: https://reviews.freebsd.org/D7563
The only difference between 3 and 3B is the size of the RJ45 port.
And now we have a uboot port that expect pcduino3.dts to be present.
Reported by: imp
Machine privilege level was specially designed to use in vendor's
firmware or bootloader. We have implemented operation in machine
mode in FreeBSD as part of understanding RISC-V ISA, but it is time
to remove it.
We now use BBL (Berkeley Boot Loader) -- standard RISC-V firmware,
which provides operation in machine mode for us.
We now use standard SBI calls to machine mode, instead of handmade
'syscalls'.
o Remove HTIF bus.
HTIF bus is now legacy and no longer exists in RISC-V specification.
HTIF code still exists in Spike simulator, but BBL do not provide
raw interface to it.
Memory disk is only choice for now to have multiuser booted in Spike,
until Spike has implemented more devices (e.g. Virtio, etc).
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
On Zynq 256K-512K memory region is not accessible by all bus masters.
EHCI driver fails when trying to use it for DMA transfers. Patching
memory node does not help because ubldr overrides values there with
the ones obtained from u-boot. So as a workaround we just mark first
512K as reserved.
PR: 211484
Submitted by: Thomas Skibo <thoma555-bsd@yahoo.com>
MFC after: 3 days
Summary:
This driver supports the following methods to trigger gathering random bits from the hardware:
1. interrupt when the FIFO is full (default) fed into the harvest queue
2. callout (when BCM2835_RNG_USE_CALLOUT is defined) every second if hz is less than 100, otherwise hz / 100, feeding the random bits into the harvest queue
If the kernel is booted with verbose enabled, the contents of the registers will be dumped after the RBG is started during the attach routine.
Author: hackagadget_gmail.com (Stephen J. Kiernan)
Test Plan: Built RPI2 kernel and booted on board. Tested the different methods to feed the harvest queue (callout, interrupt) and the interrupt driven approach seems best. However, keeping the other method for people to be able to experiment with.
Reviewed By: adrian, delphij, markm
Differential Revision: https://reviews.freebsd.org/D6888
TDMA and CESA registers are placed in different ranges of memory. Split
memory resource in DTS to reflect that. This change is needed to support
multiple CESA nodes as otherwise the ranges of different nodes would
overlap.
In consequence, CESA_WRITE and CESA_READ macros have been split depending
on which range of registers is accessed. Offsets for CESA registers have
been modified as the base address has changed.
Submitted by: Michal Stanek <mst@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D6217
