Intel 40G Ethernet Controller XL710 Family. This is
the core driver, a VF driver called i40evf, will be
following soon. Questions or comments to myself or
my co-developer Eric Joyner. Cheers!
- Implement support for interrupt filters in the DWC OTG driver, to
reduce the amount of CPU task switching when only feeding the FIFOs.
- Add common spinlock to the USB bus structure.
MFC after: 2 weeks
platform code, it is expected these will be merged in the future when the
ARM code is more complete.
Until more boards can be tested only use this with the Raspberry Pi and
rrename the functions on the other SoCs.
Reviewed by: ian@
it doesn't leak through when the command structure is reused for a user
command without a data buffer.
PR: amd64/189668
Tested by: Pete Long <pete@nrth.org>
MFC after: 1 week
Previously only TX IP checksum offloading was disabled but it's
reported that TX checksum offloading for UDP datagrams with IP
options also generates corrupted frames. Reporter's controller is
RTL8168CP but I guess RTL8168C also have the same issue since it
shall share the same core.
Reported and tested by: tuexen
the main processing queue, clear the NAK counter for any associated
BULK or CONTROL transfers and poll the endpoint(s) for 1 millisecond
at 125us rate interval, before going into slow, 10ms, NAK polling mode
again. This has the effect that typical ping-ping protocols respond
quicker when initiated from the USB host.
MFC after: 2 weeks
The last obstacle to switching PowerPC entirely to vt is that the Playstation 3
framebuffer driver needs to be ported over. This only applies for powerpc64,
however.
on my G4 iBook by more than half. Still 10% slower than syscons, but that's
much better than a factor of 2.
The slowness had to do with pathological write performance on 8-bit
framebuffers, which are almost universally used on Open Firmware systems.
Writing 1 byte at a time, potentially nonconsecutively, resulted in many
extra PCI write cycles. This patch, in the common case where it's writing
one or several characters in an 8x8 font, gangs the writes together into
a set of 32-bit writes. This is a port of r143830 to vt(4).
The EFI framebuffer is also extremely slow, probably for the same reason,
and the same patch will likely help there.
This driver supports the low and high precision models (9 and 11 bits) and
it will auto-detect the both variants.
The driver expose the temperature registers (actual temperature, shutdown
and hysteresys temperature) and also the configuration register.
It was tested on FDT systems: RPi, BBB and on non-FDT systems: AR71xx, with
both, hardware i2c controllers (when available) and gpioiic(4).
This provides a simple and cheap way for verifying the i2c bus on embedded
systems.
- For non-periodic traffic we only need to wait two SOFs before
disabling the channel.
- Make sure we release the TX FIFO tracking level after the host
channel is disabled.
- Make sure the host channel state gets reset/disabled initially.
- Two minor code style changes.
MFC after: 2 weeks
- Rework how we allocate and free USB host channels, so that we only
allocate a channel if there is a real packet going out on the USB
cable.
- Use BULK type for control data and status, due to instabilities in
the HW it appears.
- Split FIFO TX levels into one for the periodic FIFO and one for the
non-periodic FIFO.
- Use correct HFNUM mask when scheduling host transactions. The HFNUM
register does not count the full 16-bit range.
- Correct START/COMPLETION slot for TT transactions. For INTERRUPT and
ISOCHRONOUS type transactions the hardware always respects the ODDFRM
bit, which means we need to allocate multiple host channels when
processing such endpoints, to not miss any so-called complete split
opportunities.
- When doing ISOCHRONOUS OUT transfers through a TT send all data
payload in a single ALL-burst. This deacreases the likelyhood for
isochronous data underruns.
- Fixed unbalanced unlock in case of "dwc_otg_init_fifo()" failure.
- Increase interrupt priority.
MFC after: 2 weeks
have implemented the PIM_NOSCAN rescan functionality will have it
enabled.
This is a no-op for head.
Reviewed by: slm
Sponsored by: Spectra Logic Corporation
MFC after: 3 days
TLR is necessary for reliable communication with SAS tape drives.
This was broken by change 246713 in the mps(4) driver. It changed the
cm_data field for SCSI I/O requests to point to the CCB instead of the data
buffer. So, instead, look at the CCB's data pointer to determine whether
or not we're talking to a tape drive.
Also, take the residual into account to make sure that we don't go off the
end of the request.
MFC after: 3 days
Sponsored by: Spectra Logic Corporation
cards. LSI has been maintaining this driver outside of the FreeBSD
tree. It overlaps support of ThunderBolt and Invader cards that mfi(4)
supports. By default mfi(4) will attach to cards. If the tunable:
hw.mfi.mrsas_enable=1
is set then mfi(4) will not probe and attach to these newer cards and
allow mrsas(4) to attach. So by default this driver will not effect
a FreeBSD system unless mfi(4) is removed from the kernel or the
tunable is enabled.
mrsas(4) attaches disks to the CAM layer so it depends on CAM and devices
show up as /dev/daX. mfiutil(8) does not work with mrsas. The FreeBSD
version of MegaCli and StorCli from LSI do work with mrsas. It appears
that StorCli only works with mrsas. MegaCli appears to work with mfi(4)
and mrsas(4).
It would be good to add mfiutil(4) support to mrsas, emulations modes,
kernel logging, device aliases to ease the transition between mfi(4)
and mrsas(4).
Style issues should be resolved by LSI when they get committers approved.
The plan is get this driver in FreeBSD 9.3 to improve HW support.
Thanks to LSI for developing, testing and working with FreeBSD to
make this driver co-exist in FreeBSD. This improves the overall
support of MegaRAID SAS.
Submitted by: Kashyap Desai <Kashyap.Desai@lsi.com>
Reviewed by: scottl
MFC after: 3 days
Sponsored by: LSI
