DTS files switch from clocks under /clocks to a ccu (Clock Controller Unit)
a while ago.
Restore A13 functionality by adding a clock driver for it.
Almost every clocks are handled, the missing ones are mostly video related
clocks.
Tested On: A13 Olinuxino
The elf_trampoline.c is not connected to build for ARMv6/v7 for long time and
it uses outdated low level cpu functions.
This blocks forthcoming cleanup of ARM code.
MFC after: 3 weeks
Under certain traffic pattern awg driver does not recover from TX queue
full condition. The actual source of the problem is not identified yet
but jmcneill@ agreed that bumping TX_MAX_SEGS to 20 is OK as a workaround
for the problem (NetBSD has it set to 128).
Also add some diagnostic printfs to prevent silent failure of bus_dma
functions in the future
PR will be kept open until root cause of the issue is identified and fixed
PR: 219927
Submitted by: Tom Vijlbrief <tvijlbrief@gmail.com>
Approved by: jmcneill
MFC after: 2 weeks
emulation in fast path of data/prefetch abort common routine. Process
these bits only if related page table entries are consistent with
provided abort info. In case of inconsistency, do nothing and let
processor to signal new abort if still needed.
The mapping related to an abort may be a subject of change concurrently.
The situation is more evident on multicore machines. Mapping may be
removed on one core while being used on another one before TLB flush
happened. Memory swapping process may be an example. Or, two or more
aborts may be signaled for the same page on more cores concurrently.
While an abort on one core may cause a promotion of related mapping,
an abort on another core may be inconsistent then as related mapping
was promoted. A question is how much real the issue may be on single
core machine. However, it's better to play safe even for these machines.
This change may solve some "PT2MAP abort" panics reported rarely.
The revision of pmap_fault() was initiated thanks to stack backtrace
provided by Bob Prohaska (fbsd at www.zefox.net).
While here, INVARIANTS block was changed. The previous check had iffy
value as only one entry from many was checked from L2 page table.
Reviewed by: mmel
MFC after: 3 weeks
- allocate value for new AT_HWCAP2 auxiliary vector on all platforms.
- expand 'struct sysentvec' by new 'u_long *sv_hwcap2', in exactly
same way as for AT_HWCAP.
MFC after: 1 month
Reviewed by: kib
Differential Revision: https://reviews.freebsd.org/D12699
HEAD. Enable VIMAGE in GENERIC kernels and some others (where GENERIC does
not exist) on HEAD.
Disable building LINT-VIMAGE with VIMAGE being default.
This should give it a lot more exposure in the run-up to 12 to help
us evaluate whether to keep it on by default or not.
We are also hoping to get better performance testing.
The feature can be disabled using nooptions.
Requested by: many
Reviewed by: kristof, emaste, hiren
X-MFC after: never
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D12639
All of the kernel dump implementations keep track of the current offset
("dumplo") within the dump device. However, except for textdumps, they
all write the dump sequentially, so we can reduce code duplication by
having the MI code keep track of the current offset. The new
dump_append() API can be used to write at the current offset.
This is needed to implement support for kernel dump compression in the
MI kernel dump code.
Also simplify dump_encrypted_write() somewhat: use dump_write() instead
of duplicating its bounds checks, and get rid of the redundant offset
tracking.
Reviewed by: cem
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D11722
It doesn't seems to be needed anymore and this make ehci working again
on the Pine64.
Thanks to jmcneill@ for the help.
Tested on: Pine64 (A64), OrangePi One (H3), BananapiM2 (A31s)
With that gone they need to go into GENERIC now.
Makes FreeBSD/arm usable on gem5 by default.
Reviewed by: andrew
Differential Revision: https://reviews.freebsd.org/D12566
attachment of i2c devices needed by hdmi.
The hdmi init also uses an intrhook callback to defer initialization, and if
the hdmi callback runs first, the i2c devices will not yet have registered
their device_t in association with their FDT phandle, which allows cross-
device references on FDT systems.
Now the hdmi deferred init checks for the i2c device registration, and if
it's not complete yet, it registers as an eventhandler watching for newbus
attach events. When the i2c device eventually attaches, the hdmi driver
unregisters from watching further events, and continues with the hdmi init.
Because the function signatures for an intrhook callback and an event
handler callback are the same, a single function is used for both callbacks.
Reported by: Russell Haley <russ.haley@gmail.com>
SUN8I and SUN50I (H3, H5, A83T and A64) have a second clock controller
unit. It controls the clocks for the second gpio controller, the IR
controller etc ...
Support for A83T is not supported.
Tested On: OrangePi One, Pine64
enough processors. This isn't ideal, because one could still compile
MACHINE_ARCH armv6, but with armv7 options enabled. We don't normally
do that, and it's a bit of an edge case so accept the less than ideal
solution here in the absence of something better.
Reported by: strejda@
Sponsored by: Netflix
Transition all boards that support arm cortex CPUs to armv7. This
leaves two armv6 kernels in the tree. RPI-B, which uses the BCM2835
which has a ARM1176 core, and VERSATILEPB, which is a qemu board setup
around the time RPI-B went in. Copy std.armv6 to std.armv7, even
though that duplicates a lot of stuff. More work needs to be done to
sort out the duplication.
Differential Revision: https://reviews.freebsd.org/D12027
ccu_h3.c is also used on ARM64 as it provides clocks for the H5 SoC.
Since ARM64 doesn't have sys/gun/dts/include in it's include path, use
the full name for the sun8i-h3-ccu.h include.
Reported by: andreast
Do not redefines resets and clocks ID which are already in the
dt-bindings include directory. Those files are under dual licenced
under GPL2/MIT so use them directly.
Do not redefines resets and clocks ID which are already in the
dt-bindings include directory. Those files are under dual licenced
under GPL2/MIT so use them directly.
Do not redefines resets and clocks ID which are already in the
dt-bindings include directory. Those files are under dual licence
GPL2/MIT so use them directly.
attachment code for various SOCs and busses. Remove all the static and
should-have-been-static and named-differently instances of it.
This should eliminate the recently-grown build warnings about multiple
definitions when building arm kernels.
The existing ti_pruss driver for the PRUSS Hardware provided by the AM335x
ARM CPU has basic interrupt capabilities. This updated driver provides some
more options:
- Sysctl based configuration for the interrupts (for some examples, see the
test plan in the phabricator review cited below).
- A device file (/dev/pruss0.irqN) for each enabled interrupt. This file
can be read and the device blocks if no irq has happened or returns an
uint64_t timestamp based on nanouptime().
- Each interrupt device file provides kqueue-based event notification,
blocking read(), or select().
Submitted by: Manuel Stuhn <freebsdnewbie@freenet.de>
Differential Revision: https://reviews.freebsd.org/D11959
- Added more compatibility strings to drivers not yet converted
- Added new RPI platform code compatibility string to match the ones used
upstream
- Adapted RPI and RPI2 DTS to match the new platform code compatibility
string
The goal is to use the upstream DTBs as a replacement for our custom one.
This is now possible with these changes.
Additionally, as the RPI firmware automatically chooses the right DTB for
us, this would allow to have one common armv6 kernel for RPI0 and RPI1
(BCM2835-based), and one common armv7 kernel for RPI2 v1.1 (BCM2836-based),
and RPI2 v1.2 / RPI3 (BCM2837-based).
Submitted by: Sylvain Garrigues <sylgar@gmail.com>
Differential Revision: https://reviews.freebsd.org/D12360
common case where it's needed -- a write followed by a read to the same slave.
The i2c controller in this chip only performs complete transfers, it does
not provide control over start/repeat-start/stop operations on the bus.
Thus, we have gotten a full stop/start sequence rather than a repeat-start
when doing a typical i2c slave access of "write address, read data". Some
i2c slave devices require a repeat-start to work correctly.
These changes cause the controller to do a repeat-start by pre-staging the
read parameters in the controller registers immediate after the controller
has latched the values for the initial write operation, but before any
bytes are actually written. With the values pre-staged, when the write
portion of the transfer completes, the state machine in the silicon sees
a new start operation already staged and that causes it to perform a
repeat-start. The key to tricking the buggy hardware into doing this is
to avoid prefilling any output data in the transmit FIFO so that it is
possible to catch the silicon in the state where transmit values are
latched but the transmit isn't completed yet.
Some SoC require a write to a unknown register to work corectly.
This write should be in the pmu region not in the phy ctrl one.
Reported by: Mark Millard (markmi@dsl-only.net)
Merge in the missing devices from the IMX6 and ZEDBOARD kernel configs. The
Freescale sdma device has been renamed to fslsdma to mark it as a platform
specific driver.
Reviewed by: ian
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D11564
This change allows to just call sdhci_start_slot() in SDHCI drivers
and not to think about which stack handles the operation.
As a side effect, this will also fix MMCCAM with sdhci_acpi driver.
Approved by: imp (mentor)
Differential Revision: https://reviews.freebsd.org/D12471
The usbphy node for allwinner have two kind of resources, one for the
phy_ctrl and one per phy. Instead of blindy allocating resources, alloc
the phy_ctrl and pmu ones separately.
Also add a configuration struct for all different phy that hold the difference
between them (number of phys, unknow needed register write etc ...).
While here remove A83T code as upstream and FreeBSD dts don't have
nodes for USB.
This (plus 323640) re-enable OHCI on Pine64 on the bottom USB port.
The top USB port is routed to the OHCI0/EHCI0 which is by default in OTG mode.
While the phy code can handle the re-route to standard OHCI/EHCI we still need
a driver for musb to probe and configure it in host mode.
EHCI is still buggy on Pine64 (hang the board) so do not enable it for now.
Tested On: Bananapi (A20), BananapiM2 (A31S), OrangePi One (H3) Pine64 (A64)
