Commit Graph

1615 Commits

Author SHA1 Message Date
nwhitehorn
c9c7c29042 Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.

Reviewed by:	imp, ian
2014-02-05 14:44:22 +00:00
ian
71d90c04a8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
nwhitehorn
8eeb1ec8b4 Provide a simpler and more standards-compliant simplebus implementation to
get the Routerboard 800 up and running with the vendor device tree. This
does not implement some BERI-specific features (which hopefully won't be
necessary soon), so move the old code to mips/beri, with a higher attach
priority when built, until MIPS interrupt domain support is rearranged.
2014-02-01 17:41:54 +00:00
brooks
6e4dbe1cb6 Remove an unneeded space in the BERI merge. 2014-01-30 20:39:56 +00:00
adrian
ded3d7758a Use the correct bitshift operators for the GPIO definitions.
Submitted by:	Daan Vreeken <Daan@vitsch.nl>
MFC after:	1 week
2014-01-22 08:02:07 +00:00
imp
da5df765d5 Introduce grab and ungrab upcalls. When the kernel desires to grab the
console, it calls the grab functions. These functions should turn off
the RX interrupts, and any others that interfere. This makes mountroot
prompt work again. If there's more generalized need other than
prompting, many of these routines should be expanded to do those new
things.

Reviewed by:	bde (with reservations)
2014-01-19 19:36:11 +00:00
imp
14cf77d37c Remove two redundantly repetitive assignments. 2014-01-16 20:40:02 +00:00
loos
c74f1326f9 Fix the geom mappings for WR1043ND.
The uboot mapping is only 128KiB (0x20000) and not 2MiB (0x200000).

Dynamically adjust kernel and rootfs mappings based on the
geom_uncompress(4) magic.

This makes the built images more reliable by accepting changes on kernel
size transparently and matches the images built with zrouter and
freebsd-wifi-build.

Tested by:	gjb
Approved by:	adrian (mentor)
Obtained from:	Zrouter
2014-01-07 13:09:35 +00:00
nwhitehorn
f06ffda243 Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
  (aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
  non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
  requests to its parent (nexus). This allows x86 FDT devices to allocate
  both memory and IO requests and removes the last notionally MI use of
  fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
  FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
2014-01-05 18:46:58 +00:00
bz
2b1879fd4c Add an FDT DTS and MDROOT kernel configuration for BERI on NetFPGA.
At this point we only support one CPU, the PIC, and a UART console.

Reviewed by:	brooks
Sponsored by:	DARPA, AFRL
MFC after:	5 days
2013-12-12 18:08:31 +00:00
bz
705815f12f Use correct value pointing to previously selected FDT DTB.
Reviewed by:	brooks
Sponsored by:	DARPA, AFRL
MFC after:	1 week
2013-12-12 17:48:33 +00:00
jmallett
28ab9c5705 Add missing includes. 2013-12-10 09:38:18 +00:00
eadler
44c01df173 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
attilio
7ee4e910ce - For kernel compiled only with KDTRACE_HOOKS and not any lock debugging
option, unbreak the lock tracing release semantic by embedding
  calls to LOCKSTAT_PROFILE_RELEASE_LOCK() direclty in the inlined
  version of the releasing functions for mutex, rwlock and sxlock.
  Failing to do so skips the lockstat_probe_func invokation for
  unlocking.
- As part of the LOCKSTAT support is inlined in mutex operation, for
  kernel compiled without lock debugging options, potentially every
  consumer must be compiled including opt_kdtrace.h.
  Fix this by moving KDTRACE_HOOKS into opt_global.h and remove the
  dependency by opt_kdtrace.h for all files, as now only KDTRACE_FRAMES
  is linked there and it is only used as a compile-time stub [0].

[0] immediately shows some new bug as DTRACE-derived support for debug
in sfxge is broken and it was never really tested.  As it was not
including correctly opt_kdtrace.h before it was never enabled so it
was kept broken for a while.  Fix this by using a protection stub,
leaving sfxge driver authors the responsibility for fixing it
appropriately [1].

Sponsored by:	EMC / Isilon storage division
Discussed with:	rstone
[0] Reported by:	rstone
[1] Discussed with:	philip
2013-11-25 07:38:45 +00:00
alc
6c60c88452 As of r257209, all architectures have defined VM_KMEM_SIZE_SCALE. In other
words, every architecture is now auto-sizing the kmem arena.  This revision
changes kmeminit() so that the definition of VM_KMEM_SIZE_SCALE becomes
mandatory and the definition of VM_KMEM_SIZE becomes optional.

Replace or eliminate all existing definitions of VM_KMEM_SIZE.  With
auto-sizing enabled, VM_KMEM_SIZE effectively became an alternate spelling
for VM_KMEM_SIZE_MIN on most architectures.  Use VM_KMEM_SIZE_MIN for
clarity.

Change kmeminit() so that the effect of defining VM_KMEM_SIZE is similar to
that of setting the tunable vm.kmem_size.  Whereas the macros
VM_KMEM_SIZE_{MAX,MIN,SCALE} have had the same effect as the tunables
vm.kmem_size_{max,min,scale}, the effects of VM_KMEM_SIZE and vm.kmem_size
have been distinct.  In particular, whereas VM_KMEM_SIZE was overridden by
VM_KMEM_SIZE_{MAX,MIN,SCALE} and vm.kmem_size_{max,min,scale}, vm.kmem_size
was not.  Remedy this inconsistency.  Now, VM_KMEM_SIZE can be used to set
the size of the kmem arena at compile-time without that value being
overridden by auto-sizing.

Update the nearby comments to reflect the kmem submap being replaced by the
kmem arena.  Stop duplicating the auto-sizing formula in every machine-
dependent vmparam.h and place it in kmeminit() where auto-sizing takes
place.

Reviewed by:	kib (an earlier version)
Sponsored by:	EMC / Isilon Storage Division
2013-11-08 16:25:00 +00:00
imp
8fd3638290 Remove the gross hack for the Octeon Simple Executive to the least
intrusive place for it to be: the octeon std file.
Fix a comment while I'm here.
Allow for future architectural specific flags.

Reviewed by:	jmallet@
2013-11-06 05:26:15 +00:00
nwhitehorn
b72e9af55a Teach nexus(4) about Open Firmware (e.g. FDT) on ARM and MIPS, retiring
fdtbus in most cases. This brings ARM and MIPS more in line with existing
Open Firmware platforms like sparc64 and powerpc, as well as preventing
double-enumeration of the OF tree on embedded PowerPC (first through nexus,
then through fdtbus).

This change is also designed to simplify resource management on FDT platforms
by letting there exist a platform-defined root bus resource_activate() call
instead of replying on fdtbus to do the right thing through fdt_bs_tag.
The OFW_BUS_MAP_INTR() and OFW_BUS_CONFIG_INTR() kobj methods are also
available to implement for similar purposes.

Discussed on:	-arm, -mips
Tested by:	zbb, brooks, imp, and others
MFC after:	6 weeks
2013-11-05 13:48:34 +00:00
markj
e64aa64ea7 Fix some lingering build failures caused by fixing implicit inclusion of
if_var.h. Also explicitly include lock.h and mutex.h in if_kr.c rather than
depending on if_var.h to bring them in.
2013-10-31 05:00:50 +00:00
markj
a5fb1fbfd8 Remove references to an unused fasttrap probe hook, and remove the
corresponding x86 trap type. Userland DTrace probes are currently handled
by the other fasttrap hooks (dtrace_pid_probe_ptr and
dtrace_return_probe_ptr).

Discussed with:	rpaulo
2013-10-31 02:35:00 +00:00
markj
cf9248a5cd Fix a typo introduced in r257338. 2013-10-31 02:27:16 +00:00
andre
6746b6e2ad nclude missing net/if_var.h.
Due to header pollution it wasn't noticed before.
2013-10-30 16:56:46 +00:00
nwhitehorn
6dbec20d9c Panics about how things can't be attached should probably happen in the
attach method rather than probe.

Submitted by:	brooks
2013-10-29 20:38:58 +00:00
nwhitehorn
e0788b0985 Devices that rely on hints or identify routines for discovery need to
return BUS_PROBE_NOWILDCARD from their probe routines to avoid claiming
wildcard devices on their parent bus. Do a sweep through the MIPS tree.

MFC after: 2 weeks
2013-10-29 14:07:31 +00:00
glebius
9e01f79e97 - Provide necessary includes.
- Remove unnecessary includes.

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-29 11:17:49 +00:00
glebius
f9369b9459 - Provide necessary includes, that before came via if.h pollution.
- Remove unnecessary ones.

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-28 22:26:03 +00:00
kib
79afbd5fdd Add bus_dmamap_load_ma() function to load map with the array of
vm_pages.  Provide trivial implementation which forwards the load to
_bus_dmamap_load_phys() page by page.  Right now all architectures use
bus_dmamap_load_ma_triv().

Tested by:	pho (as part of the functional patch)
Sponsored by:	The FreeBSD Foundation
MFC after:	1 month
2013-10-27 21:39:16 +00:00
adrian
d6a7850e82 Add a configuration file and hints file for the Alfa Networks Hornet UB
board.

This is another AR9331 board similar to the Carambola2. It has different
ethernet and LED wiring though.

They make a variety of boards that mostly differ on the amount of RAM/flash
available.  Alfa Networks graciously donated a handful of 64MB RAM/16MB flash
boards so I can finish off 802.11s support for the AR93xx chips and do up
a tech demonstration with it.

This is enough to bring up the board.

Tested:

* Alfa networks UB Hornet board - 64MB ram, 16MB flash version.

Thankyou to Alfa Networks for the development boards!

Sponsored by:	Alfa Networks (hardware only)
2013-10-25 04:06:54 +00:00
brooks
18b853b71e MFP4:
Change 221534 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/01/27 16:05:30

        FreeBSD/mips stores page-table entries in a near-identical format
        to MIPS TLB entries -- only it overrides certain "reserved" bits
        in the MIPS-defined EntryLo register to hold software-defined bits
        (swbits) to avoid significantly increasing the page table memory
        footprint.  On n32 and n64, these bits were (a) colliding with
        MIPS64r2 physical memory extensions and (b) being improperly
        cleared.

        Attempt to fix both of these problems by pushing swbits further
        along 64-bit EntryLo registers into the reserved space, and
        improving consistency between C-based and assembly-based clearing
        of swbits -- in particular, to use the same definition.  This
        should stop swbits from leaking into TLB entries -- while ignored
        by most current MIPS hardware, this would cause a problem with
        (much) larger physical memory sizes, and also leads to confusing
        hardware-level tracing as physical addresses contain unexpected
        (and inconsistent) higher bits.

        Discussed with: imp, jmallett

Change 1187301 by brooks@brooks_zenith on 2013/10/23 14:40:10
        Loop back the initial commit of 221534 to HEAD.  Correct its
        implementation for mips32.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-23 21:35:39 +00:00
brooks
13b0b47575 BERI_SIM.hint is no longer used, remove it.
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-23 15:24:05 +00:00
brooks
51470cc33f Revert r256934, it needs work to build on mips32. 2013-10-23 13:32:52 +00:00
brooks
deb8ffdc04 MFP4:
Change 221767 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/02/05 14:18:53

        When printing out information on a TLB MOD exception for a user
        process (e.g., an attempt to write to a read-only page), report
        it as a "write" in the console message, rather than "unknown".

Change 221768 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/02/05 14:28:00

        Fix post-compile but pre-commit typo in last changeset.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 21:27:22 +00:00
brooks
fe74736d2f MFP4:
Change 231031 by brooks@brooks_zenith on 2013/07/11 16:22:08

        Turn the unused and uncompilable MIPS_DISABLE_L1_CACHE define in
        cache.c into an option and when set force I- and D-cache line
        sizes to 0 (the latter part might be better as a tunable).

        Fix some casts in an #if 0'd bit of code which attempts to
        disable L1 cache ops when the cache is coherent.

Sponsored by:	DARPA/AFRL
2013-10-22 21:16:57 +00:00
brooks
597e93896c Remove a bit of debugging output that slipped into r256911.
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 21:13:02 +00:00
brooks
995d9bb7fe MFP4:
Change 228019 by bz@bz_zenith on 2013/04/23 13:55:30

	Add kernel side support for large TLB on BERI/CHERI.
	Modelled similar to NLM

MFC after:	3 days
Sponsored by:	DAPRA/AFRL
2013-10-22 21:08:25 +00:00
brooks
b3379a2c0b MFP4:
Change 221534 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/01/27 16:05:30

        FreeBSD/mips stores page-table entries in a near-identical format
        to MIPS TLB entries -- only it overrides certain "reserved" bits
        in the MIPS-defined EntryLo register to hold software-defined bits
        (swbits) to avoid significantly increasing the page table memory
        footprint.  On n32 and n64, these bits were (a) colliding with
        MIPS64r2 physical memory extensions and (b) being improperly
        cleared.

        Attempt to fix both of these problems by pushing swbits further
        along 64-bit EntryLo registers into the reserved space, and
        improving consistency between C-based and assembly-based clearing
        of swbits -- in particular, to use the same definition.  This
        should stop swbits from leaking into TLB entries -- while ignored
        by most current MIPS hardware, this would cause a problem with
        (much) larger physical memory sizes, and also leads to confusing
        hardware-level tracing as physical addresses contain unexpected
        (and inconsistent) higher bits.

        Discussed with: imp, jmallett

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 21:06:27 +00:00
brooks
73bc5e49a2 Enable ATSE_CFI_HACK in BERI configs, stable MAC addresses are useful.
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 20:50:41 +00:00
brooks
e0414fcda4 Sync BERI kernel configs with P4:
Switch the majority of device configuration to FDT from hints.

Add BERI_*_BASE configs to reduce duplication in the MDROOT and SDROOT
kernels.

Add NFS and GSSAPI support by default.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 15:45:31 +00:00
brooks
6a1ac1b4fa MFP4: 223121 (PIC portion), 225861, 227822, 229692 (PIC only), 229693,
230523, 1123614

Implement a driver for Robert Norton's PIC as an FDT interrupt
controller. Devices whose interrupt-parent property points to a beripic
device will have their interrupt allocation, activation , and setup
operations routed through the IC rather than down the traditional bus
hierarchy.

This driver largely abstracts the underlying CPU away allowing the
PIC to be implemented on CPU's other than BERI. Due to insufficient
abstractions a small amount of MIPS specific code is currently required
in fdt_mips.c and to implement counters.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 15:29:59 +00:00
brooks
f918613d2a Remove the isf(4) driver. It was created by accident and is subset of
the cfi(4) driver.  It remained in the tree longer than would be ideal
due to the time required to bring cfi(4) to feature parity.

Sponsored by:	DARPA/AFRL
MFC after:	3 days
2013-10-21 22:43:38 +00:00
brooks
6e05225f6e MFP4: 221483, 221567, 221568, 221670, 221677, 221678, 221800, 221801,
221804, 221805, 222004, 222006, 222055, 222820, 1135077, 1135118, 1136259

Add atse(4), a driver for the Altera Triple Speed Ethernet MegaCore.

The current driver support gigabit Ethernet speeds only and works with
the MegaCore only in the internal FIFO configuration in the soon to be
open sourced BERI CPU configuration.

Submitted by:	bz
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 20:44:19 +00:00
brooks
9a1a8ad690 MFP4:
Change 227630 by bz@bz_zenith on 2013/04/12 08:50:27

	Implement soft reset setting sr in sr and just in case loop
	endlessly afterwards.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 15:40:37 +00:00
adrian
cd4e844814 Whilst here, document that this TX alignment requirement may acutally
not be required on later hardware.

It would allow for higher packet rates so yes, it would be nice
to disable it.
2013-10-16 19:53:50 +00:00
adrian
54bdf08981 Allow the MDIO bus frequency to be selected.
The MDIO bus frequency is configured as a divisor off of the MDIO bus
reference clock.  For the AR9344 and later, the MDIO bus frequency can
be faster than normal (ie, up to 100MHz) and thus a static divisor may
not be very applicable.

So, for those boards that may require an actual frequency to be selected
regardless of what crazy stuff the vendor throws in uboot, one can now
set the MDIO bus frequency.  It uses the MDIO frequency and the target
frequency to choose a divisor that doesn't exceed the target frequency.

By default it will choose:

* DIV_28 on everything; except
* DIV_58 on the AR9344 to be conservative.

Whilst I'm here, add some comments about the defaults being not quite
right.  For the other internal switch devices (like the AR933x, AR724x)
the divisor can be higher - it's internal and the reference MDIO clock
is much lower than 100MHz.

The divisor tables and loop code is inspired from Linux/OpenWRT.  It's very
simple; I didn't feel that reimplementing it would yield a substantially
different solution.

Tested:

* AR9331 (mips24k)
* AR9344 (mips74k)

Obtained from:	Linux/OpenWRT
2013-10-16 19:36:50 +00:00
adrian
1426c25e21 Now that all of the on-chip switch and basic platform support is updated,
we can now add all the hardware bits for the DB120.

* arge0/argemdio0 is hooked up to an AR8327 switch - which there's currently
  no support for.  However, the bootloader on this board does set it up as
  a basic switch so we can at least _use_ it ourselves.

  So we should at least configure the arge0 side of things, including the GMAC
  register.

* .. the GMAC config peels off arge0 from the internal switch and exposes it
  as an RGMII to said AR8327.

* arge1/argemdio1 are hooked up to an internal 10/100 switch.  So, that also
  needs configuring.

* Add support for the NOR flash layout.

* Add support for the wifi (which works, with bugs, but it works.)

What's missing!

* No GPIO stuff yet!
* No sound (I2S) and no NAND flash support yet, sorry!
* The normal DB120 has an external AR95xx wifi chip on PCIe but with the
  actual calibration data in the NOR flash.  My DB120 has been modified
  to let me use the PCIe slot as a normal PCIe slot.  I'll add the "default"
  settings later when I have access to a non-modified one.
* Other stuff, like why the wifi unit gets upset and spits out stuck beacons
  and interrupt storms everywhere.  Sigh.

Tested:

* DB120 board - AR9344 (mips74k SoC) booting off of SPI flash into multi-user
  mode.
2013-10-16 04:22:26 +00:00
adrian
6f9b20e2b9 Yes, this board has 128mb of RAM. 2013-10-16 04:16:54 +00:00
adrian
6a6acca2aa Add in the platform specific quirks to get the AR934x SoC ethernet
up and running.

* The MAC FIFO configurations needed updating;
* Reset the MDIO block at the same time the MAC block is reset;
* The default divisor needs changing as the DB120 runs at a higher
  base MDIO bus clock compared to other chips.

The long-term fix is to allow the system to have a target MDIO bus
clock rate and then calculate the most suitable divider to meet
that.  This will likely need implementing before stable external
PHY or switch support can be committed.

Tested:

* AR9344 (mips74k)
* AR9331 (mips24k)
2013-10-16 03:11:18 +00:00
adrian
943d8d6c38 Add in a write barrier after each if_arge write.
Without correct barriers, this code just plain doesn't work on the
mips74k cores (specifically the AR9344.)

In particular, the MDIO register accesses need this barriering or MII bus
access results in out-of-order garbage.

Tested:

* AR9344 (mips74k)
* AR9331 (mips24k)
2013-10-16 02:46:00 +00:00
adrian
65b6a8c53f Add bus space barriers to the AR71xx SPI code.
This is required for correct, stable operation on the MIPS74k SoCs
that are dual-issue, superscalar pipelines.

Tested:

* AR9344 SoC (MIPS74k)
* AR9331 SoC (MIPS24k)
2013-10-16 02:10:35 +00:00
imp
296c494bdc Elminate NON_LEAF and use NESTED instead to unify our assembler
conventions.

Reviewed by:	jmallet@
2013-10-15 04:45:09 +00:00
imp
87b5f4698d Replace NLEAF with LEAF_NOPROFILE to unify the conventions we use in
our assembler files.

Reviewed by:	jmallet@
2013-10-15 04:44:21 +00:00