Hans Petter Selasky 52d7c63839 Reduce the DWC OTG interrupt load by not reading all the host channel
status registers for every interrupt. Check a common host channel
status interrupt register first, then conditionally read the
individual host channel status registers.

Submitted by:	Sebastian Huber <sebastian.huber@embedded-brains.de>
MFC after:	1 week
2015-10-30 14:50:29 +00:00
..
2015-02-16 15:34:10 +00:00
2015-09-14 07:08:29 +00:00
2015-10-19 07:21:57 +00:00